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11. 发明申请

US20130010525A1 REACTIVE METAL IMPLATED OXIDE BASED MEMORY 有权
标题翻译：反应性金属基于氧化物的记忆
公开(公告)号：US20130010525A1
公开(公告)日：2013-01-10
申请号：US13618292
申请日：2012-09-14
申请人： D.V. Nirmal Ramaswamy , Gurtej S. Sandhu
发明人： D.V. Nirmal Ramaswamy , Gurtej S. Sandhu
IPC分类号： G11C11/00
CPC分类号： H01L45/08 , G11C13/0007 , H01L45/145 , H01L45/165
摘要： Methods, devices, and systems associated with oxide based memory can include a method of forming an oxide based memory cell. Forming an oxide based memory cell can include forming a first conductive element, forming an oxide over the first conductive element, implanting a reactive metal into the oxide, and forming a second conductive element over the oxide.
摘要翻译：与基于氧化物的存储器相关联的方法，装置和系统可以包括形成基于氧化物的存储器单元的方法。形成基于氧化物的存储单元可以包括形成第一导电元件，在第一导电元件上形成氧化物，将活性金属注入到氧化物中，以及在氧化物上形成第二导电元件。

12. 发明申请

US20120248396A1 RESISTIVE SWITCHING IN MEMORY CELLS 有权
标题翻译：记忆细胞电阻切换
公开(公告)号：US20120248396A1
公开(公告)日：2012-10-04
申请号：US13078679
申请日：2011-04-01
申请人： D.V. Nirmal Ramaswamy , Gurtej S. Sandhu
发明人： D.V. Nirmal Ramaswamy , Gurtej S. Sandhu
IPC分类号： H01L45/00
CPC分类号： H01L45/1246 , H01L45/08 , H01L45/1233 , H01L45/145 , H01L45/146 , H01L45/147 , H01L45/1616 , H01L45/1633 , Y10S438/936
摘要： Methods, devices, and systems associated with oxide based memory can include a method of forming a resistive switching region of a memory cell. Forming a resistive switching region of a memory cell can include forming a metal oxide material on an electrode and forming a metal material on the metal oxide material, wherein the metal material formation causes a reaction that results in a graded metal oxide portion of the memory cell.
摘要翻译：与基于氧化物的存储器相关联的方法，装置和系统可以包括形成存储器单元的电阻式开关区域的方法。形成存储单元的电阻开关区域可以包括在电极上形成金属氧化物材料并在金属氧化物材料上形成金属材料，其中金属材料形成引起导致存储单元的分级金属氧化物部分的反应。

13. 发明申请

US20120069624A1 REACTIVE METAL IMPLATED OXIDE BASED MEMORY 有权
标题翻译：反应性金属基于氧化物的记忆
公开(公告)号：US20120069624A1
公开(公告)日：2012-03-22
申请号：US12888219
申请日：2010-09-22
申请人： D.V. Nirmal Ramaswamy , Gurtej S. Sandhu
发明人： D.V. Nirmal Ramaswamy , Gurtej S. Sandhu
IPC分类号： G11C11/56 , H01L45/00 , H01L21/02
CPC分类号： H01L45/08 , G11C13/0007 , H01L45/145 , H01L45/165
摘要： Methods, devices, and systems associated with oxide based memory can include a method of forming an oxide based memory cell. Forming an oxide based memory cell can include forming a first conductive element, forming an oxide over the first conductive element, implanting a reactive metal into the oxide, and forming a second conductive element over the oxide.
摘要翻译：与基于氧化物的存储器相关联的方法，装置和系统可以包括形成基于氧化物的存储器单元的方法。形成基于氧化物的存储单元可以包括形成第一导电元件，在第一导电元件上形成氧化物，将活性金属注入到氧化物中，以及在氧化物上形成第二导电元件。

14. 发明申请

US20110227142A1 FORTIFICATION OF CHARGE-STORING MATERIAL IN HIGH-K DIELECTRIC ENVIRONMENTS AND RESULTING APPRATUSES 有权
标题翻译：高K电介质环境中电荷储存材料的优化及其结果
公开(公告)号：US20110227142A1
公开(公告)日：2011-09-22
申请号：US12728697
申请日：2010-03-22
申请人： D.V. Nirmal Ramaswamy , Matthew N. Rocklein , Rhett Brewer
发明人： D.V. Nirmal Ramaswamy , Matthew N. Rocklein , Rhett Brewer
IPC分类号： H01L29/792 , H01L21/314 , H01L21/28
CPC分类号： H01L21/28282 , B82Y10/00 , G11C11/5671 , H01L21/02148 , H01L21/0228 , H01L21/02323 , H01L21/28273 , H01L29/42332 , H01L29/42348
摘要： Memories, systems, and methods for forming memory cells are disclosed. One such memory cell includes a charge storage node that includes nanodots over a tunnel dielectric and a protective film over the nanodots. In another memory cell, the charge storage node includes nanodots that include a ruthenium alloy. Memory cells can include an inter-gate dielectric over the protective film or ruthenium alloy nanodots and a control gate over the inter-gate dielectric. The protective film and ruthenium alloy can be configured to protect at least some of the nanodots from vaporizing during formation of the inter-gate dielectric.
摘要翻译：公开了用于形成存储器单元的存储器，系统和方法。一个这种存储单元包括电荷存储节点，其在隧道电介质上方包括纳米点，并且在纳米点上包括保护膜。在另一个存储单元中，电荷存储节点包括包含钌合金的纳米点。存储单元可以包括在保护膜或钌合金纳米点上的栅极间电介质和在栅极间电介质上的控制栅极。保护膜和钌合金可以被配置为在形成栅极间电介质期间保护至少一些纳米点不被蒸发。

15. 发明申请

US20100112778A1 NANOSCALE FLOATING GATE AND METHODS OF FORMATION 有权
标题翻译： NANOSCALE FLIPTING GATE AND METHODS OF FORMATION
公开(公告)号：US20100112778A1
公开(公告)日：2010-05-06
申请号：US12686928
申请日：2010-01-13
申请人： Gurtej S. Sandhu , D.V. Nirmal Ramaswamy
发明人： Gurtej S. Sandhu , D.V. Nirmal Ramaswamy
IPC分类号： H01L21/28 , H01L21/762
CPC分类号： H01L29/788 , B82Y10/00 , B82Y99/00 , H01L21/28273 , H01L27/115 , H01L27/11521 , H01L29/0665 , H01L29/0673 , H01L29/0676 , H01L29/42324 , H01L29/66825 , H01L29/7881 , Y10S977/721 , Y10S977/762
摘要： A memory cell is provided including a tunnel dielectric layer overlying a semiconductor substrate. The memory cell also includes a floating gate having a first portion overlying the tunnel dielectric layer and a second portion in the form of a nanorod extending from the first portion. In addition, a control gate layer is separated from the floating gate by an intergate dielectric layer.
摘要翻译：提供了包括覆盖在半导体衬底上的隧道电介质层的存储单元。存储单元还包括具有覆盖隧道介电层的第一部分的浮动栅极和从第一部分延伸的纳米棒形式的第二部分。此外，控制栅极层通过隔间电介质层与浮置栅极分离。

16. 发明授权

US08951829B2 Resistive switching in memory cells 有权
标题翻译：存储单元中的电阻式切换
公开(公告)号：US08951829B2
公开(公告)日：2015-02-10
申请号：US13078679
申请日：2011-04-01
申请人： D.V. Nirmal Ramaswamy , Gurtej S. Sandhu
发明人： D.V. Nirmal Ramaswamy , Gurtej S. Sandhu
IPC分类号： H01L27/112 , H01L45/00
CPC分类号： H01L45/1246 , H01L45/08 , H01L45/1233 , H01L45/145 , H01L45/146 , H01L45/147 , H01L45/1616 , H01L45/1633 , Y10S438/936
摘要： Methods, devices, and systems associated with oxide based memory can include a method of forming a resistive switching region of a memory cell. Forming a resistive switching region of a memory cell can include forming a metal oxide material on an electrode and forming a metal material on the metal oxide material, wherein the metal material formation causes a reaction that results in a graded metal oxide portion of the memory cell.
摘要翻译：与基于氧化物的存储器相关联的方法，装置和系统可以包括形成存储器单元的电阻式开关区域的方法。形成存储单元的电阻开关区域可以包括在电极上形成金属氧化物材料并在金属氧化物材料上形成金属材料，其中金属材料形成引起导致存储单元的分级金属氧化物部分的反应。

17. 发明授权

US08514626B2 Memory cells and methods of storing information 有权
标题翻译：存储单元和存储信息的方法
公开(公告)号：US08514626B2
公开(公告)日：2013-08-20
申请号：US13190821
申请日：2011-07-26
申请人： Gurtej S. Sandhu , D.V. Nirmal Ramaswamy
发明人： Gurtej S. Sandhu , D.V. Nirmal Ramaswamy
IPC分类号： G11C16/04
CPC分类号： H01L29/792 , G11C16/0416 , G11C16/3418 , H01L21/28273 , H01L29/788
摘要： Memory cells may have channel-supporting material, dielectric material over the channel-supporting material, carrier-trapping material over the dielectric material and an electrically conductive electrode material over and directly against the carrier-trapping material; where the carrier-trapping material includes gallium, indium, zinc and oxygen. A memory cell may be provided which has a channel-supporting material, a dielectric material over the channel-supporting material, a carrier-trapping material over the dielectric material, and an electrically conductive electrode material over and directly against the carrier-trapping material; where the carrier-trapping material includes gallium, indium, zinc and oxygen. It may be determined if carriers are trapped in the carrier-trapping material to thereby ascertain a memory state of the memory cell.
摘要翻译：存储单元可以具有通道支撑材料，在通道支撑材料上方的介电材料，介电材料上方的载流子捕获材料和超过并直接抵靠载流子捕获材料的导电电极材料; 其中载流子捕获材料包括镓，铟，锌和氧。可以提供一种存储单元，其具有通道支撑材料，在通道支撑材料上方的电介质材料，介电材料上方的载流子捕获材料，以及在载体捕获材料之上并直接抵靠载体捕获材料的导电电极材料; 其中载流子捕获材料包括镓，铟，锌和氧。可以确定载体是否被捕获在载流子捕获材料中，从而确定存储单元的存储状态。

18. 发明申请

US20120001248A1 METHODS OF FORMING NANOSCALE FLOATING GATE 有权
标题翻译：形成纳米浮选门的方法
公开(公告)号：US20120001248A1
公开(公告)日：2012-01-05
申请号：US13231371
申请日：2011-09-13
申请人： Gurtej S. Sandhu , D.V. Nirmal Ramaswamy
发明人： Gurtej S. Sandhu , D.V. Nirmal Ramaswamy
IPC分类号： H01L29/788 , H01L29/06 , B82Y99/00
CPC分类号： H01L29/788 , B82Y10/00 , B82Y99/00 , H01L21/28273 , H01L27/115 , H01L27/11521 , H01L29/0665 , H01L29/0673 , H01L29/0676 , H01L29/42324 , H01L29/66825 , H01L29/7881 , Y10S977/721 , Y10S977/762
摘要： A memory cell is provided including a tunnel dielectric layer overlying a semiconductor substrate. The memory cell also includes a floating gate having a first portion overlying the tunnel dielectric layer and a second portion in the form of a nanorod extending from the first portion. In addition, a control gate layer is separated from the floating gate by an intergate dielectric layer.
摘要翻译：提供了包括覆盖在半导体衬底上的隧道电介质层的存储单元。存储单元还包括具有覆盖隧道介电层的第一部分的浮动栅极和从第一部分延伸的纳米棒形式的第二部分。此外，控制栅极层通过隔间电介质层与浮置栅极分离。

19. 发明申请

US20130109147A1 Methods of Forming Metal Oxide and Memory Cells 有权
标题翻译：形成金属氧化物和记忆细胞的方法
公开(公告)号：US20130109147A1
公开(公告)日：2013-05-02
申请号：US13282355
申请日：2011-10-26
申请人： Noel Rocklein , D.V. Nirmal Ramaswamy , Dale W. Collins , Swapnil Lengade , Srividya Krishnamurthy , Mark Korber
发明人： Noel Rocklein , D.V. Nirmal Ramaswamy , Dale W. Collins , Swapnil Lengade , Srividya Krishnamurthy , Mark Korber
IPC分类号： H01L21/02 , C01B13/14 , C01F17/00 , C01G21/02 , C01G45/02 , C01G23/04 , C01G49/02 , C01D17/00 , H01L21/28 , C01F11/02
CPC分类号： H01L45/1641 , H01B1/08 , H01L21/283 , H01L45/08 , H01L45/1233 , H01L45/145 , H01L45/146 , H01L45/147
摘要： Some embodiments include methods of forming memory cells. Metal oxide may be deposited over a first electrode, with the deposited metal oxide having a relatively low degree of crystallinity. The degree of crystallinity within the metal oxide may be increased after the deposition of the metal oxide. A dielectric material may be formed over the metal oxide, and a second electrode may be formed over the dielectric material. The degree of crystallinity may be increased with a thermal treatment. The thermal treatment may be conducted before, during, and/or after formation of the dielectric material.
摘要翻译：一些实施例包括形成存储器单元的方法。金属氧化物可以沉积在第一电极上，沉积的金属氧化物具有相对低的结晶度。在沉积金属氧化物之后，金属氧化物内的结晶度可以增加。可以在金属氧化物上形成电介质材料，并且可以在电介质材料上形成第二电极。可以通过热处理来提高结晶度。热处理可以在形成介电材料之前，期间和/或之后进行。

20. 发明申请

US20130028016A1 Memory Cells and Methods of Storing Information 有权
标题翻译：记忆单元和信息存储方法
公开(公告)号：US20130028016A1
公开(公告)日：2013-01-31
申请号：US13190821
申请日：2011-07-26
申请人： Gurtej S. Sandhu , D.V. Nirmal Ramaswamy
发明人： Gurtej S. Sandhu , D.V. Nirmal Ramaswamy
IPC分类号： G11C11/34 , H01L29/06 , H01L29/792 , B82Y99/00
CPC分类号： H01L29/792 , G11C16/0416 , G11C16/3418 , H01L21/28273 , H01L29/788
摘要： Some embodiments include memory cells which have channel-supporting material, dielectric material over the channel-supporting material, carrier-trapping material over the dielectric material and an electrically conductive electrode material over and directly against the carrier-trapping material; where the carrier-trapping material includes gallium, indium, zinc and oxygen. Some embodiments include methods of storing information. A memory cell to is provided which has a channel-supporting material, a dielectric material over the channel-supporting material, a carrier-trapping material over the dielectric material, and an electrically conductive electrode material over and directly against the carrier-trapping material; where the carrier-trapping material includes gallium, indium, zinc and oxygen. It is determined if carriers are trapped in the carrier-trapping material to thereby ascertain a memory state of the memory cell.
摘要翻译：一些实施例包括具有通道支撑材料，在通道支撑材料上的电介质材料，介电材料上方的载流子捕获材料以及超过并直接抵靠载体捕获材料的导电电极材料的存储单元; 其中载流子捕获材料包括镓，铟，锌和氧。一些实施例包括存储信息的方法。提供一种存储单元，其具有通道支撑材料，在通道支撑材料上方的介电材料，介电材料上的载流子捕获材料，以及在载体捕获材料上方并直接抵靠载体捕获材料的导电电极材料; 其中载流子捕获材料包括镓，铟，锌和氧。确定载体是否被捕获在载流子捕获材料中，从而确定存储单元的存储状态。

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