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    • 12. 发明授权
    • Methods and apparatus for evaluating the eye margin of a communications device using a data eye monitor
    • 使用数据眼监视器评估通信设备的眼边的方法和装置
    • US08126039B2
    • 2012-02-28
    • US11434688
    • 2006-05-16
    • Mohammad S. MobinGregory W. SheetsLane A. SmithCraig B. Ziemer
    • Mohammad S. MobinGregory W. SheetsLane A. SmithCraig B. Ziemer
    • H04B3/46
    • H04L1/20H04B17/309
    • Methods and apparatus are provided for evaluating the eye margin of a communications device using a data eye monitor. The quality of a data eye associated with a signal is evaluated by sampling the signal for a plurality of different phases; evaluating the samples to evaluate one or more of a height and width of the data eye; and determining whether the one or more of the height and width satisfy one or more predefined criteria. One or more parameters of the communications device can optionally be adjusted if the communications device does not satisfy the one or more predefined criteria. The communications device can optionally be assigned to a quality category based on the evaluation. A phase offset between a first clock signal used to sample the signal and one or more clocks used to sample data is reduced.
    • 提供的方法和装置用于评估使用数据眼监护仪的通信设备的眼部边缘。 与信号相关联的数据眼的质量通过对多个不同相位的信号进行采样来评估; 评估样本以评估数据眼睛的高度和宽度中的一个或多个; 以及确定所述高度和宽度中的一个或多个是否满足一个或多个预定标准。 如果通信设备不满足一个或多个预定标准,则可以可选地调整通信设备的一个或多个参数。 可以根据评估可选地将通信设备分配给质量类别。 减少用于采样信号的第一时钟信号与用于采样数据的一个或多个时钟之间的相位偏移。
    • 14. 发明授权
    • Compensation techniques for reducing power consumption in digital circuitry
    • 用于降低数字电路功耗的补偿技术
    • US07965133B2
    • 2011-06-21
    • US12160373
    • 2007-10-31
    • Joseph AnidjarMohammad S. MobinGregory W. SheetsVladimir SindalovskyLane A. Smith
    • Joseph AnidjarMohammad S. MobinGregory W. SheetsVladimir SindalovskyLane A. Smith
    • G05F1/10
    • H03K19/00369
    • A compensation circuit for reducing power consumption in at least one digital circuit includes a first sample circuit connected to a first supply voltage, a second sample circuit connected to a second supply voltage, and a controller connected to the first and second sample circuits. The first and second sample circuits are substantially functionally equivalent to one another but optimized for different regions of operation within a specified range of PVT conditions. The controller is operative to receive respective output signals from the first and second sample circuits, to monitor a functionality of the second sample circuit relative to the first sample circuit, and to adjust a level of the second supply voltage to ensure correct operation of the second sample circuit throughout the specified range of PVT conditions. The digital circuit is operative from the second supply voltage.
    • 用于降低至少一个数字电路中的功耗的补偿电路包括连接到第一电源电压的第一采样电路,连接到第二电源电压的第二采样电路和连接到第一和第二采样电路的控制器。 第一和第二采样电路基本上在功能上彼此相等,但是在PVT条件的指定范围内针对不同操作区域进行了优化。 控制器可操作以从第一和第二采样电路接收相应的输出信号,以监测第二采样电路相对于第一采样电路的功能,并调整第二电源电压的电平,以确保第二采样电路的正常工作 采样电路在指定的PVT条件范围内。 数字电路从第二电源电压工作。
    • 18. 发明授权
    • Method and apparatus for monitoring and compensating for skew on a high speed parallel bus
    • 用于监视和补偿高速并行总线上的偏斜的方法和装置
    • US07587640B2
    • 2009-09-08
    • US11235872
    • 2005-09-27
    • Mohammad S. MobinGregory W. SheetsLane A. Smith
    • Mohammad S. MobinGregory W. SheetsLane A. Smith
    • G11B20/20
    • G06F13/4213
    • Methods and apparatus are provided for monitoring and compensating for skew on a high speed parallel bus. Delay skew for a plurality of signals on a parallel bus is monitored by obtaining a plurality of samples of the plurality of signals for each unit interval; and identifying a location of transitions in the plurality of signals based on the samples. The samples can be obtained, for example, by sampling the plurality of signals using a plurality of latches and estimating a value of one or more of the plurality of signals by comparing values of the latches. A microprocessor can optionally be employed to determine a relative distribution of transitions in the plurality of signals and to align transitions in the plurality of signals to a common position. The transitions in the plurality of signals can be aligned to a common position by adjusting a delay control setting for a buffer associated with each of the plurality of signals.
    • 提供了用于监视和补偿高速并行总线上的偏斜的方法和装置。 通过获得每个单位间隔的多个信号的多个样本来监视并行总线上的多个信号的延迟偏移; 以及基于所述样本来识别所述多​​个信号中的转变的位置。 可以例如通过使用多个锁存器对多个信号进行采样并且通过比较锁存器的值来估计多个信号中的一个或多个的值来获得样本。 可以可选地使用微处理器来确定多个信号中的转变的相对分布并且将多个信号中的转变对准到公共位置。 通过调整与多个信号中的每个信号相关联的缓冲器的延迟控制设置,多个信号中的转换可以对齐到公共位置。
    • 19. 发明申请
    • Methods and Apparatus for Detecting a Loss of Lock Condition in a Clock and Data Recovery System
    • 用于检测时钟和数据恢复系统中锁定状态丢失的方法和装置
    • US20090168936A1
    • 2009-07-02
    • US11967632
    • 2007-12-31
    • Mohammad S. MobinGregory W. SheetsLane A. SmithPaul H. Tracy
    • Mohammad S. MobinGregory W. SheetsLane A. SmithPaul H. Tracy
    • H04L7/00
    • H04L7/0062H04L7/0083
    • Methods and apparatus are provided for detecting a loss of lock condition in a clock and data recovery system. A loss of lock condition is detected in a clock and data recovery system that generates a recovered clock signal from a received signal by sampling the received signal for a plurality of different phases using one or more latches clocked by the recovered clock; evaluating the samples to monitor a data eye associated with the received signal; and detecting the loss of lock condition if the data eye does not satisfy one or more predefined conditions. Generally, the predefined conditions identify a loss of the data eye (e.g, when the data eye cannot be substantially detected), for example, based on a degree of opening of the data eye. The clock and data recovery system can optionally be restarted if the loss of lock condition is detected.
    • 提供了用于检测时钟和数据恢复系统中的锁定状况的损失的方法和装置。 在时钟和数据恢复系统中检测到锁定状态的损失,该系统通过使用由恢复时钟计时的一个或多个锁存器对接收到的信号进行多个不同相位的采样来产生来自接收信号的恢复时钟信号; 评估样本以监测与接收信号相关联的数据眼; 并且如果数据眼不满足一个或多个预定条件,则检测锁定条件的损失。 通常,预定条件识别数据眼的损失(例如,当数据眼不能被基本上被检测时),例如,基于数据眼的打开程度。 如果检测到锁定状态的丢失,则可以可选地重新启动时钟和数据恢复系统。