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11. 发明授权

US5274781A Programmable controller module identification by interconnecting the input and output ports of a module in a predefined manner 失效
标题翻译：通过以预定义的方式连接模块的输入和输出端口，可编程控制器模块识别
公开(公告)号：US5274781A
公开(公告)日：1993-12-28
申请号：US550247
申请日：1990-07-06
申请人： Anthony G. Gibart
发明人： Anthony G. Gibart
IPC分类号： G05B19/05 , G06F15/177 , G06F9/00
CPC分类号： G05B19/054 , G06F15/177 , G05B2219/1185
摘要： A programmable controller includes a processor module and a number of input/output modules housed in a rack. Each input/output module contains a circuit that identifies characteristics of the module to the processor module. The circuit has a parallel input port and a parallel output port The outputs and inputs of the two ports are interconnected in a predefined manner according to the module characteristics. In addition, inputs of the input port are coupled to either a positive or negative voltage source to identify other module characteristics. By sequentially sending data to the output port and then reading data from the input port of each input/output module, the processor can identify the characteristics of the modules in the programmable controller.
摘要翻译：可编程控制器包括处理器模块和容纳在机架中的多个输入/输出模块。每个输入/输出模块都包含一个识别模块到处理器模块的特性的电路。该电路具有并行输入端口和并行输出端口两个端口的输出和输入根据模块特性以预定的方式互连。此外，输入端口的输入耦合到正或负电压源以识别其他模块特性。通过顺序地将数据发送到输出端口，然后从每个输入/输出模块的输入端口读取数据，处理器可以识别可编程控制器中的模块的特性。

12. 发明授权

US4896288A Programmable controller input module 失效
标题翻译：可编程控制器输入模块
公开(公告)号：US4896288A
公开(公告)日：1990-01-23
申请号：US361740
申请日：1989-05-31
申请人： Roger Gonnering , Anthony G. Gibart
发明人： Roger Gonnering , Anthony G. Gibart
IPC分类号： G05B19/05
CPC分类号： G05B19/054
摘要： A high-speed input module for a programmable controller has two sensor inputs, one for receiving an indication of a sensed event and another or receiving an indication as to whether the count of such events should be incremented or decremented. Each input is coupled to a separate data latch which temporarily stores the respective indication. The output of the sensed event latch is connected to an interrupt line of the programmable controller. A shift register has a separate parallel input connected to the output of each latch and has a serial output for connection to a data input terminal of the programmable controller. The shift register transfers the sensed indications to the controller in response to clock signals received from the programmable controller.
摘要翻译：用于可编程控制器的高速输入模块具有两个传感器输入，一个用于接收感测到的事件的指示，另一个用于接收关于这些事件的计数应当递增还是递减的指示。每个输入耦合到临时存储相应指示的单独的数据锁存器。感测事件锁存器的输出端连接到可编程控制器的中断线。移位寄存器具有连接到每个锁存器的输出的单独的并行输入，并且具有用于连接到可编程控制器的数据输入端的串行输出。移位寄存器响应于从可编程控制器接收的时钟信号将感测到的指示传送到控制器。

13. 发明授权

US06484215B1 System having I/O module number assignment utilizing module number signal line having pair of inputs adapted for receiving module number signal and propagation of module number signal down stream 有权
标题翻译：具有I / O模块编号分配的系统，使用模块号信号线，其具有适于接收模块号信号和模块号信号下行流传播的一对输入
公开(公告)号：US06484215B1
公开(公告)日：2002-11-19
申请号：US09192962
申请日：1998-11-16
申请人： Anthony G. Gibart , Dennis G. Schneider , Makoto Shichi
发明人： Anthony G. Gibart , Dennis G. Schneider , Makoto Shichi
IPC分类号： G06F1314
CPC分类号： G05B19/054 , G05B2219/1129 , G06F2213/0052
摘要： An input/output (I/O) module has a programmable memory having a first memory address for receiving a module number and a second memory address for receiving a signal direction indicator. The I/O module is for use with a programmable controller system having a master controller serially connected to a plurality of I/O modules. The I/O module has a signal line operatively coupled with the memory. The signal line has a pair of inputs. Both inputs are configured and adapted for receiving a module number signal across a line connected therewith. The other one of the inputs will then propagate the module number signal downstream. A logic circuit sets the second memory address with the signal direction indicator corresponding to the module number signal being received by a particular one of the inputs.
摘要翻译：输入/输出（I / O）模块具有可编程存储器，其具有用于接收模块号的第一存储器地址和用于接收信号方向指示器的第二存储器地址。 I / O模块用于具有串行连接到多个I / O模块的主控制器的可编程控制器系统。 I / O模块具有与存储器可操作地耦合的信号线。信号线有一对输入。两个输入都被配置并适于在与其连接的线路上接收模块号码信号。另一个输入端将传输下行的模块号信号。逻辑电路将第二存储器地址与由特定输入端接收的模块编号信号相对应的信号方向指示器来设置。

14. 发明授权

US5986896A Programmable controller having a system for reducing energy consumption of relay outputs 有权
标题翻译：可编程控制器，具有降低继电器输出功耗的系统
公开(公告)号：US5986896A
公开(公告)日：1999-11-16
申请号：US163935
申请日：1998-09-29
申请人： Anthony G. Gibart , Jack L. Covault
发明人： Anthony G. Gibart , Jack L. Covault
IPC分类号： H01H47/32 , H02M3/335 , H02M7/537
CPC分类号： H01H47/32
摘要： A programmable controller reduces the power used by the relays. The controller design permits energization of relay coils without subsequent maintenance of the relatively high voltage required for energization. The design permits the voltage across the relay to be lowered to an activated relay coil maintenance level with a design that minimizes the space required for the relay circuitry.
摘要翻译：可编程控制器可以减少继电器使用的功率。控制器设计允许继电器线圈通电，而不需要维持通电所需的较高电压。该设计允许将继电器两端的电压降低到已激活的继电器线圈维护水平，其设计使得继电器电路所需的空间最小化。

15. 发明授权

US5495588A Programmable controller having joined relay language processor and general purpose processor 失效
标题翻译：可编程控制器已加入中继语言处理器和通用处理器
公开(公告)号：US5495588A
公开(公告)日：1996-02-27
申请号：US365979
申请日：1994-12-28
申请人： Anthony G. Gibart , Kurt Knull
发明人： Anthony G. Gibart , Kurt Knull
IPC分类号： G05B19/05 , G06F9/38 , G06F9/455
CPC分类号： G06F9/3877 , G05B19/052 , G06F9/3879 , G05B2219/15127
摘要： A programmable controller for executing general instructions and relay ladder instructions employs a general purpose microprocessor together with a high speed relay ladder processor. The relay ladder instruction in a user program are executed by the special processor exclusively. When a general instruction is encountered, the special processor releases the general purpose microprocessor from a wait state and provides it with data in response to a previous long read instruction. This data is interpreted by the microprocessor to indicate the next instruction to be executed and points to a series of machine instructions terminating in another long read instruction to a designated address. When a read of this designated address is detected by the special processor, thus indicating the conclusion of the execution of the general instruction, the special processor puts the microprocessor back in the wait state and continues to execute relay ladder instructions in the user program if any. The allocation technique may be used with a large class of general purpose microprocessors with no modification and without the need for separate allocation circuitry.
摘要翻译：用于执行通用指令和梯形图指令的可编程控制器与高速梯形图处理器一起使用通用微处理器。用户程序中的梯形图指令由专用处理器执行。当遇到通用指令时，特殊处理器将通用微处理器从等待状态释放，并响应于先前的长读指令为其提供数据。该数据由微处理器解释以指示下一个要执行的指令，并指向终止于指定地址的另一个长读指令的一系列机器指令。当特殊处理器检测到该指定地址时，由此表示通用指令的执行结果，特殊处理器将微处理器置于等待状态，并在用户程序中继续执行梯形图指令，如果有的话。分配技术可以与大类通用微处理器一起使用，不需要修改，也不需要单独的分配电路。

16. 发明授权

US5378931A Low leakage fuse blown detection circuit 失效
标题翻译：低漏电保险丝熔断检测电路
公开(公告)号：US5378931A
公开(公告)日：1995-01-03
申请号：US40696
申请日：1993-03-31
申请人： Daniel Bolda , Michael R. Havey , Anthony G. Gibart
发明人： Daniel Bolda , Michael R. Havey , Anthony G. Gibart
IPC分类号： H02H3/04 , H02H3/24 , H05B41/29
CPC分类号： H02H3/046 , Y10T307/865
摘要： A fuse blown detection circuit for use in conjunction with the control transistor output circuits of a programmable controller which provides low leakage after the fuse is blown. The detection circuit comprises a pair of voltage dividers and a diagnostic triggering device forming an H-bridge network connected across the terminals of the fuse and a blocking diode. When the fuse is blown the voltage levels defined by the dividers change to activate the trigger device and enable a diagnostic signal indicative of the fuse blown condition while the blocking diode prevents current flow back through the control transistor and output circuit.
摘要翻译：熔丝熔断检测电路，与可编程控制器的控制晶体管输出电路结合使用，可在保险丝熔断之后提供低泄漏。检测电路包括一对分压器和诊断触发装置，形成连接在保险丝的端子和阻塞二极管之间的H桥网络。当保险丝熔断时，由分压器限定的电压电平改变以启动触发装置，并启用指示保险丝烧断状态的诊断信号，同时阻塞二极管阻止电流流过控制晶体管和输出电路。

17. 发明授权

US5243232A Start-up pulse suppression circuit for industrial controller output 失效
标题翻译：用于工业控制器输出的启动脉冲抑制电路
公开(公告)号：US5243232A
公开(公告)日：1993-09-07
申请号：US917661
申请日：1992-07-20
申请人： Daniel J. Bolda , Joel C. Clemente , Michael A. Feavel , Anthony G. Gibart , John J. Gilge , Michael R. Havey
发明人： Daniel J. Bolda , Joel C. Clemente , Michael A. Feavel , Anthony G. Gibart , John J. Gilge , Michael R. Havey
IPC分类号： H03K17/16 , H03K17/22
CPC分类号： H03K17/16 , H03K17/22 , Y10T307/604 , Y10T307/964
摘要： A flash-on reduction circuit for use in the binary state output circuitry of an industrial controller employs a current conductor to charge parasitic capacitances of the output circuitry when the industrial controller is first turned on and a current limiter for preventing high current flows through the output power stages of the output circuit when the industrial controller is first turned on. The current limiter is deactivated by a timing means after the parasitic capacitances have been charged by the current conductor. In a first embodiment, the current conductor and current limiting means are provided by a current source applying increasing power to the output circuit.
摘要翻译：在工业控制器的二进制状态输出电路中使用的闪光还原电路使用电流导体来在工业控制器首次接通时对输出电路的寄生电容进行充电，并且用于防止高电流流过输出的限流器当工业控制器首次打开时，输出电路的功率级。通过电流导体对寄生电容充电之后，定时装置使电流限制器失效。在第一实施例中，电流导体和电流限制装置由向输出电路施加增加功率的电流源提供。

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