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11. 发明授权

US07002507B2 Pipelined and cyclic analog-to-digital converters 有权
标题翻译：流水线和循环模数转换器
公开(公告)号：US07002507B2
公开(公告)日：2006-02-21
申请号：US10945880
申请日：2004-09-22
申请人： Shigeto Kobayashi , Kuniyuki Tani , Atsushi Wada
发明人： Shigeto Kobayashi , Kuniyuki Tani , Atsushi Wada
IPC分类号： H03M1/14 , H03M1/40
CPC分类号： H03M1/1225 , H03M1/162 , H03M1/167
摘要： A need exists to provide an AD converter which is well balanced between an increase in processing speed and a decrease in circuit area. The AD converter performs an analog-to-digital conversion separately in four steps, while performing pipelined processing on an AD conversion of the first stage by a first AD conversion circuit and AD conversions of the second to fourth steps by a second AD conversion circuit. A DA conversion circuit, a subtractor circuit, and an amplifier circuit are utilized in a DA conversion, subtraction, and amplification in the first step as well as in DA conversions, subtractions, and amplifications in the second to fourth steps, thus shared in all the steps.
摘要翻译：需要提供在处理速度的提高和电路面积的减小之间良好平衡的AD转换器。 AD转换器分四步执行模数转换，同时通过第一AD转换电路对第一级的AD转换进行流水线处理，并通过第二AD转换电路对第二至第四步进行AD转换。在第一步中的DA转换，减法和放大以及第二至第四步中的DA转换，减法和放大中都使用DA转换电路，减法器电路和放大器电路，因此共享步骤。

12. 发明申请

US20050174277A1 Analog-digital converter with advanced scheduling 有权
标题翻译：具有高级调度的模数转换器
公开(公告)号：US20050174277A1
公开(公告)日：2005-08-11
申请号：US11052093
申请日：2005-02-08
申请人： Kuniyuki Tani , Atsushi Wada , Shigeto Kobayashi
发明人： Kuniyuki Tani , Atsushi Wada , Shigeto Kobayashi
IPC分类号： H03M1/16 , H03M1/34 , H03M1/12
CPC分类号： H03M1/167 , H03M1/162
摘要： A first amplifier circuit samples and holds an input analog signal and outputs the same to a subtracting circuit. An AD converter circuit converts the input analog signal into a digital value so as to retrieve a predetermined number of bits. A DA converter circuit converts the digital value derived from conversion by the AD converter circuit into an analog value. A subtracter circuit subtracts an output analog signal from the DA converter circuit from the analog signal input via a first switch or the first amplifier circuit. A second amplifier circuit amplifies an output analog signal from the subtracter circuit by a gain of 2 and outputs the amplified signal. An input switching circuit controls the order of inputs, i.e. the input analog signal and a reference voltage, to voltage comparison elements constituting the Ad converter circuit.
摘要翻译：第一放大器电路对输入的模拟信号进行采样并保持，并将其输出到减法电路。 AD转换器电路将输入的模拟信号转换为数字值，以便检索预定数量的位。 DA转换器电路将由AD转换器电路的转换得到的数字值转换为模拟值。减法电路经由第一开关或第一放大器电路从DA转换器电路的模拟信号输入中减去输出模拟信号。第二放大器电路将来自减法器电路的输出模拟信号以2的增益放大并输出放大的信号。输入开关电路将输入的顺序，即输入模拟信号和参考电压控制到构成Ad转换器电路的电压比较元件。

13. 发明授权

US07289055B2 Analog-digital converter with gain adjustment for high-speed operation 有权
标题翻译：具有增益调节功能的模数转换器，用于高速运行
公开(公告)号：US07289055B2
公开(公告)日：2007-10-30
申请号：US11049081
申请日：2005-02-03
申请人： Shigeto Kobayashi , Kuniyuki Tani , Atsushi Wada , Noriaki Kojima
发明人： Shigeto Kobayashi , Kuniyuki Tani , Atsushi Wada , Noriaki Kojima
IPC分类号： H03M1/14
CPC分类号： H03M1/167 , H03M1/14 , H03M1/162
摘要： An input analog signal is fed to an amplifier circuit and an AD converter circuit. The AD converter circuit converts the input analog signal into a digital value of a predetermined number of bits, and outputs the digital value to an encoder (not shown) A DA converter circuit converts the digital value of a predetermined number of bits output from the AD converter circuit into an analog signal. The amplifier circuit samples and amplifies the input analog signal by a factor of α (greater than 1). A subtracter circuit subtracts an output of the DA converter circuit amplified by a factor of α from an output of the amplifier circuit.
摘要翻译：输入模拟信号被馈送到放大器电路和AD转换器电路。 AD转换器电路将输入模拟信号转换成预定位数的数字值，并将数字值输出到编码器（未示出）.ADA转换电路将从AD输出的预定位数的数字值转换转换器电路转换为模拟信号。放大器电路以α（大于1）的因子对输入的模拟信号进行采样和放大。减法器电路从放大器电路的输出中减去放大了α因子的DA转换器电路的输出。

14. 发明授权

US07173556B2 Amplifier circuit and analog-to-digital circuit using the same 有权
公开(公告)号：US07173556B2
公开(公告)日：2007-02-06
申请号：US11073720
申请日：2005-03-08
申请人： Shigeto Kobayashi , Atsushi Wada , Kuniyuki Tani
发明人： Shigeto Kobayashi , Atsushi Wada , Kuniyuki Tani
IPC分类号： H03M1/38
CPC分类号： H03M1/1225 , H03M1/167
摘要： One or more input capacitors are connected to an inverting input terminal of an operational amplifier. Connected to the respective input capacitors are switches for on-off control of the input of an input signal, switches for on-off control of the input of another input signal, switches for on-off control of the input of a higher reference voltage and switches for on-off control of the input of a lower reference voltage. The switches for on-off control of the input of an input signal and the switches for on-off control of the input of another input signal are controlled by independent control signals.

15. 发明授权

US07119728B2 Analog/digital converting device 有权
标题翻译：模/数转换器
公开(公告)号：US07119728B2
公开(公告)日：2006-10-10
申请号：US11061668
申请日：2005-02-22
申请人： Atsushi Wada , Kuniyuki Tani , Shigeto Kobayashi
发明人： Atsushi Wada , Kuniyuki Tani , Shigeto Kobayashi
IPC分类号： H03M1/12
CPC分类号： H03M1/34 , H03M1/162 , H03M1/167 , H03M1/40 , H03M1/44
摘要： The present invention provides a widely general-purpose A/D converting device. The A/D converting device comprises multiple signal conversion units each of which include: an A/D converter for converting an input analog signal into a digital signal with a predetermined number of bits; a D/A converter for converting the output from the A/D converter into an analog signal; a subtracter for subtracting the output signal from the D/A converter, from the input analog signal; and an amplifier for amplifying the output signal from the subtracter. The A/D converting device has a configuration wherein the signal conversion units are arrayed in multiple rows and columns. This allows the user to realize an A/D converting device having various types and levels of performance by making various combinations of the signal conversion units without change of the layout of the signal conversion units.
摘要翻译：本发明提供广泛通用的A / D转换装置。 A / D转换装置包括多个信号转换单元，每个信号转换单元包括：A / D转换器，用于将输入的模拟信号转换成具有预定位数的数字信号; 用于将来自A / D转换器的输出转换为模拟信号的D / A转换器; 用于从输入模拟信号中减去D / A转换器的输出信号的减法器; 以及用于放大来自减法器的输出信号的放大器。 A / D转换装置具有其中信号转换单元以多行和列排列的配置。这允许用户通过进行信号转换单元的各种组合而不改变信号转换单元的布局来实现具有各种类型和级别的性能的A / D转换装置。

16. 发明申请

US20060012506A1 Analog-to-digital converter cyclically repeating AD conversion 有权
标题翻译：模数转换器循环重复AD转换
公开(公告)号：US20060012506A1
公开(公告)日：2006-01-19
申请号：US11206907
申请日：2005-08-19
申请人： Atsushi Wada , Shigeto Kobayashi , Kuniyuki Tani
发明人： Atsushi Wada , Shigeto Kobayashi , Kuniyuki Tani
IPC分类号： H03M1/12
CPC分类号： H03M1/167 , H03M1/162
摘要： An AD converter capable of achieving both an improved processing speed and a reduced circuit area in good balance. The AD converter pipelines analog-to-digital conversion by using a two-stage configuration consisting of a first conversion unit, or the prior stage, and a second conversion unit, or the subsequent stage. The first conversion unit is a conversion unit of noncyclic type. The second conversion unit is a conversion unit of cyclic type. The second conversion unit is given a conversion processing speed higher than that of the first conversion unit so that the second conversion unit performs cyclic processing twice while the first conversion unit performs conversion processing once.
摘要翻译： AD转换器能够以良好的平衡实现提高的处理速度和减小的电路面积。 AD转换器通过使用由第一转换单元或前一级以及第二转换单元或后续级组成的两级配置来管线模数转换。第一转换单元是非循环型转换单元。第二转换单元是循环型转换单元。给予第二转换单元的转换处理速度高于第一转换单元的转换处理速度，使得第二转换单元在第一转换单元执行转换处理一次的同时进行两次循环处理。

17. 发明授权

US06977604B2 Analog-to-digital converter cyclically repeating AD conversion 有权
标题翻译：模数转换器循环重复AD转换
公开(公告)号：US06977604B2
公开(公告)日：2005-12-20
申请号：US10950569
申请日：2004-09-28
申请人： Atsushi Wada , Shigeto Kobayashi , Kuniyuki Tani
发明人： Atsushi Wada , Shigeto Kobayashi , Kuniyuki Tani
IPC分类号： H03M1/44 , H03M1/14 , H03M1/16 , H03M1/12
CPC分类号： H03M1/167 , H03M1/162
摘要： An AD converter capable of achieving both an improved processing speed and a reduced circuit area in good balance. The AD converter pipelines analog-to-digital conversion by using a two-stage configuration consisting of a first conversion unit, or the prior stage, and a second conversion unit, or the subsequent stage. The first conversion unit is a conversion unit of noncyclic type. The second conversion unit is a conversion unit of cyclic type. The second conversion unit is given a conversion processing speed higher than that of the first conversion unit so that the second conversion unit performs cyclic processing twice while the first conversion unit performs conversion processing once.
摘要翻译： AD转换器能够以良好的平衡实现提高的处理速度和减小的电路面积。 AD转换器通过使用由第一转换单元或前一级以及第二转换单元或后续级组成的两级配置来管线模数转换。第一转换单元是非循环型转换单元。第二转换单元是循环型转换单元。给予第二转换单元的转换处理速度高于第一转换单元的转换处理速度，使得第二转换单元在第一转换单元执行转换处理一次的同时进行两次循环处理。

18. 发明申请

US20050237234A1 Analog-digital converter with gain adjustment for high-speed operation 有权
标题翻译：具有增益调节功能的模数转换器，用于高速运行
公开(公告)号：US20050237234A1
公开(公告)日：2005-10-27
申请号：US11049081
申请日：2005-02-03
申请人： Shigeto Kobayashi , Kuniyuki Tani , Atsushi Wada , Noriaki Kojima
发明人： Shigeto Kobayashi , Kuniyuki Tani , Atsushi Wada , Noriaki Kojima
IPC分类号： H03F1/00 , H03M1/12 , H03M1/14 , H03M1/16
CPC分类号： H03M1/167 , H03M1/14 , H03M1/162
摘要： An input analog signal is fed to an amplifier circuit and an AD converter circuit. The AD converter circuit converts the input analog signal into a digital value of a predetermined number of bits, and outputs the digital value to an encoder (not shown) A DA converter circuit converts the digital value of a predetermined number of bits output from the AD converter circuit into an analog signal. The amplifier circuit samples and amplifies the input analog signal by a factor of α (greater than 1). A subtracter circuit subtracts an output of the DA converter circuit amplified by a factor of α from an output of the amplifier circuit.
摘要翻译：输入模拟信号被馈送到放大器电路和AD转换器电路。 AD转换器电路将输入模拟信号转换成预定位数的数字值，并将数字值输出到编码器（未示出）.ADA转换电路将从AD输出的预定位数的数字值转换转换器电路转换为模拟信号。放大器电路以α（大于1）的因子对输入的模拟信号进行采样和放大。减法电路从放大器电路的输出中减去放大了α因子的DA转换器电路的输出。

19. 发明申请

US20050219100A1 GAIN CONTROL FOR ANALOG-DIGITAL CONVERTER 有权
标题翻译：模拟数字转换器的增益控制
公开(公告)号：US20050219100A1
公开(公告)日：2005-10-06
申请号：US11072297
申请日：2005-03-07
申请人： Shigeto Kobayashi , Kuniyuki Tani , Atsushi Wada
发明人： Shigeto Kobayashi , Kuniyuki Tani , Atsushi Wada
IPC分类号： H03M1/44 , H03M1/00 , H03M1/16
CPC分类号： H03M1/167
摘要： A first amplifier circuit samples and amplifies an input analog signal by a gain of 0.8 and outputs the amplified signal to a first subtracter circuit. A first analog-digital converter circuit converts the input analog signal into a digital value so as to retrieve the higher 4 bits. A first digital-analog converter circuit converts the digital value produced by conversion by the first analog-digital converter circuit into an analog value. The first subtracter circuit subtracts an output analog signal from the first digital-analog converter circuit from an output analog signal from the first amplifier circuit. The output analog signal from the first digital-analog converter circuit is amplified by a gain of 0.8. By setting the gain of the first amplifier circuit to be below 1, an input voltage range is extended.
摘要翻译：第一放大器电路以0.8的增益对输入的模拟信号进行采样和放大，并将放大的信号输出到第一减法器电路。第一模拟数字转换器电路将输入的模拟信号转换为数字值，以便检索较高的4位。第一数模转换器电路将由第一模数转换器电路的转换产生的数字值转换为模拟值。第一减法器电路从第一放大电路的输出模拟信号中减去来自第一数模转换器电路的输出模拟信号。来自第一数模转换器电路的输出模拟信号以0.8的增益放大。通过将第一放大器电路的增益设置为低于1，可以延长输入电压范围。

20. 发明申请

US20050200512A1 Analog-to-digital converter including a plurality of amplifier circuits 有权
标题翻译：模数转换器包括多个放大器电路
公开(公告)号：US20050200512A1
公开(公告)日：2005-09-15
申请号：US11066498
申请日：2005-02-28
申请人： Kuniyuki Tani , Atsushi Wada , Shigeto Kobayashi
发明人： Kuniyuki Tani , Atsushi Wada , Shigeto Kobayashi
IPC分类号： H03F1/00 , H03M1/12 , H03M1/14
CPC分类号： H03M1/08 , H03F3/45183 , H03F3/45475 , H03F2203/45514 , H03F2203/45551 , H03M1/164
摘要： An AD converter includes therein a plurality of amplifier circuits such as first to fourth amplifier circuits. Among the plurality of amplifier circuits an amplifier circuit that requires higher accuracy is placed nearer to a power source. An amplifier circuit that receives the first input of an input analog signal is placed nearest to the power source. That is, the first amplifier circuit in the embodiment is disposed closest to the power source. The amplifier circuit that receives the first input of an input analog signal is disposed closest to the power source compared to the other amplifier circuits. The first amplifier circuit, the second amplifier circuit, the third amplifier circuit and the fourth amplifier circuit in the embodiment are placed in this order of how close to the power source.
摘要翻译： AD转换器包括多个放大器电路，例如第一至第四放大器电路。在多个放大器电路中，需要更高精度的放大器电路被放置得更靠近电源。接收输入模拟信号的第一输入的放大器电路被放置在最靠近电源的位置。也就是说，本实施例中的第一放大器电路设置成最靠近电源。接收输入模拟信号的第一输入的放大器电路与其他放大器电路相比最靠近电源设置。本实施例中的第一放大器电路，第二放大器电路，第三放大器电路和第四放大器电路以与电源接近的顺序放置。

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