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11. 发明授权

US09478277B1 Tri-level-cell DRAM and sense amplifier with alternating offset voltage 有权
标题翻译：具有交替偏置电压的三电平单元DRAM和读出放大器
公开(公告)号：US09478277B1
公开(公告)日：2016-10-25
申请号：US14844003
申请日：2015-09-03
申请人： Bo Liu
发明人： Bo Liu
IPC分类号： G11C11/401 , G11C11/4096 , G11C11/56
CPC分类号： G11C11/4096 , G11C7/02 , G11C7/065 , G11C7/08 , G11C11/4091 , G11C11/4094 , G11C11/4099 , G11C11/565 , G11C16/10 , G11C16/30 , G11C2211/5634
摘要： Tri-level-cell dynamic random access memory (DRAM) stores 3 levels of voltage (0, VDD/2, VDD) into a plurality of memory cells. Selected memory cell connected to bitline (BLT) to develop signal voltage, and adjacent reference bitline (BLR) develops reference voltage at VDD/2. An asymmetrical sensing amplifier (ASA), which has alternative positive offset and negative offset, is used to sense signal voltage and reference voltage for both their difference and sameness. ASA control signals, A and B, switch at different timing points or at different voltage level or the combination of both to have offset voltage set at either positive or negative polarity. Two consecutive read out from one ASA or one single read out from two ASA can be implemented to read memory cells data to local IOs. Output from ASA will be used to restore voltage back to the accessed memory cells.
摘要翻译：三电平单元动态随机存取存储器（DRAM）将3级电压（0，VDD / 2，VDD）存储到多个存储单元中。连接到位线（BLT）的选定存储单元产生信号电压，并且相邻的参考位线（BLR）产生VDD / 2的参考电压。具有替代正偏移和负偏移的不对称感测放大器（ASA）用于检测信号电压和参考电压两者的差异和相同性。 ASA控制信号A和B在不同的定时点或不同的电压电平下进行切换，或者两者的组合使偏移电压设置为正或负极性。可以实现从一个ASA或两个ASA读取的两个连续读出，以将内存单元数据读取到本地IO。来自ASA的输出将用于将电压恢复到访问的存储单元。

12. 发明授权

US09334583B2 Method of preventing auto-doping during epitaxial layer growth by cleaning the reaction chamber with hydrogen chloride 有权
标题翻译：通过用氯化氢清洗反应室来防止外延层生长期间的自掺杂的方法
公开(公告)号：US09334583B2
公开(公告)日：2016-05-10
申请号：US13202944
申请日：2011-06-27
申请人： Chao Zhang , Zhitang Song , Xudong Wan , Bo Liu , Guanping Wu , Ting Zhang , Zuoya Yang , Zhifeng Xie
发明人： Chao Zhang , Zhitang Song , Xudong Wan , Bo Liu , Guanping Wu , Ting Zhang , Zuoya Yang , Zhifeng Xie
IPC分类号： C30B25/02 , C30B25/18 , C30B29/06 , C30B23/02 , H01L21/02
CPC分类号： C30B25/186 , C30B23/025 , C30B25/02 , C30B29/06 , H01L21/02381 , H01L21/02532 , H01L21/02576 , H01L21/0262 , H01L21/02661
摘要： An epitaxial growth method for preventing auto-doping effect is presented. This method starts with the removal of impurities from the semiconductor substrate and the reaction chamber to be used. Then the semiconductor substrate is loaded in the cleaned reaction chamber to be pre-baked under vacuum conditions before the extraction of the dopant atoms desorbed from the surface of the semiconductor substrate. Next, under high temperature and low gas flow conditions, a first intrinsic epitaxial layer is formed on the surface of said semiconductor substrate. Following this, under low temperature and high gas flow conditions, a second epitaxial layer of required thickness is formed on the structural surface of the grown intrinsic epitaxial layer. Last, silicon wafer is unloaded after cooling. This method can prevent auto-doping effect during the epitaxial growth on semiconductor substrate and thus ensure the performance and enhance the reliability of the devices in peripheral circuit region.
摘要翻译：提出了一种防止自动掺杂效应的外延生长方法。该方法首先从要使用的半导体衬底和反应室中除去杂质。然后，在从半导体衬底的表面脱离的掺杂剂原子的提取之前，将半导体衬底装载在清洁的反应室中，以在真空条件下预烘烤。接下来，在高温低气流条件下，在所述半导体衬底的表面上形成第一本征外延层。接下来，在低温和高气体流动条件下，在生长的本征外延层的结构表面上形成所需厚度的第二外延层。最后，冷却后硅片卸载。该方法可以防止在半导体衬底上的外延生长期间的自掺杂效应，从而确保外围电路区域中器件的性能和可靠性。

13. 发明申请

US20150146322A1 DATA STORAGE DEVICE 有权
标题翻译：数据存储设备
公开(公告)号：US20150146322A1
公开(公告)日：2015-05-28
申请号：US14342111
申请日：2012-08-31
申请人： Chao Bi , Kui Cai , Kheong Sann Chan , Zhi Yong Ching , Moulay Rachid Elidrissi , Guchang Han , Zhimin He , Phyu Hla Nu , Jiang Feng Hu , Wei Hua , Quan Jiang , Siang Huei Leong , Wuzhong Lin , Bo Liu , Yansheng Ma , Chun Lian Ong , Jianzhong Shi , Cheng Su Soh , Sufui Sophia Tan , Li Wang , Chiew Leong Wong , Weiya Xi , Khai Leong Yong , Shengkai Yu , Yin Quan Yu , Zhimin Yuan , Jing Liang Zhang , Tiejun Zhou , Pantelis Alexopoulos , Budi Santoso , Qide Zhang , Kannan Sundaravadivelu , Ningyu Liu , Jianqiang Mou , Chong Wee Lee , Ke Gan , Boon Long Ibrahim See , Leonard Gonzaga , Wee Kiat Lim , Mengjun Liu , Venkataramanan Venkatakrishnan , Cheng Peng Tan
发明人： Chao Bi , Kui Cai , Kheong Sann Chan , Zhi Yong Ching , Moulay Rachid Elidrissi , Guchang Han , Zhimin He , Phyu Hla Nu , Jiang Feng Hu , Wei Hua , Quan Jiang , Siang Huei Leong , Wuzhong Lin , Bo Liu , Yansheng Ma , Chun Lian Ong , Jianzhong Shi , Cheng Su Soh , Sufui Sophia Tan , Li Wang , Chiew Leong Wong , Weiya Xi , Khai Leong Yong , Shengkai Yu , Yin Quan Yu , Zhimin Yuan , Jing Liang Zhang , Tiejun Zhou , Pantelis Alexopoulos , Budi Santoso , Qide Zhang , Kannan Sundaravadivelu , Ningyu Liu , Jianqiang Mou , Chong Wee Lee , Ke Gan , Boon Long Ibrahim See , Leonard Gonzaga , Wee Kiat Lim , Mengjun Liu , Venkataramanan Venkatakrishnan , Cheng Peng Tan
IPC分类号： G11B19/20
CPC分类号： G11B19/2009 , G11B19/20 , G11B27/324 , G11B2220/235 , G11B2220/2516 , H02K3/26
摘要： According to an embodiment of the present invention, a data storage device comprising a motor having a stator is disclosed. The stator may include a substrate having a first surface and a second surface opposite to the first surface; and a n-phase winding arrangement having n phase windings; wherein each phase winding comprises m flat fractional-pitch coils arranged on the first surface of the substrate such that the coils are spaced apart uniformly along a closed loop and connected in series; wherein each coil together with an angular section of the substrate between the coil and an adjacent coil of the same phase winding defines a stator pole-pair; and wherein m is an integer larger than 1.
摘要翻译：根据本发明的实施例，公开了一种包括具有定子的电动机的数据存储装置。定子可以包括具有第一表面和与第一表面相对的第二表面的基底; 以及具有n相绕组的n相绕组装置; 其中每个相绕组包括布置在基板的第一表面上的m个扁平分数节距线圈，使得线圈沿着闭环均匀间隔并串联连接; 其中每个线圈与所述线圈与相同相绕组的相邻线圈之间的所述衬底的角部分一起限定了定子极对; 并且其中m是大于1的整数。

14. 发明授权

US08792211B2 Method and data storage device for laser free heat-assisted magnetic recording 有权
标题翻译：无激光热辅助磁记录方法和数据存储装置
公开(公告)号：US08792211B2
公开(公告)日：2014-07-29
申请号：US13977639
申请日：2010-12-31
申请人： Zhimin Yuan , Bo Liu , Boon Hao Low , Tiejun Zhou , Siang Huei Leong , Mingsheng Zhang
发明人： Zhimin Yuan , Bo Liu , Boon Hao Low , Tiejun Zhou , Siang Huei Leong , Mingsheng Zhang
IPC分类号： G11B5/127
CPC分类号： G11B5/127 , G11B5/314 , G11B2005/0021
摘要： A data storage device with a heat assisted magnetic recording (HAMR) system, a magnetic recording medium, and method for data storage are provided. The data storage device includes a magnetic recording medium, a magnetic recording head, a power supply, a controller and a switching device. The magnetic recording head includes a main pole having a surface area facing the magnetic recording medium. The controller is coupled to the magnetic recording head for controlling writing information to and reading information from the magnetic recording medium. The switching device electrically couples the power supply between the main pole and the magnetic recording medium in response to a signal provided from the controller when writing information to the magnetic recording medium. The magnetic recording medium comprises a plurality of layers, including a heating layer, a field enhanced conduction layer, and an electrode layer. The electrode layer is electrically coupleable to the power supply and the magnetic recording head for heating a portion of the heating layer opposite the magnetic recording head during writing of data by the magnetic recording head to the magnetic recording medium, the portion of the heating layer defined by an electric field applied to the field enhanced conduction layer.
摘要翻译：提供具有热辅助磁记录（HAMR）系统，磁记录介质和数据存储方法的数据存储装置。数据存储装置包括磁记录介质，磁记录头，电源，控制器和开关装置。磁记录头包括具有面向磁记录介质的表面积的主极。控制器耦合到磁记录头，用于控制向磁记录介质写入信息和从磁记录介质读取信息。当将信息写入磁记录介质时，开关装置响应于从控制器提供的信号，在主极和磁记录介质之间电耦合电源。磁记录介质包括多个层，包括加热层，场增强传导层和电极层。所述电极层电耦合到所述电源和所述磁记录头，用于在由所述磁记录头向所述磁记录介质写入数据期间加热与所述磁记录头相对的所述加热层的一部分，所述加热层的所述部分被限定通过施加到场增强导电层的电场。

15. 发明授权

US08753554B2 Pelletized low molecular weight brominated aromatic polymer compositions 失效
标题翻译：粒状低分子量溴化芳族聚合物组合物
公开(公告)号：US08753554B2
公开(公告)日：2014-06-17
申请号：US13264292
申请日：2010-04-29
申请人： Govindarajulu Kumar , William J. Layman, Jr. , Bo Liu , Douglas W. Luther , Arthur G. Mack
发明人： Govindarajulu Kumar , William J. Layman, Jr. , Bo Liu , Douglas W. Luther , Arthur G. Mack
IPC分类号： C09K21/00 , C08J7/00 , C07C22/00
CPC分类号： C08K5/03 , C08F8/22 , C08F12/08
摘要： Novel polymer compositions of specified formula are converted into pellets of this invention by process technology provided by this invention. By forming a binder free melt of a polymer of such polymer compositions, and converting the melt into pellets as described here-in, pellets can be formed produce during production, handling, and use, no more than acceptably small amounts of “fines” or air-entrainable dusts.
摘要翻译：通过本发明提供的工艺技术将具有特定配方的新型聚合物组合物转化为本发明的颗粒。通过形成这种聚合物组合物的聚合物的无粘合剂熔体，并且如本文所述将熔体转化成颗粒，可以在生产，处理和使用期间形成颗粒，不超过可接受的少量“细粉”或空气夹带粉尘。

16. 发明授权

US08681548B2 Column redundancy circuitry for non-volatile memory 有权
标题翻译：用于非易失性存储器的列冗余电路
公开(公告)号：US08681548B2
公开(公告)日：2014-03-25
申请号：US13463422
申请日：2012-05-03
申请人： Bo Liu , Frank Wanfang Tsai , Jongmin Park , Yan Li
发明人： Bo Liu , Frank Wanfang Tsai , Jongmin Park , Yan Li
IPC分类号： G11C16/06 , G11C8/00 , G11C8/18
CPC分类号： G11C29/848 , G11C7/1036 , G11C8/04 , G11C29/78
摘要： In a non-volatile memory circuit, techniques are presented so that bad columns can be ignored and/or replaced during memory data input and output operations. A column redundant circuit for this purpose reduces circuit size and improves performance. User data is grouped in an interleaved manner so that data belonging to consecutive logical address will be distributed into different physical locations. For example, all column data can be physically grouped into, say, 5 divisions and user data can be written into or accessed from one division after another consecutively. Each division has its own clock control. The column redundancy block can generate bad column locations' information and send it to control logic to switch the user clock to a different division clock, thereby skipping bad columns. By controlling the clocks for different columns, the user can directly access good columns without touching bad columns.
摘要翻译：在非易失性存储器电路中，呈现技术，使得在存储器数据输入和输出操作期间可以忽略和/或替换坏列。用于此目的的列冗余电路可减少电路尺寸并提高性能。用户数据以交错方式分组，使得属于连续逻辑地址的数据将被分配到不同的物理位置。例如，所有列数据可以被物理地分组成5个部分，并且用户数据可以被连续地从一个部门写入或访问。每个部门都有自己的时钟控制。列冗余块可以产生错误的列位置信息，并将其发送到控制逻辑，以将用户时钟切换到不同的分频时钟，从而跳过不良列。通过控制不同列的时钟，用户可以直接访问好的列，而不会碰坏列。

17. 发明授权

US08633002B2 Microbial production of fatty alcohols 有权
标题翻译：微生物生产脂肪醇
公开(公告)号：US08633002B2
公开(公告)日：2014-01-21
申请号：US12854848
申请日：2010-08-11
申请人： Paul G. Roessler , Kevin Watts , Bo Liu
发明人： Paul G. Roessler , Kevin Watts , Bo Liu
IPC分类号： C12P7/02 , C12P7/00
CPC分类号： C12P7/04 , C12N9/0008 , C12N9/001
摘要： Genes and strains of recombinant microorganisms are provided that are engineered to produce fatty alcohols and fatty alcohol derivatives. The organisms can include one, two, three or more transgenes that direct the biosynthesis of one or more fatty alcohols or derivatives. Methods of producing fatty alcohols using transgenic microorganisms are also provided.
摘要翻译：提供重组微生物的基因和菌株，其被工程化以产生脂肪醇和脂肪醇衍生物。生物体可以包括一种，两种，三种或更多种转导子，其指导一种或多种脂肪醇或衍生物的生物合成。还提供了使用转基因微生物生产脂肪醇的方法。

18. 发明授权

US08616922B2 Audio jack connector 失效
标题翻译：音频插孔连接器
公开(公告)号：US08616922B2
公开(公告)日：2013-12-31
申请号：US13405232
申请日：2012-02-24
申请人： Bo Liu , Rui-Bo Zhan
发明人： Bo Liu , Rui-Bo Zhan
IPC分类号： H01R24/04
CPC分类号： H01R12/57 , H01R24/58
摘要： An audio jack connector adapted for soldering on a circuit board and engaging with an audio plug connector includes an insulating housing and a plurality of terminals. The insulating housing has a main body, and an insertion portion connecting with one side of the main body. The insertion portion defines an insertion hole for receiving the audio plug connector therein. The main body defines a plurality of terminal grooves with bottoms thereof passing through a bottom surface of the main body. The insulating housing defines a plurality of mouths communicating between the insertion hole and the terminal grooves. The terminals are disposed in the terminal grooves. Each terminal has a contact portion projecting into the insertion hole through the mouth to electrically contact with the audio plug connector, and a soldering portion received in the bottom of the terminal groove to be soldered on the circuit board.
摘要翻译：适于焊接在电路板上并与音频插头连接件相配合的音频插孔连接器包括绝缘壳体和多个端子。绝缘壳体具有主体和与主体的一侧连接的插入部。插入部分限定用于在其中接收音频插头连接器的插入孔。主体限定多个端子槽，其底部通过主体的底面。绝缘壳体限定了在插入孔和端子槽之间连通的多个口。端子设置在端子槽中。每个端子具有通过口突出到插入孔中的接触部分，以与音频插头连接器电接触，以及接收在待焊接在电路板上的端子槽的底部的焊接部分。

19. 发明授权

US08586594B2 Inhibitors of diacylglycerol O-acyltransferase type 1 enzyme 失效
标题翻译：二酰基甘油的抑制剂O-酰基转移酶1型酶
公开(公告)号：US08586594B2
公开(公告)日：2013-11-19
申请号：US13484539
申请日：2012-05-31
申请人： Andrew J. Souers , Ju Gao , Todd M. Hansen , Rajesh R. Iyengar , Philip R. Kym , Bo Liu , Zhonghua Pei , Vince S. Yeh , Gang Zhao , Zhili Xin
发明人： Andrew J. Souers , Ju Gao , Todd M. Hansen , Rajesh R. Iyengar , Philip R. Kym , Bo Liu , Zhonghua Pei , Vince S. Yeh , Gang Zhao , Zhili Xin
IPC分类号： A61K31/519 , A61P3/04 , A61P3/10 , A61K31/4152 , C07D487/04 , C07D231/20
CPC分类号： C07D487/04 , C07C59/54 , C07C275/42 , C07D211/60 , C07D231/12 , C07D231/20 , C07D249/08 , C07D263/48 , C07D277/40 , C07D401/04 , C07D407/12 , C07D407/14 , C07D413/12 , C07D413/14
摘要： Compounds of formula (I), or a pharmaceutically acceptable salt, prodrug, salt of a prodrug, or a combination thereof. Pharmaceutical compositions of formula (I) and related methods for treating or preventing metabolic diseases or conditions.
摘要翻译：式（I）化合物或其药学上可接受的盐，前药，前药的盐或其组合。式（I）的药物组合物和治疗或预防代谢疾病或病症的相关方法。

20. 发明申请

US20130294162A1 Column Redundancy Circuitry for Non-Volatile Memory 有权
标题翻译：非易失性存储器的列冗余电路
公开(公告)号：US20130294162A1
公开(公告)日：2013-11-07
申请号：US13463422
申请日：2012-05-03
申请人： Bo Liu , Frank Wanfang Tsai , Jongmin Park , Yan Li
发明人： Bo Liu , Frank Wanfang Tsai , Jongmin Park , Yan Li
IPC分类号： G11C16/06
CPC分类号： G11C29/848 , G11C7/1036 , G11C8/04 , G11C29/78
摘要： In a non-volatile memory circuit, techniques are presented so that bad columns can be ignored and/or replaced during memory data input and output operations. A column redundant circuit for this purpose reduces circuit size and improves performance. User data is grouped in an interleaved manner so that data belonging to consecutive logical address will be distributed into different physical locations. For example, all column data can be physically grouped into, say, 5 divisions and user data can be written into or accessed from one division after another consecutively. Each division has its own clock control. The column redundancy block can generate bad column locations' information and send it to control logic to switch the user clock to a different division clock, thereby skipping bad columns. By controlling the clocks for different columns, the user can directly access good columns without touching bad columns.
摘要翻译：在非易失性存储器电路中，呈现技术，使得在存储器数据输入和输出操作期间可以忽略和/或替换坏列。用于此目的的列冗余电路可减少电路尺寸并提高性能。用户数据以交错方式分组，使得属于连续逻辑地址的数据将被分配到不同的物理位置。例如，所有列数据可以被物理地分组成5个部分，并且用户数据可以被连续地从一个部门写入或访问。每个部门都有自己的时钟控制。列冗余块可以产生错误的列位置信息，并将其发送到控制逻辑，以将用户时钟切换到不同的分频时钟，从而跳过不良列。通过控制不同列的时钟，用户可以直接访问好的列，而不会碰坏列。

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