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11. 发明授权

US07643753B2 Enhanced passive optical network (PON) processor 有权
标题翻译：增强型无源光网络（PON）处理器
公开(公告)号：US07643753B2
公开(公告)日：2010-01-05
申请号：US11238022
申请日：2005-09-29
申请人： Eliezer Weitz , Gil Levy , David Avishai , Eli Elmoalem , Moti Kurnick , Gal Sitton
发明人： Eliezer Weitz , Gil Levy , David Avishai , Eli Elmoalem , Moti Kurnick , Gal Sitton
IPC分类号： H04J14/00
CPC分类号： H04L49/9094 , H04L49/90 , H04L49/9073 , H04Q11/0067 , H04Q11/0071
摘要： An enhanced passive optical network (PON) processor adapted to serve a plurality of PON applications is disclosed. The PON processor is a highly integrated communications processor that can operate in different PON modes including, but not limited to, a gigabit PON (GPON), a broadband PON (BPON), an Ethernet PON (EPON), or any combination thereof. In an embodiment of the present invention the provided PON is fabricated on a single integrated circuit (IC).
摘要翻译：公开了一种适用于服务多个PON应用的增强型无源光网络（PON）处理器。 PON处理器是可以在不同PON模式下工作的高度集成的通信处理器，包括但不限于千兆位PON（GPON），宽带PON（BPON），以太网PON（EPON）或其任何组合。在本发明的实施例中，所提供的PON被制造在单个集成电路（IC）上。

12. 发明申请

US20070070997A1 Enhanced passive optical network (PON) processor 有权
标题翻译：增强型无源光网络（PON）处理器
公开(公告)号：US20070070997A1
公开(公告)日：2007-03-29
申请号：US11238022
申请日：2005-09-29
申请人： Eliezer Weitz , Gil Levy , David Avishai , Eli Elmoalem , Moti Kurnick , Gal Sitton
发明人： Eliezer Weitz , Gil Levy , David Avishai , Eli Elmoalem , Moti Kurnick , Gal Sitton
IPC分类号： H04L12/56
CPC分类号： H04L49/9094 , H04L49/90 , H04L49/9073 , H04Q11/0067 , H04Q11/0071
摘要： An enhanced passive optical network (PON) processor adapted to serve a plurality of PON applications is disclosed. The PON processor is a highly integrated communications processor that can operate in different PON modes including, but not limited to, a gigabit PON (GPON), a broadband PON (BPON), an Ethernet PON (EPON), or any combination thereof. In an embodiment of the present invention the provided PON is fabricated on a single integrated circuit (IC).
摘要翻译：公开了一种适用于服务多个PON应用的增强型无源光网络（PON）处理器。 PON处理器是可以在不同PON模式下工作的高度集成的通信处理器，包括但不限于千兆位PON（GPON），宽带PON（BPON），以太网PON（EPON）或其任何组合。在本发明的实施例中，所提供的PON被制造在单个集成电路（IC）上。

13. 发明授权

US09209897B2 Adaptive forward error correction in passive optical networks 有权
标题翻译：无源光网络中的自适应前向纠错
公开(公告)号：US09209897B2
公开(公告)日：2015-12-08
申请号：US13331255
申请日：2011-12-20
申请人： Assaf Amitai , David Avishai , Eli Elmoalem
发明人： Assaf Amitai , David Avishai , Eli Elmoalem
IPC分类号： H04B10/079 , H04B10/50 , H04B10/272 , H04L1/00 , H04L1/20
CPC分类号： H04B10/07953 , H04B10/272 , H04B10/5055 , H04L1/0009 , H04L1/0025 , H04L1/20 , H04L2001/0093
摘要： A method for an adaptive forward error correction (FEC) in a passive optical network. The method comprises selecting an initial downstream FEC code to be applied on downstream data transmitted from an optical line terminal (OLT) to a plurality of optical network units (ONUs) of the PON; communicating the selected downstream FEC code to the plurality of ONUs; receiving at least one downstream bit error ratio (BER) value from at least one ONU of the plurality of ONUs, wherein the downstream BER value is measured respective to downstream data received at the at least one ONU; changing the selected downstream FEC code to a new downstream FEC code based on a plurality of downstream BER values measured by the at least one ONU; and communicating the new downstream FEC code to the plurality of ONUs.
摘要翻译：一种无源光网络中自适应前向纠错（FEC）的方法。该方法包括选择要应用于从光线路终端（OLT）发送到PON的多个光网络单元（ONU）的下行数据的初始下游FEC码; 将所选择的下游FEC码传送到所述多个ONU; 从所述多个ONU中的至少一个ONU接收至少一个下行误码率（BER）值，其中所述下行BER值被相应地测量在所述至少一个ONU处接收的下行数据; 基于由所述至少一个ONU测量的多个下游BER值，将所选择的下游FEC码改变为新的下行FEC码; 以及将所述新的下行FEC码传送到所述多个ONU。

14. 发明授权

US08555104B2 Frequency adapter utilized in high-speed internal buses 有权
标题翻译：频率适配器用于高速内部总线
公开(公告)号：US08555104B2
公开(公告)日：2013-10-08
申请号：US12686714
申请日：2010-01-13
申请人： Asaf Koren , David Avishai , Limor Yonatani , Yariv Aviram , Jacob Harel
发明人： Asaf Koren , David Avishai , Limor Yonatani , Yariv Aviram , Jacob Harel
IPC分类号： G06F1/04 , G06F13/14 , G06F13/36 , G06F15/00
CPC分类号： G06F5/06 , G06F1/12
摘要： A frequency adapter for synchronizing data transfers between a low-frequency module and a high-frequency module connected to an internal bus. The frequency adapter includes a low-to-high synchronization unit for synchronizing data transfers from the low frequency module to the high-frequency module, wherein the low-to-high synchronization unit is clocked by a low frequency clock; and a high-to-low synchronization unit for synchronizing data transfers from the high frequency module to the low-frequency module, wherein the high-to-low synchronization unit is clocked by a low frequency clock.
摘要翻译：一种频率适配器，用于在低频模块和连接到内部总线的高频模块之间进行数据传输。所述频率适配器包括用于同步从低频模块到高频模块的数据传输的低到高同步单元，其中所述低到高同步单元由低频时钟计时; 以及从高频模块到低频模块的数据传输同步的高到低的同步单元，其中由高频到低频的时钟来计时。

15. 发明申请

US20060282605A1 High-speed internal bus architecture for an integrated circuit 有权
标题翻译：用于集成电路的高速内部总线架构
公开(公告)号：US20060282605A1
公开(公告)日：2006-12-14
申请号：US11149553
申请日：2005-06-10
申请人： David Avishai , Eliezer Weitz , Yehiel Engel , Raanan Gewirtzman
发明人： David Avishai , Eliezer Weitz , Yehiel Engel , Raanan Gewirtzman
IPC分类号： G06F13/36
CPC分类号： G06F13/36 , G06F13/4059
摘要： An internal bus architecture capable of providing high speed inter-connection and inter-communication between modules connected in an integrated circuit such as an application specific integrated circuit (ASIC). The internal bus architecture includes multiple interface units for interfacing with the modules of the ASIC and at least one basic modular unit coupled to the interface units for allowing simultaneous data transfers between the interface units. Each of the basic modular units has an upload unit for transferring upstream data, and a download unit for transferring downstream data.
摘要翻译：内部总线架构，能够提供与集成电路（例如专用集成电路（ASIC））连接的模块之间的高速互连和互通。内部总线架构包括用于与ASIC的模块进行接口的多个接口单元和耦合到接口单元的至少一个基本模块单元，用于允许在接口单元之间同时进行数据传输。每个基本模块单元具有用于传送上游数据的上传单元和用于传送下游数据的下载单元。

16. 发明申请

US20110173481A1 FREQUENCY ADAPTER UTILIZED IN HIGH-SPEED INTERNAL BUSES 有权
标题翻译：频率适配器应用于高速内部总线
公开(公告)号：US20110173481A1
公开(公告)日：2011-07-14
申请号：US12686714
申请日：2010-01-13
申请人： Asaf Koren , David Avishai , Limor Yonatani , Yariv Aviram , Jacob Harel
发明人： Asaf Koren , David Avishai , Limor Yonatani , Yariv Aviram , Jacob Harel
IPC分类号： G06F1/04 , G06F13/42
CPC分类号： G06F5/06 , G06F1/12
摘要： A frequency adapter for synchronizing data transfers between a low-frequency module and a high-frequency module connected to an internal bus. The frequency adapter includes a low-to-high synchronization unit for synchronizing data transfers from the low frequency module to the high-frequency module, wherein the low-to-high synchronization unit is clocked by a low frequency clock; and a high-to-low synchronization unit for synchronizing data transfers from the high frequency module to the low-frequency module, wherein the high-to-low synchronization module is clocked by a low frequency clock.
摘要翻译：一种频率适配器，用于在低频模块和连接到内部总线的高频模块之间进行数据传输。所述频率适配器包括用于同步从低频模块到高频模块的数据传输的低到高同步单元，其中所述低到高同步单元由低频时钟计时; 以及用于同步从高频模块到低频模块的数据传输的高到低的同步单元，其中，从低到低的同步模块由低频时钟计时。

17. 发明申请

US20130156420A1 ADAPTIVE FORWARD ERROR CORRECTION IN PASSIVE OPTICAL NETWORKS 有权
标题翻译：被动光网络中的自适应前向纠错
公开(公告)号：US20130156420A1
公开(公告)日：2013-06-20
申请号：US13331255
申请日：2011-12-20
申请人： Assaf Amitai , David Avishai , Eli Elmoalem
发明人： Assaf Amitai , David Avishai , Eli Elmoalem
IPC分类号： H04B10/08
CPC分类号： H04B10/07953 , H04B10/272 , H04B10/5055 , H04L1/0009 , H04L1/0025 , H04L1/20 , H04L2001/0093
摘要： A method for an adaptive forward error correction (FEC) in a passive optical network. The method comprises selecting an initial downstream FEC code to be applied on downstream data transmitted from an optical line terminal (OLT) to a plurality of optical network units (ONUs) of the PON; communicating the selected downstream FEC code to the plurality of ONUs; receiving at least one downstream bit error ratio (BER) value from at least one ONU of the plurality of ONUs, wherein the downstream BER value is measured respective to downstream data received at the at least one ONU; changing the selected downstream FEC code to a new downstream FEC code based on a plurality of downstream BER values measured by the at least one ONU; and communicating the new downstream FEC code to the plurality of ONUs.
摘要翻译：一种无源光网络中自适应前向纠错（FEC）的方法。该方法包括选择要应用于从光线路终端（OLT）发送到PON的多个光网络单元（ONU）的下行数据的初始下游FEC码; 将所选择的下游FEC码传送到所述多个ONU; 从所述多个ONU中的至少一个ONU接收至少一个下行误码率（BER）值，其中所述下行BER值被相应地测量在所述至少一个ONU处接收的下行数据; 基于由所述至少一个ONU测量的多个下游BER值，将所选择的下游FEC码改变为新的下行FEC码; 以及将所述新的下行FEC码传送到所述多个ONU。

18. 发明授权

US07370127B2 High-speed internal bus architecture for an integrated circuit 有权
标题翻译：用于集成电路的高速内部总线架构
公开(公告)号：US07370127B2
公开(公告)日：2008-05-06
申请号：US11149553
申请日：2005-06-10
申请人： David Avishai , Eliezer Weitz , Yehiel Engel , Raanan Gewirtzman
发明人： David Avishai , Eliezer Weitz , Yehiel Engel , Raanan Gewirtzman
IPC分类号： G06F3/00
CPC分类号： G06F13/36 , G06F13/4059
摘要： An internal bus architecture capable of providing high speed inter-connection and inter-communication between modules connected in an integrated circuit such as an application specific integrated circuit (ASIC). The internal bus architecture includes multiple interface units for interfacing with the modules of the ASIC and at least one basic modular unit coupled to the interface units for allowing simultaneous data transfers between the interface units. Each of the basic modular units has an upload unit for transferring upstream data, and a download unit for transferring downstream data.
摘要翻译：内部总线架构，能够提供与集成电路（例如专用集成电路（ASIC））连接的模块之间的高速互连和互通。内部总线架构包括用于与ASIC的模块进行接口的多个接口单元和耦合到接口单元的至少一个基本模块单元，用于允许在接口单元之间同时进行数据传输。每个基本模块单元具有用于传送上游数据的上传单元和用于传送下游数据的下载单元。

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