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    • 12. 发明授权
    • Toggle based application specific core methodology
    • 基于应用的切换核心方法
    • US06237132B1
    • 2001-05-22
    • US09136126
    • 1998-08-18
    • Alvar A. DeanKenneth J. GoodnowScott W. GouldKenneth TorinoSebastian T. Ventrone
    • Alvar A. DeanKenneth J. GoodnowScott W. GouldKenneth TorinoSebastian T. Ventrone
    • G06F1750
    • G06F17/5045G06F17/5022
    • According to the present invention, an automated method to tailor an ASIC core to meet the needs of an individual system on a chip design is disclosed. The preferred method starts with a technology-independent hardware description language (HDL) representation of the core des i on. This high-level design is subdivided into functions, or blocks. Blocks which cannot be removed without impacting the integrity of the core design an are ta b y ed with “must-keep” indicators. The execution of all application code that will employ the core is simulated on the high-level model. The simulation process accumulates information about what blocks in the model are used by the application code, and which are unused, information about which blocks are unused is combined with information about what blocks are not removable. The high-level core design is then tailored by deleting blocks in the core design that are both unused and removable. The tailored high-level design is then synthesized to a technology-dependent core design. The synthesis process substitutes gates for the blocks, propagating must-keep tags to all gates substituted for a block tagged with a “must-keep” indicator. The simulation of all application code is repeated on the low-level design, and accumulates information about which gates are unused by the application code. The low-level design is then tailored by deleting Yates in the core that are both unused and removable.
    • 根据本发明,公开了一种定制ASIC核心以满足单个系统在芯片设计上的需要的自动化方法。 首选方法是以技术独立的硬件描述语言(HDL)表示为核心。 这个高级设计被细分为功能或块。 在不影响核心设计的完整性的情况下无法移除的块将使用“必须保留”指示器​​。 在高级模型上模拟使用核心的所有应用程序代码的执行。 模拟过程累积关于应用代码使用模型中哪些模块的信息,以及哪些未使用的,哪些块未被使用的信息与什么块不可移动的信息相结合。 然后通过删除核心设计中未使用和可移动的块来定制高级核心设计。 然后将量身定制的高级设计合成为依赖于技术的核心设计。 合成过程将门代替块,将必须保留标签传播到所有门,替代标有“必须”指示符的块。 在低级设计中重复所有应用代码的仿真,并通过应用代码累积关于哪些门未被使用的信息。 然后,通过在核心中删除既不使用也可拆卸的Yates来定制低级设计。
    • 20. 发明申请
    • SEMICONDUCTOR POWER DISTRIBUTION AND CONTROL SYSTEMS AND METHODS
    • 半导体功率分配与控制系统及方法
    • US20090273239A1
    • 2009-11-05
    • US12113999
    • 2008-05-02
    • Kenneth J. GoodnowStephen G. ShumaPeter A. Twombly
    • Kenneth J. GoodnowStephen G. ShumaPeter A. Twombly
    • H02J1/00
    • G06F1/26Y10T307/438
    • A system for dynamic integrated circuit power distribution and control is disclosed. The system includes an external power consumption target generator configured to generate a power dissipation target for one or more integrated circuits. The system also includes a first integrated circuit that includes an IC power control unit coupled to the external power consumption target generator. The first integrated circuit also includes a first plurality of functional units, each functional unit of the first plurality including a unit power level control and a first power control grid coupling the IC power control unit to one or more of the first plurality of functional units. The IC power control unit is configured to generate a mode control signal which places at least one of plurality of functional units into a first mode of operation based upon the power consumption target.
    • 公开了一种动态集成电路配电控制系统。 该系统包括被配置为产生一个或多个集成电路的功耗目标的外部功耗目标发生器。 该系统还包括第一集成电路,其包括耦合到外部功耗目标发生器的IC功率控制单元。 第一集成电路还包括第一多个功能单元,第一多个功能单元的每个功能单元包括单元功率电平控制和将IC功率控制单元耦合到第一多个功能单元中的一个或多个的第一功率控制网格。 IC功率控制单元被配置为基于功耗目标产生将多个功能单元中的至少一个功能单元置于第一操作模式的模式控制信号。