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11. 发明授权

US6085286A Cache control method and apparatus 失效
标题翻译：缓存控制方法和装置
公开(公告)号：US6085286A
公开(公告)日：2000-07-04
申请号：US217371
申请日：1998-12-21
申请人： Akira Yamamoto , Shigeo Homma , Yoshihiro Asaka , Yoshiaki Kuwahara , Akira Kurano , Masafumi Nozawa , Hiroyuki Kitajima
发明人： Akira Yamamoto , Shigeo Homma , Yoshihiro Asaka , Yoshiaki Kuwahara , Akira Kurano , Masafumi Nozawa , Hiroyuki Kitajima
IPC分类号： G06F3/06 , G06F12/08 , G06F13/00
CPC分类号： G06F12/0866
摘要： In an information processing system having a data processing apparatus, a control unit for a cache memory, and a storage unit for storing a record, respectively interconnected together, wherein when the control unit receives from the data processing apparatus a write request for a record to be written and if the record to be written is not being stored in the cache memory, the control unit receives a data to be written in the object record from the data processing apparatus and stores the received data in the cache memory. After notifying the data processing apparatus of a completion of a data write process, the control unit checks if the object record in which the data stored in the cache memory is being stored in the storage unit, if the object record is being stored in the storage unit, the data in the cache memory is written in the storage unit, and if not, the data in the cache memory is not written and such effect is notified to the data processing apparatus.
摘要翻译：在具有数据处理装置，高速缓冲存储器的控制单元和分别互连在一起的记录的存储单元的信息处理系统中，其中当控制单元从数据处理装置接收到对记录的写请求时，写入，并且如果要写入的记录未被存储在高速缓冲存储器中，则控制单元从数据处理装置接收要写入对象记录中的数据，并将接收到的数据存储在高速缓冲存储器中。在通知数据处理装置完成数据写入处理之后，如果对象记录被存储在存储单元中，则控制单元检查存储在存储单元中的存储在高速缓冲存储器中的数据的对象记录是否存储在存储单元中高速缓冲存储器中的数据被写入存储单元中，如果不存在，则高速缓冲存储器中的数据不被写入，并且将该效果通知给数据处理装置。

12. 发明授权

US4870565A Parallel transfer type director means 失效
标题翻译：并行传输型导向装置
公开(公告)号：US4870565A
公开(公告)日：1989-09-26
申请号：US322119
申请日：1989-03-13
申请人： Akira Yamamoto , Toru Nishigaki , Akira Kurano , Kiyoshi Hisano , Yoshiro Shiroyana
发明人： Akira Yamamoto , Toru Nishigaki , Akira Kurano , Kiyoshi Hisano , Yoshiro Shiroyana
IPC分类号： G06F13/10 , G06F12/08 , G06F13/12
CPC分类号： G06F13/122 , G06F12/0866 , G06F12/0862
摘要： A computer system having a disk cache unit between a disk unit and the main storage unit. Ordinarily, the data transfer processing is carried out between the disk unit and the disk cache unit and between the disk cache unit and the main storage unit in this case. The present invention is characterized by enabling these two data transfer operations to be executed in parallel and to prevent a director from becoming the bottleneck of the processing due to the concentrated processing requests. For this purpose, the present invention provides for conducting a data transfer between the disk cache unit and a disk unit while a data transfer is taking place between the main storage unit and the disk cache unit. The director is configured, for example, with two data transfer controlling systems and two data transfer units for carrying out data transfer according to instructions for the two data transfer controlling systems.
摘要翻译：一种在盘单元和主存储单元之间具有盘缓存单元的计算机系统。通常，在这种情况下，在盘单元和盘缓存单元之间以及盘高速缓存单元和主存储单元之间执行数据传送处理。本发明的特征在于能够并行地执行这两个数据传送操作，并且防止由于集中的处理请求导致控制器成为处理的瓶颈。为此，本发明提供了在主存储单元和磁盘高速缓存单元之间进行数据传输的同时，在磁盘高速缓存单元和磁盘单元之间进行数据传送。导向器例如配置有两个数据传输控制系统和两个用于根据两个数据传输控制系统的指令执行数据传输的数据传输单元。

13. 发明授权

US5253351A Memory controller with a cache memory and control method of cache memory including steps of determining memory access threshold values 失效
标题翻译：具有高速缓冲存储器的存储器控制器和高速缓冲存储器的控制方法，包括确定存储器访问阈值的步
公开(公告)号：US5253351A
公开(公告)日：1993-10-12
申请号：US390832
申请日：1989-08-08
申请人： Akira Yamamoto , Toshiaki Tsuboi , Shigeo Honma , Hiroyuki Kitajima , Akira Kurano , Masafumi Nozawa , Katsunori Nakamura , Kosaku Kambayashi , Toshio Nakano , Yoshiro Shiroyanagi
发明人： Akira Yamamoto , Toshiaki Tsuboi , Shigeo Honma , Hiroyuki Kitajima , Akira Kurano , Masafumi Nozawa , Katsunori Nakamura , Kosaku Kambayashi , Toshio Nakano , Yoshiro Shiroyanagi
IPC分类号： G06F12/08 , G06F12/02
CPC分类号： G06F12/0866 , G06F12/0862 , G06F2212/6026
摘要： In a control unit having a external storage device, a method for selecting a loading method of data stored in the cache memory into the cache memory in accordance with an access pattern to the data, and an apparatus therefor are disclosed. The selection of the loading method is selection of control mode or procedure in accordance with the loading method, and it is attained by a learn function.

14. 发明授权

US5694576A Cache control by adding record identification information to partial write request 失效
标题翻译：通过将记录标识信息添加到部分写入请求中进行缓存控制
公开(公告)号：US5694576A
公开(公告)日：1997-12-02
申请号：US530711
申请日：1995-09-19
申请人： Akira Yamamoto , Shigeo Homma , Yoshihiro Asaka , Yoshiaki Kuwahara , Akira Kurano , Masafumi Nozawa , Hiroyuki Kitajima
发明人： Akira Yamamoto , Shigeo Homma , Yoshihiro Asaka , Yoshiaki Kuwahara , Akira Kurano , Masafumi Nozawa , Hiroyuki Kitajima
IPC分类号： G06F3/06 , G06F12/08 , G06F12/12
CPC分类号： G06F12/0866
摘要： In an information processing system having a data processing apparatus, a control unit for a cache memory, and a storage unit for storing a record, respectively interconnected together, wherein when the control unit receives from the data processing apparatus a write request for a record to be written and if the record to be written is not being stored in the cache memory, the control unit receives a data to be written in the object record from the data processing apparatus and stores the received data in the cache memory. After notifying the data processing apparatus of a completion of a data write process, the control unit checks if the object record in which the data stored in the cache memory is being stored in the storage unit, if the object record is being stored in the storage unit, the data in the cache memory is written in the storage unit, and if not, the data in the cache memory is not written and such effect is notified to the data processing apparatus.
摘要翻译：在具有数据处理装置，高速缓冲存储器的控制单元和分别互连在一起的记录的存储单元的信息处理系统中，其中当控制单元从数据处理装置接收到对记录的写请求时，写入，并且如果要写入的记录未被存储在高速缓冲存储器中，则控制单元从数据处理装置接收要写入对象记录中的数据，并将接收到的数据存储在高速缓冲存储器中。在通知数据处理装置完成数据写入处理之后，如果对象记录被存储在存储单元中，则控制单元检查存储在存储单元中的存储在高速缓冲存储器中的数据的对象记录是否存储在存储单元中高速缓冲存储器中的数据被写入存储单元中，如果不存在，则高速缓冲存储器中的数据不被写入，并且将该效果通知给数据处理装置。

15. 发明授权

US5187778A Buffered disk unit and method of transferring data therein 失效
标题翻译：缓冲盘单元和传输数据的方法
公开(公告)号：US5187778A
公开(公告)日：1993-02-16
申请号：US579718
申请日：1990-09-10
申请人： Akira Yamamoto , Hiroyuki Kitajima , Akira Kurano , Michio Miyazaki , Masafumi Nozawa , Takikazu Takeuchi
发明人： Akira Yamamoto , Hiroyuki Kitajima , Akira Kurano , Michio Miyazaki , Masafumi Nozawa , Takikazu Takeuchi
IPC分类号： G06F12/08 , G06F3/06 , G06F12/12
CPC分类号： G06F3/0601 , G06F2003/0691
摘要： Buffers are separately provided for a region for non-sequential transfer and for a region for sequential transfer in each one of the disk units. A director sends a message to inform at least one of the disk units whether transfer of data the respective disk units are to make is sequential or non-sequential. When the disk unit receives a non-sequential transfer request, it uses the buffer region for non-sequential transfer to transfer data requested by the director and when it receives a sequential transfer request, it uses a plurality of buffer regions for the sequential transfer. Thus, data transfer is performed between a host device and that disk unit.

16. 发明授权

US5497472A Cache control method and apparatus for storing data in a cache memory and for indicating completion of a write request irrespective of whether a record to be accessed exists in an external storage unit 失效
标题翻译：用于将数据存储在高速缓冲存储器中并且用于指示写入请求完成的高速缓存控制方法和装置，而不管存储在存储器中的记录是否存在于外部存储单元
公开(公告)号：US5497472A
公开(公告)日：1996-03-05
申请号：US375234
申请日：1995-01-19
申请人： Akira Yamamoto , Shigeo Homma , Yoshihiro Asaka , Yoshiaki Kuwahara , Akira Kurano , Masafumi Nozawa , Hiroyuki Kitajima
发明人： Akira Yamamoto , Shigeo Homma , Yoshihiro Asaka , Yoshiaki Kuwahara , Akira Kurano , Masafumi Nozawa , Hiroyuki Kitajima
IPC分类号： G06F3/06 , G06F12/08
CPC分类号： G06F12/0866
摘要： In an information processing system having a data processing apparatus, a control unit for a cache memory, and a storage unit for storing a record, respectively interconnected together, wherein when the control unit receives from the data processing apparatus a write request for a record to be written and if the record to be written is not being stored in the cache memory, the control unit receives a data to be written in the object record from the data processing apparatus and stores the received data in the cache memory. After notifying the data processing apparatus of a completion of a data write process, the control unit checks if the object record in which the data stored in the cache memory is being stored in the storage unit, if the object record is being stored in the storage unit, the data in the cache memory is written in the storage unit, and if not, the data in the cache memory is not written and such effect is notified to the data processing apparatus.
摘要翻译：在具有数据处理装置，高速缓冲存储器的控制单元和分别互连在一起的记录的存储单元的信息处理系统中，其中当控制单元从数据处理装置接收到对记录的写请求时，写入，并且如果要写入的记录未被存储在高速缓冲存储器中，则控制单元从数据处理装置接收要写入对象记录中的数据，并将接收到的数据存储在高速缓冲存储器中。在通知数据处理装置完成数据写入处理之后，如果对象记录被存储在存储单元中，则控制单元检查存储在高速缓冲存储器中的数据是否存储在存储单元中的对象记录高速缓冲存储器中的数据被写入存储单元中，如果不存在，则高速缓冲存储器中的数据不被写入，并且将该效果通知给数据处理装置。

17. 发明授权

US4800483A Method and system for concurrent data transfer disk cache system 失效
标题翻译：并发数据传输磁盘缓存系统的方法和系统
公开(公告)号：US4800483A
公开(公告)日：1989-01-24
申请号：US56355
申请日：1987-05-28
申请人： Akira Yamamoto , Toru Nishigaki , Akira Kurano , Kiyoshi Hisano , Yoshiro Shiroyanagi
发明人： Akira Yamamoto , Toru Nishigaki , Akira Kurano , Kiyoshi Hisano , Yoshiro Shiroyanagi
IPC分类号： G06F13/10 , G06F12/08 , G06F13/12 , G06F13/00
CPC分类号： G06F13/122 , G06F12/0866 , G06F12/0862
摘要： The present invention relates to a computer system having a disk cache unit between a disk unit and the main storage unit. Ordinarily, the data transfer processing is carried out between the disk unit and the disk cache unit and between the disk cache unit and the main storage unit in this case under control of a director. The present invention is characterized by enabling these two data transfer operations to be executed in parallel and to prevent the director from becoming the bottleneck of the processing due to the concentrated processing requests. For this purpose, the present invention provides for a data transfer between the disk cache unit and a disk unit while a data transfer is taking place between the main storage unit and the disk cache unit.
摘要翻译：本发明涉及一种在盘单元和主存储单元之间具有盘缓存单元的计算机系统。通常，在这种情况下，在导向器的控制下，在盘单元和盘高速缓存单元之间以及盘缓存单元和主存储单元之间执行数据传送处理。本发明的特征在于能够并行地执行这两个数据传送操作，并且防止由于集中的处理请求引导器成为处理的瓶颈。为此，本发明提供了在主存储单元和盘高速缓存单元之间进行数据传输的同时在盘缓存单元和盘单元之间的数据传送。

18. 发明授权

US11220949B2 Exhaust silencer device 有权
公开(公告)号：US11220949B2
公开(公告)日：2022-01-11
申请号：US16171886
申请日：2018-10-26
申请人： Taiki Teramoto , Takato Ishihata , Takehiro Miura , Akira Yamamoto
发明人： Taiki Teramoto , Takato Ishihata , Takehiro Miura , Akira Yamamoto
IPC分类号： F01N1/02 , F01N1/08 , F01N13/00 , F01N13/18 , F01N1/00 , F01N13/02
摘要： An exhaust silencer device which is interposed in an exhaust passage in a vehicle to reduce exhaust noise comprises a sub-muffler which is interposed in the exhaust passage and has an expansion chamber formed therein; an inlet pipe which is airtightly inserted through an inlet opening of the sub-muffler; and an outlet pipe which is airtightly inserted through an outlet opening of the sub-muffler, wherein the inlet pipe and the outlet pipe are formed with openings (small apertures, non-joined portions) only in their upper half area and their lower half area is sealed without having the openings.

19. 发明申请

US20140351521A1 STORAGE SYSTEM AND METHOD FOR CONTROLLING STORAGE SYSTEM 审中-公开
标题翻译：存储系统和控制存储系统的方法
公开(公告)号：US20140351521A1
公开(公告)日：2014-11-27
申请号：US14342848
申请日：2013-05-27
申请人： Shintaro Kudo , Akira Yamamoto , Yusuke Nonaka , Sadahiro Sugimoto
发明人： Shintaro Kudo , Akira Yamamoto , Yusuke Nonaka , Sadahiro Sugimoto
IPC分类号： G06F12/08
CPC分类号： G06F12/0868 , G06F12/0817
摘要： A cache package (for example, a flash memory package configured by flash memories) can execute a cache control process instead of a processor in a storage system by a request of the cache control process from the storage system. Consequently, time for the process that the processor of the storage system executes can be reduced and increase in a throughput can be achieved. For example, particularly the present invention is effective in real time data processing in OLTP (OnLine Transaction Processing) (for example, database processes in finance, medical service, Internet service, and government and public service). In addition, under the concept of recent EPR (Enterprise Resource Planning) a flexible storage system that can respond rapid fluctuation in an amount of data and an access load can be established and leveraged by increasing several boards of required cache packages.
摘要翻译：高速缓存包（例如，由闪速存储器配置的闪存包）可以通过来自存储系统的高速缓存控制处理的请求来执行存储系统中的高速缓存控制处理而不是处理器。因此，可以减少存储系统的处理器执行的处理的时间，并且可以实现吞吐量的增加。例如，特别地本发明在OLTP（在线事务处理）（例如，金融，医疗服务，互联网服务，政府和公共服务中的数据库处理）的实时数据处理中是有效的。另外，根据最新的EPR（企业资源规划）的概念，可以通过增加几个所需缓存包的板块来建立和利用灵活的存储系统，可以响应数据量和访问负载的快速波动。

20. 发明授权

US08801156B2 Flow passage assembly and method for manufacturing flow passage assembly, inkjet recording head, and recording apparatus 有权
标题翻译：流路组件及其制造方法，喷墨记录头，记录装置
公开(公告)号：US08801156B2
公开(公告)日：2014-08-12
申请号：US13464685
申请日：2012-05-04
申请人： Ryo Shimamura , Takeshi Shibata , Akira Yamamoto , Toshiaki Hirosawa , Hiroki Tajima
发明人： Ryo Shimamura , Takeshi Shibata , Akira Yamamoto , Toshiaki Hirosawa , Hiroki Tajima
IPC分类号： B41J2/17
CPC分类号： B41J2/1604 , B29C65/08 , B29C66/124 , B29C66/242 , B29C66/244 , B29C66/30223 , B29C66/543 , B29C66/73921 , B29C66/8322 , B29L2031/7678 , B41J2/14024 , B41J2/14145 , B41J2/1623 , B41J2/17513 , B41J2/17553 , B41J2/17563 , B41J2/18 , B41J2002/14403 , B41J2202/12 , B41J2202/20
摘要： A method for manufacturing a flow passage assembly includes forming a first flow passage in a first joint interface formed by welding a first surface of a first flow passage forming member to a first surface of a second flow passage forming member using an ultrasonic welding process, and forming, after the first flow passage is formed, a second flow passage in a second joint interface formed by welding a first surface of a third flow passage forming member to one of a second surface of the first flow passage forming member and a second surface of the second flow passage forming member using an ultrasonic welding process. A total area of weld portions used when the first flow passage is formed is greater than a total area of weld portions used when the second flow passage is formed.
摘要翻译：一种流路组件的制造方法，其特征在于，在使用超声波焊接工艺将第一流路形成部件的第一面焊接到第二流路形成部件的第一表面的第一接合界面中形成第一流路，在形成所述第一流路之后，形成第二接合界面中的第二流路，所述第二接合界面通过将第三流路形成构件的第一表面焊接到所述第一流路形成构件的第二表面中的一个而形成，所述第二流路形成部件使用超声波焊接工序。当形成第一流路时所使用的焊接部分的总面积大于在形成第二流路时使用的焊接部分的总面积。

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