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    • 11. 发明申请
    • Band gap reference voltage circuit
    • 带隙参考电压电路
    • US20060071690A1
    • 2006-04-06
    • US11242051
    • 2005-10-04
    • Junichi Nagata
    • Junichi Nagata
    • H03K19/0175
    • G05F3/30
    • In a band gap reference voltage circuit, a band gap cell circuit composed of two transistors is driven with different current densities under a bias condition in which first and second reference voltages output in accordance with the operating states of the two transistors are equal to each other, thereby outputting a band gap reference voltage from a reference voltage output line. A differential amplifying circuit that is supplied with the first and second reference voltages as differential input signals subjects the differential input signals thus supplied to differential amplification. A level shift circuit is connected between a power supply line and the reference voltage output line and supplied with an output voltage of the differential amplifying circuit to carry out a level shift operation on the output voltage concerned.
    • 在带隙基准电压电路中,在偏置条件下以不同的电流密度驱动由两个晶体管组成的带隙单元电路,其中根据两个晶体管的工作状态输出的第一和第二基准电压彼此相等 从而从参考电压输出线输出带隙基准电压。 被提供有作为差分输入信号的第一参考电压和第二参考电压的差分放大电路使差分输入信号经受差分放大。 电平移位电路连接在电源线和参考电压输出线之间,并提供有差分放大电路的输出电压,对所输出的电压执行电平移位运算。
    • 12. 发明授权
    • Load actuation circuit
    • 负载驱动电路
    • US5999041A
    • 1999-12-07
    • US857881
    • 1997-05-16
    • Junichi NagataJunji HayakawaHiroyuki Ban
    • Junichi NagataJunji HayakawaHiroyuki Ban
    • H03K17/082H03K17/08
    • H03K17/0822
    • An output MOS transistor and a current-detecting MOS transistor are connected commonly at their drains and gates. A gate voltage is fed to the gates of these transistors via signal lines. When the voltage of an output terminal is increased in response to excessive load current, a current-mirror circuit consisting of first and second transistors pulls in current from the signal line to reduce the gate voltage. Thus, the output current of output MOS transistor is limited within a predetermined level. Furthermore, a diode, provided in the signal line, produces a voltage drop equivalent to the base-emitter voltage of first transistor. By the function of this diode, the gate-source voltage of output MOS transistor is equalized with the gate-source voltage of current-detecting MOS transistor. As a result, the same operating point can be set for the output transistor and the current-detecting transistor.
    • 输出MOS晶体管和电流检测MOS晶体管通常连接在其漏极和栅极。 栅极电压通过信号线馈送到这些晶体管的栅极。 当输出端子的电压响应于过大的负载电流而增加时,由第一和第二晶体管组成的电流镜电路从信号线引出电流以降低栅极电压。 因此,输出MOS晶体管的输出电流被限制在预定的水平。 此外,设置在信号线中的二极管产生等效于第一晶体管的基极 - 发射极电压的电压降。 通过该二极管的功能,输出MOS晶体管的栅极 - 源极电压与电流检测MOS晶体管的栅极 - 源极电压相等。 结果,可以为输出晶体管和电流检测晶体管设置相同的工作点。
    • 16. 发明申请
    • DEVICE FOR DRIVING SWITCHING ELEMENTS
    • 用于驱动开关元件的装置
    • US20110133790A1
    • 2011-06-09
    • US12961836
    • 2010-12-07
    • Junichi NagataTsuneo Maebara
    • Junichi NagataTsuneo Maebara
    • H03K17/94
    • H03K17/168
    • A drive unit controls the operation of a corresponding power switching element such as IGBT which forms an inverter and a converter. The drive unit controls the operation of the corresponding power switching element to supply an operation current to a motor generator. First and second switching elements in the drive unit are simultaneously turned on when an operation signal transferred from a control device is switched to a turning-on instruction operation signal. The voltage at the gate terminal of the power switching element is shifted to a divided voltage obtained by dividing a voltage of the power source by first and second resistances connected in series in the drive unit. When a mirror time period of the power switching element is elapsed, the second switching element only is turned off in order to shift the gate voltage of the power switching element to the voltage of the power source.
    • 驱动单元控制相应的功率开关元件(例如形成逆变器的IGBT)和转换器的操作。 驱动单元控制对应的功率开关元件的操作以向电动发电机提供操作电流。 当从控制装置传送的操作信号切换到接通指令操作信号时,驱动单元中的第一和第二开关元件同时导通。 功率开关元件的栅极端子处的电压被移动到通过将电源的电压除以在驱动单元中串联连接的第一和第二电阻而获得的分压。 当经过功率开关元件的反射镜时间周期时,为了将功率开关元件的栅极电压移动到电源的电压,仅切断第二开关元件。
    • 17. 发明申请
    • Adhesiveless copper clad laminates and method for manufacturing thereof
    • 无粘性覆铜层压板及其制造方法
    • US20110081557A1
    • 2011-04-07
    • US12805921
    • 2010-08-24
    • Junichi NagataYoshiyuki Asakawa
    • Junichi NagataYoshiyuki Asakawa
    • B32B15/08B05D3/00C23C14/18C23C14/34B32B15/04
    • C23C18/206C23C14/20C23C18/165C23C18/38C23C18/50C23C24/00H05K1/0393H05K3/388Y10T428/12535Y10T428/12569Y10T428/12826Y10T428/1291Y10T428/12944Y10T428/24967Y10T428/265Y10T428/31681
    • The present invention provides adhesiveless copper clad laminates wherein there is formed a copper film layer having high adhesiveness and insulation reliability, and a method for manufacturing such adhesiveless copper clad laminates.In adhesiveless copper clad laminates wherein a base metal layer is directly formed on at least one side of an insulating film without using an adhesive and a copper conductor layer having a desired thickness is formed on the base metal layer, the adhesiveless copper clad laminates is characterized in that a base metal layer having a thickness of 3 to 50 nm is formed on an insulating film by a dry plating method and a copper film layer is formed on the base metal layer, and the base metal layer mainly contains (1) a vanadium-molybdenum-nickel alloy consisting of 4 to 13% by weight of vanadium, 5 to 40% by weight of molybdenum, and the balance of nickel or (2) a -vanadium-chromium-molybdenum-nickel alloy consisting of 4 to 13% by weight of vanadium and chromium in total including at least 2% by weight of vanadium, 5 to 40% by weight of molybdenum, and the balance of nickel.
    • 本发明提供了无粘性铜包覆层压板,其中形成了具有高粘合性和绝缘可靠性的铜膜层,以及这种无粘合剂覆铜层压板的制造方法。 在无粘性铜包覆层压板中,其中在绝缘膜的至少一侧上直接形成基底金属层而不使用粘合剂,并且在基底金属层上形成具有所需厚度的铜导体层,所述无粘合剂覆铜层压板的特征在于 由于通过干式电镀法在绝缘膜上形成厚度为3〜50nm的贱金属层,在基底金属层上形成铜膜层,贱金属层主要含有(1)钒 钼 - 镍合金,由4〜13重量%的钒,5〜40重量%的钼,余量的镍或(2)a-钒 - 铬 - 钼 - 镍合金组成,由4〜13重量% 的钒和铬总计包括至少2重量%的钒,5至40重量%的钼,余量为镍。
    • 18. 发明授权
    • Overcurrent detection circuit
    • 过电流检测电路
    • US07548403B2
    • 2009-06-16
    • US11654541
    • 2007-01-18
    • Junichi NagataMasayuki Kominami
    • Junichi NagataMasayuki Kominami
    • H02H3/08
    • H02H3/087H03K17/0822H03K17/18H03K2217/0027
    • An overcurrent detection circuit for detecting an overcurrent condition in an output transistor connected in series with an electrical load includes a pair of transistors having input terminals connected together. The pair of transistors is interposed between a current mirror circuit and a resistor and between the current mirror circuit and a detection transistor capable of being turned on at the same time as the output transistor. When a voltage is applied to the input terminals of the pair of the transistors, output terminals of the current mirror circuit are fixed at the same potential. Thus, even when an early effect occurs in the current mirror circuit, an electric current flowing through the resistor becomes equal to that flowing through the detection transistor. The overcurrent detection circuit can accurately detect the overcurrent condition based on a voltage drop across the resistor.
    • 用于检测与电负载串联连接的输出晶体管中的过电流状况的过电流检测电路包括一对具有连接在一起的输入端的晶体管。 一对晶体管介于电流镜电路和电阻之间,并且在电流镜电路和能够与输出晶体管同时导通的检测晶体管之间。 当对一对晶体管的输入端施加电压时,电流镜电路的输出端子固定在相同的电位。 因此,即使在电流镜电路中发生早期效应,流过电阻器的电流也等于流过检测晶体管的电流。 过电流检测电路可以基于电阻器两端的电压降来精确地检测过电流状况。
    • 19. 发明授权
    • Drive circuit and method of applying high voltage test thereon
    • 驱动电路及其上的高压测试方法
    • US07167030B2
    • 2007-01-23
    • US11063853
    • 2005-02-24
    • Masahiro KitagawaAkio KojimaJunichi Nagata
    • Masahiro KitagawaAkio KojimaJunichi Nagata
    • H03K3/00
    • H03K17/0822H03K5/08H03K17/08122H03K17/102
    • A drive circuit that supplies electric power to an electric load from a DC electric source includes a pair of series-connected first and second MOSFETS of the same conduction type, a pair of clamp circuits respectively connected between the drains and gates of the first and second MOSFETS, a series circuit of a first resistor and a switch, a first test terminal; a second test terminal connected to a joint of the first and second MOSFETS, a third test terminal for operating the switch, a fourth test terminal connected a joint of the first resistor and the switch; and a second resistor connected between the gate of the second MOSFET and the first test terminal. The switch and the first resistor are connected between the gate and the source of the first MOSFET to close when the drive circuit is normally operated and to open when it is given a high voltage test.
    • 从DC电源向电负载供电的驱动电路包括一对相同导电类型的串联连接的第一和第二MOSFET,一对钳位电路,分别连接在第一和第二漏极的漏极和栅极之间 MOSFETS,第一电阻器和开关的串联电路,第一测试端子; 连接到第一和第二MOSFET的接头的第二测试端子,用于操作开关的第三测试端子,连接第一电阻器和开关的接头的第四测试端子; 以及连接在第二MOSFET的栅极和第一测试端子之间的第二电阻器。 当驱动电路正常工作时,开关和第一个电阻连接在第一个MOSFET的栅极和源极之间,并在进行高压测试时打开。
    • 20. 发明授权
    • Electrical load driving circuit with protection
    • 电气负载驱动电路有保护
    • US06392463B1
    • 2002-05-21
    • US09658576
    • 2000-09-08
    • Masahiro KitagawaJunichi Nagata
    • Masahiro KitagawaJunichi Nagata
    • H03K508
    • H03K17/063H03K17/08122H03K17/08142H03K17/0822
    • In the high side switch type of electrical load driving circuit, wherein an N channel MOS transistor is provided on the circuit for supplying power to the electrical load, a zener diode is provided between the drain and the source of the MOS transistor to protect the MOS transistor. A load is provided between the gate and the ground to protect the MOS transistor. In this circuit, when a positive high voltage is induced on the side of the electrical load, the zener and a parasitic diode of the MOS transistor flows forward currents which absorb the high voltage noise. When a negative high voltage noise is induced from the side of the electrical load, a breakdown current flows through the zener diode, so that the voltage difference between the drain and source is clamed to a predetermined voltage. Then, the diode turns on the MOS transistor. Thus, the MOS transistor can be surely protected from high voltage noises without increasing the current capacities of elements for the protection circuit.
    • 在电动负载驱动电路的高侧开关型电路中,在用于向电负载供电的电路上设置有N沟道MOS晶体管,在MOS晶体管的漏极和源极之间设置齐纳二极管以保护MOS 晶体管。 在栅极和地之间提供负载以保护MOS晶体管。 在该电路中,当在电负载侧产生正高电压时,MOS晶体管的齐纳二极管和寄生二极管流过吸收高电压噪声的正向电流。 当从电负载侧感应出负的高电压噪声时,击穿电流流过齐纳二极管,使得漏极和源极之间的电压差被限制到预定的电压。 然后,二极管导通MOS晶体管。 因此,可以可靠地保护MOS晶体管免受高电压噪声而不增加用于保护电路的元件的电流容量。