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    • 13. 发明申请
    • ARBITRARY WAVEFORM PROPAGATION THROUGH A LOGIC GATE USING TIMING ANALYSIS RESULTS
    • 通过使用时序分析结果的逻辑门进行仲裁波形传播
    • US20090228851A1
    • 2009-09-10
    • US12044223
    • 2008-03-07
    • Soroush AbbaspourPeter Feldmann
    • Soroush AbbaspourPeter Feldmann
    • G06F17/50
    • G06F17/5036
    • An approach for performing arbitrary waveform propagation through a logic gate using timing analysis results is described. In one embodiment, there is an arbitrary waveform propagation tool for determining an effect of noise on a digital integrated circuit having at least one logic gate. A timing analysis component is configured to perform a timing analysis on the at least one logic gate and a noise analysis component is configured to perform a noise analysis. A waveform propagation model synthesizer component is configured to dynamically synthesize a waveform propagation model as a function of the timing analysis. The waveform propagation model synthesizer component is further configured to apply an arbitrary voltage waveform comprising one of a noisy waveform or noise glitch waveform and determine an effect of the arbitrary voltage waveform on the at least one logic gate from the dynamically synthesized waveform propagation model.
    • 描述了使用定时分析结果通过逻辑门执行任意波形传播的方法。 在一个实施例中,存在用于确定噪声对具有至少一个逻辑门的数字集成电路的影响的任意波形传播工具。 定时分析部件被配置为对所述至少一个逻辑门执行定时分析,并且噪声分析部件被配置为执行噪声分析。 波形传播模型合成器组件被配置为动态地合成作为时序分析的函数的波形传播模型。 波形传播模型合成器部件还被配置为施加包括噪声波形或噪声毛刺波形中的一个的任意电压波形,并且从动态合成的波形传播模型确定任意电压波形对至少一个逻辑门的影响。
    • 15. 发明授权
    • Characterization of nonlinear cell macro model for timing analysis
    • 定时分析非线性单元宏观模型的表征
    • US08515725B2
    • 2013-08-20
    • US12958637
    • 2010-12-02
    • Peter FeldmannSampath DechuSoroush AbbaspourRatan Singh
    • Peter FeldmannSampath DechuSoroush AbbaspourRatan Singh
    • G06F17/50G06G7/48
    • G06F17/5036G06F2217/10
    • A system, method and computer program product for modeling a semiconductor device structure. The system and method implemented includes performing a simulation of the circuit by applying at least one input waveform on a circuit input port, and loading an output port with at least one of output load; determining, at successive time steps of the circuit simulation, a voltage value Vi on the input port, a voltage value Vo on the output port, and a current values (ia) and (ib) on the respective input and output ports. Then there is computed from the respective current value for each successive time step of the simulation, at least one charge value (Qa(Vi, Vo)) and (Qb(Vi, Vo)), respectively, as a function of Vi and Vo voltage values; and generating a nonlinear charge source from the at least one charge value, the nonlinear charge source used in modeling a dynamic behavior of the cell. A voltage controlled charge source (VCCS) is thereby determined by capturing the natural digital circuit cell behavior.
    • 一种用于对半导体器件结构进行建模的系统,方法和计算机程序产品。 实现的系统和方法包括通过在电路输入端口上施加至少一个输入波形来执行电路的仿真,并且利用至少一个输出负载来加载输出端口; 在电路仿真的连续时间步骤中确定输入端口上的电压值Vi,输出端口上的电压值Vo,以及相应输入和输出端口上的电流值(ia)和(ib)。 然后,根据模拟的每个连续时间步长的相应电流值,分别计算作为Vi和Vo的函数的至少一个充电值(Qa(Vi,Vo))和(Qb(Vi,Vo)) 电压值; 以及从所述至少一个电荷值产生非线性电荷源,所述非线性电荷源用于对所述电池的动态行为进行建模。 因此,通过捕获自然数字电路单元行为来确定压控电荷源(VCCS)。
    • 17. 发明申请
    • CHARACTERIZATION OF NONLINEAR CELL MACRO MODEL FOR TIMING ANALYSIS
    • 非线性细胞宏观模型的时序分析特征
    • US20120143582A1
    • 2012-06-07
    • US12958637
    • 2010-12-02
    • Peter FeldmannSampath DechuSoroush AbbaspourRatan Singh
    • Peter FeldmannSampath DechuSoroush AbbaspourRatan Singh
    • G06F17/50
    • G06F17/5036G06F2217/10
    • A system, method and computer program product for modeling a semiconductor device structure. The system and method implemented includes performing a simulation of the circuit by applying at least one input waveform on a circuit input port, and loading an output port with at least one of output load; determining, at successive time steps of the circuit simulation, a voltage value Vi on the input port, a voltage value Vo on the output port, and a current values (ia) and (ib) on the respective input and output ports. Then there is computed from the respective current value for each successive time step of the simulation, at least one charge value (Qa(Vi, Vo)) and (Qb(Vi, Vo)), respectively, as a function of Vi and Vo voltage values; and generating a nonlinear charge source from the at least one charge value, the nonlinear charge source used in modeling a dynamic behavior of the cell. A voltage controlled charge source (VCCS) is thereby determined by capturing the natural digital circuit cell behavior.
    • 一种用于对半导体器件结构进行建模的系统,方法和计算机程序产品。 实现的系统和方法包括通过在电路输入端口上施加至少一个输入波形来执行电路的仿真,并且利用至少一个输出负载来加载输出端口; 在电路仿真的连续时间步骤中确定输入端口上的电压值Vi,输出端口上的电压值Vo,以及相应输入和输出端口上的电流值(ia)和(ib)。 然后,根据模拟的每个连续时间步长的相应电流值,分别计算作为Vi和Vo的函数的至少一个充电值(Qa(Vi,Vo))和(Qb(Vi,Vo)) 电压值; 以及从所述至少一个电荷值产生非线性电荷源,所述非线性电荷源用于对所述电池的动态行为进行建模。 因此,通过捕获自然数字电路单元行为来确定压控电荷源(VCCS)。
    • 19. 发明授权
    • Performing reliability analysis of signal wires
    • 执行信号线的可靠性分析
    • US08463571B2
    • 2013-06-11
    • US12944892
    • 2010-11-12
    • Soroush AbbaspourAyesha AkhterPeter FeldmannJoachim Keinert
    • Soroush AbbaspourAyesha AkhterPeter FeldmannJoachim Keinert
    • G06F19/00G01R19/00
    • G06F17/5036
    • A computer-implemented system, method, and storage device simulate a periodic voltage waveform in a network model of the integrated circuit design. The method then determines resultant current values in each segment of nets of the integrated circuit design resulting from the periodic voltage waveform and performs a Fourier transform of the periodic voltage waveform to generate a frequency domain representation of the periodic voltage waveform. The frequency domain representation comprises multiple Fourier terms, each of the Fourier terms is a frequency that is a multiple of the base frequency. Next, the method performs an AC analysis of the resultant voltage at each frequency of the multiple Fourier terms. The AC analysis provides an electrical current value for each of the frequencies of the Fourier terms for each of the nets. This allows the method to compute a root mean square current through each of the nets based on the AC analysis. Then, the method determines whether the root mean square current for any of the segments of the nets exceeds a current limit, and reports any segment of the nets for which the root mean square current exceeds the current limit.
    • 计算机实现的系统,方法和存储设备模拟集成电路设计的网络模型中的周期性电压波形。 然后,该方法确定由周期性电压波形产生的集成电路设计的网络的每个段中的合成电流值,并执行周期性电压波形的傅立叶变换以产生周期性电压波形的频域表示。 频域表示包括多个傅立叶项,每个傅立叶项是基频的倍数的频率。 接下来,该方法对多傅里叶项的每个频率进行所得到的电压的AC分析。 AC分析为每个网络的傅立叶项的每个频率提供电流值。 这允许该方法基于AC分析来计算通过每个网络的均方根电流。 然后,该方法确定网络的任何段的均方根电流是否超过电流限制,并且报告均方根电流超过电流极限的网络的任何段。
    • 20. 发明授权
    • Multiple voltage threshold timing analysis for a digital integrated circuit
    • 数字集成电路的多电压阈值时序分析
    • US08020129B2
    • 2011-09-13
    • US12021723
    • 2008-01-29
    • Soroush AbbaspourPeter Feldmann
    • Soroush AbbaspourPeter Feldmann
    • G06F17/50
    • G06F17/5031
    • An approach for performing multiple voltage threshold timing analysis for a digital integrated circuit is described. In one embodiment, there is a multiple voltage threshold timing analysis tool for performing a multiple voltage threshold timing analysis of a digital integrated circuit having at least one logic gate loaded by an interconnect circuit. In this embodiment, a characterization data retrieving component is configured to obtain characterization data describing driving behavior of the at least one logic gate. An interconnect circuit model retrieving component is configured to obtain a model of the interconnect circuit. A multiple voltage threshold timing analysis component is configured to derive a sequence of crossing times for the driving point voltage waveform to advance between successive voltage thresholds. The multiple voltage threshold timing analysis component also generates a voltage waveform from the derived sequence of crossing times.
    • 描述了用于对数字集成电路执行多个电压阈值时序分析的方法。 在一个实施例中,存在多电压阈值时序分析工具,用于执行具有由互连电路加载的至少一个逻辑门的数字集成电路的多电压阈值时序分析。 在该实施例中,表征数据检索部件被配置为获得描述所述至少一个逻辑门的驱动行为的表征数据。 互连电路模型检索部件被配置为获得互连电路的模型。 多电压阈值时序分析部件被配置为导出驱动点电压波形的交叉时间序列以在连续的电压阈值之间前进。 多电压阈值时序分析部件还根据导出的交叉时间序列产生电压波形。