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11. 发明授权

US08010764B2 Method and system for decreasing power consumption in memory arrays having usage-driven power management 失效
标题翻译：具有使用驱动电源管理的存储器阵列中的功率消耗降低的方法和系统
公开(公告)号：US08010764B2
公开(公告)日：2011-08-30
申请号：US11176819
申请日：2005-07-07
申请人： Thomas Walter Keller, Jr. , Charles R. Lefurgy , Hai Huang
发明人： Thomas Walter Keller, Jr. , Charles R. Lefurgy , Hai Huang
IPC分类号： G05F12/00
CPC分类号： G06F1/3275 , G06F1/3225 , G11C5/14 , Y02D10/13 , Y02D10/14
摘要： A method and system for decreasing power consumption in memory arrays having usage-driven power management provides decreased power consumption in the memory array of a processing system. Per-page usage information is gathered on memory by a memory controller and periodically evaluated by software. The software distinguishes between more frequently accessed pages and less frequently accessed pages by analyzing the gathered usage information and periodically migrates physical memory pages in order to group less frequently accessed pages and more frequently access pages in separately power-managed memory ranks. When used in conjunction with a usage-driven power management mechanism, the ranks containing the less frequently accessed pages can enter deeper power-saving states and/or any power-saving state for longer periods. Operation may be further enhanced by using packed allocation in the memory ranks containing the less-frequently accessed pages and scattered allocation in the memory ranks having more frequently accessed pages.
摘要翻译：用于降低具有使用驱动功率管理的存储器阵列中的功率消耗的方法和系统提供了处理系统的存储器阵列中的功耗降低。每页使用信息由存储器控制器收集在存储器上，并由软件定期评估。该软件通过分析收集的使用信息来区分更频繁访问的页面和较不频繁访问的页面，并周期性地迁移物理内存页面，以便分组较不频繁访问的页面，并且更频繁地在单独的功率管理内存等级中访问页面。当与使用驱动的电源管理机制结合使用时，包含较不频繁访问的页面的行列可以在更长的时间内进入更深的省电状态和/或任何省电状态。可以通过在包含较不频繁访问的页面的内存列中使用打包分配以及具有更频繁访问的页面的内存级别中的分散分配来进一步增强操作。

12. 发明授权

US07921313B2 Scheduling processor voltages and frequencies based on performance prediction and power constraints 失效
标题翻译：基于性能预测和功率约束调度处理器电压和频率
公开(公告)号：US07921313B2
公开(公告)日：2011-04-05
申请号：US12105206
申请日：2008-04-17
申请人： Soraya Ghiasi , Thomas Walter Keller, Jr. , Ramakrishna Kotla , Freeman Leigh Rawson, III
发明人： Soraya Ghiasi , Thomas Walter Keller, Jr. , Ramakrishna Kotla , Freeman Leigh Rawson, III
IPC分类号： G06F1/26
CPC分类号： G06F1/3203 , G06F1/324 , G06F1/3296 , G06F11/3017 , G06F11/3058 , Y02D10/126 , Y02D10/172
摘要： A power management system schedules the voltage and frequency of processors in a data processing system based on two criteria. The first criterion is a prediction of the performance that the work currently running on the processor will experience at the different frequencies that are available. The second criterion is a system-wide constraint on the total power budget allocated to processors. Based on these criteria, low-level code sets the frequency and voltage of the processors in the system to match what the operating system is currently running on them.
摘要翻译：电源管理系统根据两个标准对数据处理系统中处理器的电压和频率进行调度。第一个标准是对当前在处理器上运行的工作在可用的不同频率下体验的性能的预测。第二个标准是分配给处理器的总功率预算的全系统约束。基于这些标准，低级代码设置系统中处理器的频率和电压，以匹配当前运行的操作系统。

13. 发明申请

US20080301475A1 PERFORMANCE CONSERVING METHOD FOR REDUCING POWER CONSUMPTION IN A SERVER SYSTEM 有权
标题翻译：一种降低服务器系统功耗的性能保证方法
公开(公告)号：US20080301475A1
公开(公告)日：2008-12-04
申请号：US12191757
申请日：2008-08-14
申请人： WESLEY MICHAEL FELTER , Thomas Walter Keller, JR. , Karthick Rajamani , Cosmin Rusu
发明人： WESLEY MICHAEL FELTER , Thomas Walter Keller, JR. , Karthick Rajamani , Cosmin Rusu
IPC分类号： G06F1/26
CPC分类号： G06F1/3203 , G06F1/324 , G06F1/3296 , Y02D10/126 , Y02D10/172 , Y02D50/20
摘要： A method for managing power in a data processing system having multiple components includes determining a power budget for the system. Activity levels during a forthcoming time interval are then predicted for each of the components. Using the predicted activity levels, the power budget is allocated among the system components. An activity limit is then established for each component based on its corresponding portion of the power budget. The activity of a component is then monitored and, if the component's activity exceeds the component's corresponding activity limit, constrained. Determining the predicted level of activity may include determining a predicted number of instructions dispatched by a processor component or a predicted number of memory requests serviced for a system memory component. Allocating the power budget includes allocating each component its corresponding standby power and a share of the system power available for dynamic powering based on the expected levels of activity.
摘要翻译：一种用于在具有多个组件的数据处理系统中管理电力的方法包括确定系统的功率预算。然后对于每个组件预测在即将到来的时间间隔期间的活动水平。使用预测的活动级别，在系统组件之间分配功率预算。然后根据功率预算的相应部分为每个组件建立活动限制。然后监视组件的活动，如果组件的活动超过组件的相应活动限制，则会受到限制。确定预测的活动水平可以包括确定由处理器组件分派的指令的预测数量或为系统存储器组件服务的预测数量的存储器请求。分配功率预算包括基于预期的活动水平来分配每个组件其相应的待机功率和可用于动态供电的系统功率的份额。

14. 发明授权

US07386739B2 Scheduling processor voltages and frequencies based on performance prediction and power constraints 失效
公开(公告)号：US07386739B2
公开(公告)日：2008-06-10
申请号：US11120899
申请日：2005-05-03
申请人： Soraya Ghiasi , Thomas Walter Keller, Jr. , Ramakrishna Kotla , Freeman Leigh Rawson, III
发明人： Soraya Ghiasi , Thomas Walter Keller, Jr. , Ramakrishna Kotla , Freeman Leigh Rawson, III
IPC分类号： G06F1/26
CPC分类号： G06F1/3203 , G06F1/324 , G06F1/3296 , G06F11/3017 , G06F11/3058 , Y02D10/126 , Y02D10/172
摘要： A power management system schedules the voltage and frequency of processors in a data processing system based on two criteria. The first criterion is a prediction of the performance that the work currently running on the processor will experience at the different frequencies that are available. The second criterion is a system-wide constraint on the total power budget allocated to processors. Based on these criteria, low-level code sets the frequency and voltage of the processors in the system to match what the operating system is currently running on them.

15. 发明授权

US09009503B2 Branch circuit determination without external synchronization 有权
标题翻译：分支电路确定无需外部同步
公开(公告)号：US09009503B2
公开(公告)日：2015-04-14
申请号：US13542532
申请日：2012-07-05
申请人： Malcolm Scott Allen-Ware , Wael El-Essawy , Alexandre Peixoto Ferreira , Thomas Walter Keller, Jr. , Karthick Rajamani , Juan Carlos Rubio
发明人： Malcolm Scott Allen-Ware , Wael El-Essawy , Alexandre Peixoto Ferreira , Thomas Walter Keller, Jr. , Karthick Rajamani , Juan Carlos Rubio
IPC分类号： G06F1/26 , H02J13/00
CPC分类号： H02J13/002 , H04B3/54 , H04L12/6418
摘要： A method, system, and computer program product for relating a data processing system with a power branch circuit are provided in the illustrative embodiments. Each signal in a set of signals is combined with a power signal to form a set of combination signals, the power signal including a first power usage by the data processing system and a second power usage by a modulating signal. An amplitude of a corresponding signal in each combined signal in the set of combined signals is determined over a period. Using a discriminating logic, a determination is made whether the modulating signal is present in the power signal. Responsive to the discriminating logic producing an affirmative result, the data processing system is related with the power branch circuit.
摘要翻译：在说明性实施例中提供了用于将数据处理系统与功率分支电路相关联的方法，系统和计算机程序产品。一组信号中的每个信号与功率信号组合以形成一组组合信号，功率信号包括数据处理系统的第一功率使用和调制信号的第二功率使用。在一个周期中确定组合信号组中每个组合信号中对应信号的幅度。使用鉴别逻辑，确定调制信号是否存在于功率信号中。响应于产生肯定结果的识别逻辑，数据处理系统与功率分支电路相关。

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