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11. 发明授权

US5250822A Field effect transistor 失效
标题翻译：场效应晶体管
公开(公告)号：US5250822A
公开(公告)日：1993-10-05
申请号：US857460
申请日：1992-03-25
申请人： Takuji Sonoda , Shinichi Sakamoto , Nobuyuki Kasai
发明人： Takuji Sonoda , Shinichi Sakamoto , Nobuyuki Kasai
IPC分类号： H01L29/812 , H01L21/338 , H01L29/778 , H01L29/161 , H01L29/205 , H01L29/225
CPC分类号： H01L29/7783
摘要： A field effect transistor includes a GaAs substrate on which an undoped GaAs layer is disposed. A doped electron supply layer is disposed on the undoped GaAs layer and has a negligible deep dopant level. A channel layer disposed on the electron supply layer has a larger electron affinity than the electron supply layer. The electron supply layer and the channel layer form a heterojunction. A third semiconductor layer having the same conductivity type as the electron supply layer is disposed on the electron supply layer. Gate, drain, and source electrodes are disposed on the third semiconductor layer. The dopant concentration of the third layer is smaller than the dopant concentration of the electron supply layer.
摘要翻译：场效应晶体管包括其上设置有未掺杂的GaAs层的GaAs衬底。掺杂的电子供应层设置在未掺杂的GaAs层上并具有可忽略的深掺杂剂水平。设置在电子供给层上的沟道层具有比电子供给层更大的电子亲和力。电子供应层和沟道层形成异质结。具有与电子供给层相同的导电类型的第三半导体层设置在电子供给层上。栅极，漏极和源极设置在第三半导体层上。第三层的掺杂剂浓度小于电子供给层的掺杂剂浓度。

12. 发明授权

US5711813A Epitaxial crystal growth apparatus 失效
标题翻译：外延晶体生长装置
公开(公告)号：US5711813A
公开(公告)日：1998-01-27
申请号：US532283
申请日：1995-09-22
申请人： Kaoru Kadoiwa , Takuji Sonoda
发明人： Kaoru Kadoiwa , Takuji Sonoda
IPC分类号： C30B25/06 , C30B23/02 , C30B25/14 , H01L21/20 , H01L21/203 , H01L21/677 , C23C16/00
CPC分类号： C30B25/14 , C30B23/002
摘要： An epitaxial growth apparatus includes a substrate heating member, a growth chamber, a molecular beam source, a nozzle for ejecting a gaseous source material, an exhaust pipe, and a vacuum chamber. When a gate valve is opened between the vacuum chamber and the growth chamber, gas is exhausted from the growth chamber, and the pressure in the growth chamber is rapidly reduced. The transition from a state where the degree of vacuum is low to a state where the degree of vacuum is high is performed rapidly. Therefore, one crystalline growth apparatus is sufficient for freely selecting among growth modes to achieve desired thickness and controllability of the carrier concentration in an epitaxially grown layer. One mode requires selectivity and another mode suppresses dopant concentration for epitaxial growth of layers of an optical device or of a microwave device.
摘要翻译：外延生长装置包括基板加热部件，生长室，分子束源，喷射气体源材料的喷嘴，排气管和真空室。当在真空室和生长室之间打开闸阀时，气体从生长室排出，并且生长室中的压力迅速降低。从真空度低的状态向真空度高的状态的转变迅速进行。因此，一种结晶生长装置足以在生长模式之间自由选择以实现外延生长层中所需的厚度和载流子浓度的可控性。一种模式需要选择性，另一种模式抑制掺杂剂浓度用于光学器件或微波器件的层的外延生长。

13. 发明授权

US5365078A Semiconductor device and method of making it 失效
标题翻译：半导体器件及其制造方法
公开(公告)号：US5365078A
公开(公告)日：1994-11-15
申请号：US130885
申请日：1993-10-04
申请人： Kazuo Hayashi , Takuji Sonoda
发明人： Kazuo Hayashi , Takuji Sonoda
IPC分类号： H01L29/80 , H01L21/335 , H01L21/338 , H01L29/06 , H01L29/423 , H01L29/775 , H01L29/778 , H01L29/812 , H01L29/78
CPC分类号： B82Y10/00 , H01L29/42316 , H01L29/66469 , H01L29/775
摘要： A semiconductor device includes a semiconductor substrate and channel and electron supply layers epitaxially grown on the semiconductor substrate. Source, drain, and gate electrodes are disposed on the electron supply layer. At least the gate electrode and the electron supply layer are structured such that an electron gas within the channel layer is one-dimensional to prevent scattering of electrons in the channel layer.
摘要翻译：半导体器件包括半导体衬底和在半导体衬底上外延生长的沟道和电子供给层。源极，漏极和栅电极设置在电子供给层上。至少栅电极和电子供给层被构造为使得沟道层内的电子气是一维的，以防止电子在沟道层中的散射。

14. 发明授权

US5220186A Semiconductor device with a mushroom-shaped gate electrode 失效
标题翻译：具有MUSHROOM型门电极的半导体器件
公开(公告)号：US5220186A
公开(公告)日：1993-06-15
申请号：US802560
申请日：1991-12-05
申请人： Nobuyuki Kasai , Shinichi Sakamoto , Takuji Sonoda , Tetsuya Yagi
发明人： Nobuyuki Kasai , Shinichi Sakamoto , Takuji Sonoda , Tetsuya Yagi
IPC分类号： H01L21/28 , H01L21/285 , H01L21/3213 , H01L21/338 , H01L29/423 , H01L29/47 , H01L29/812
CPC分类号： H01L29/66863 , H01L21/28587 , H01L21/32136 , H01L29/42316 , H01L29/475 , Y10S148/10
摘要： A mushroom-shaped gate electrode has a lower end in a recess in a semiconductor active layer on a semiconductor substrate. The gate electrode has an enlarged head. A metallic side wall is disposed on a portion of the leg of the gate electrode adjacent the head. Thus, the gate length of a semiconductor device, such as a field effect transistor, is reduced while the effective cross-sectional area of the gate electrode is increased whereby the noise characteristics of the semiconductor device are improved.
摘要翻译：蘑菇形栅电极在半导体衬底上的半导体有源层的凹部中具有下端。栅电极具有扩大的头部。金属侧壁设置在邻近头部的栅电极的腿部的一部分上。因此，诸如场效应晶体管的半导体器件的栅极长度减小，同时栅电极的有效截面面积增加，从而提高了半导体器件的噪声特性。

15. 发明授权

US5185534A Monolithic parallel connected transistor structure 失效
标题翻译：单片并联连接晶体管结构
公开(公告)号：US5185534A
公开(公告)日：1993-02-09
申请号：US709161
申请日：1991-06-03
申请人： Shinichi Sakamoto , Takuji Sonoda , Nobuyuki Kasai
发明人： Shinichi Sakamoto , Takuji Sonoda , Nobuyuki Kasai
IPC分类号： H01L21/822 , H01L21/338 , H01L27/04 , H01L27/095 , H01L29/78 , H01L29/812
CPC分类号： H01L27/095
摘要： At least two unit transistor groups, each including unit transistors arranged along a straight line, are disposed on a substrate parallel to and facing each other. Each transistor in one group and a facing transistor in the other group have integral first, second, and control electrodes. The first, second, and control electrodes of the unit transistors are connected to associated respective electrode pads.
摘要翻译：至少两个单元晶体管组，每个包括沿着直线布置的单位晶体管，设置在平行于并彼此面对的衬底上。一组中的每个晶体管和另一组中的面对晶体管具有集成的第一，第二和控制电极。单元晶体管的第一，第二和控制电极连接到相关联的各个电极焊盘。

16. 发明授权

US5032541A Method of producing a semiconductor device including a Schottky gate 失效
标题翻译：制造包括肖特基栅极的半导体器件的方法
公开(公告)号：US5032541A
公开(公告)日：1991-07-16
申请号：US396149
申请日：1989-08-21
申请人： Shinichi Sakamoto , Takuji Sonoda , Kazuo Hayashi
发明人： Shinichi Sakamoto , Takuji Sonoda , Kazuo Hayashi
IPC分类号： H01L29/812 , C23C18/31 , H01L21/28 , H01L21/285 , H01L21/338
CPC分类号： H01L29/66863 , H01L21/28 , H01L21/28587
摘要： A method of producing a semiconductor device includes etching a recessed aperture in a substrate, forming a gate electrode in the aperture, burying the gate electrode with resist, etching the resist to expose the gate electrode, depositing a high conductivity metal on the gate electrode, and forming ohmic electrodes on opposite sides of the gate electrode by a series of processing steps.
摘要翻译：一种制造半导体器件的方法包括蚀刻衬底中的凹入孔，在孔中形成栅电极，用抗蚀剂掩埋栅电极，蚀刻抗蚀剂以暴露栅电极，在栅电极上沉积高导电性金属，以及通过一系列处理步骤在栅电极的相对侧上形成欧姆电极。

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