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11. 发明授权

US09441384B2 Removable barrier for location on an upper portion of a wall 有权
标题翻译：位于墙上部位置的可移动屏障
公开(公告)号：US09441384B2
公开(公告)日：2016-09-13
申请号：US13580345
申请日：2011-02-24
申请人： Emilio Rosati , Paul Brazis
发明人： Emilio Rosati , Paul Brazis
IPC分类号： E04H17/16 , E04G21/32 , E04G5/14
CPC分类号： E04G21/3223 , E04G21/3214 , E04G21/3219 , E04G2005/148 , E04H17/163
摘要： Aspects of this invention relate to a barrier for fixing to an portion of a wall. The barrier includes at least one plate that is securable to the wall. For each plate, there is a vertical upright attached to and extending upwardly from the plate to which the barrier is secured. The barrier is held by the vertical upright above the upper portion of the wall as required. removable from the vertical upright to allow access to the upper portion of the wall as required. In one aspect, at least a portion of the barrier is moveable relative to a remainder of the barrier and between a first portion, where it is located above an upper edge of the wall, and a second portion, where access is then provided to the upper wall edge above which the movable barrier portion was positioned.
摘要翻译：本发明的方面涉及用于固定到壁的一部分的屏障。屏障包括至少一个可固定在墙上的板。对于每个板，有一个垂直的直立件，从板固定并向上延伸，挡板固定到该板上。根据需要，屏障由垂直竖立在墙壁上部的上方保持。可以从垂直的立柱上移除，以便根据需要进入墙壁的上部。在一个方面，屏障的至少一部分相对于屏障的其余部分和位于壁的上边缘之间的第一部分和第二部分之间以及第二部分之间以及第二部分之间可移动，上壁边缘，可移动阻挡部分在其上方定位。

12. 发明申请

US20070247824A1 ELECTRONIC MODULE INTERCONNECTION APPARATUS 失效
标题翻译：电子模块互连装置
公开(公告)号：US20070247824A1
公开(公告)日：2007-10-25
申请号：US11379751
申请日：2006-04-21
申请人： Paul Brazis , Marc Chason , Daniel Gamota , Krishna Kalyanasundaram
发明人： Paul Brazis , Marc Chason , Daniel Gamota , Krishna Kalyanasundaram
IPC分类号： H05K1/14 , H05K1/11
CPC分类号： H05K1/147 , H05K1/118 , H05K1/144 , H05K3/361 , H05K3/363 , H05K2201/041 , H05K2201/10189 , H05K2201/10674 , H05K2203/1572
摘要： An electronic apparatus, includes a plurality of electronic modules, each having a maximum thickness of no more than 90 microns, each comprising a substrate having a two sided edge connection pattern. The electronic modules are arranged adjacent to each other. Each pad of a first set of connection pads on a first electronic module is conductively connected to an opposing pad of a second set of connection pads of a second electronic module. The first set of connection pads is separated from the second set of connection pads by electrically conductive material that is less than 15 microns thick.
摘要翻译：一种电子设备，包括多个电子模块，每个电子模块的最大厚度不超过90微米，每个电子模块包括具有双面边缘连接图案的基板。电子模块彼此相邻布置。第一电子模块上的第一组连接焊盘的每个焊盘导电地连接到第二电子模块的第二组连接焊盘的相对焊盘。第一组连接焊盘通过小于15微米厚的导电材料与第二组连接焊盘分开。

13. 发明申请

US20070089540A1 Method and apparatus to facilitate testing of printed semiconductor devices 审中-公开
标题翻译：便于测试印刷半导体器件的方法和装置
公开(公告)号：US20070089540A1
公开(公告)日：2007-04-26
申请号：US11258747
申请日：2005-10-26
申请人： Paul Brazis , Daniel Gamota , Krishna Kalyanasundaram , Jie Zhang , Krishna Jonnalagadda
发明人： Paul Brazis , Daniel Gamota , Krishna Kalyanasundaram , Jie Zhang , Krishna Jonnalagadda
IPC分类号： G01N1/00
CPC分类号： H01L22/14 , H01L51/0005
摘要： A printing platform receives (102) (preferably in-line with a semiconductor device printing process (101)) a substrate having at least one semiconductor device printed thereon and further having a test structure printed thereon, which test structure comprises at least one printed semiconductor layer. These teachings then provide for the automatic testing (103) of the test structure with respect to at least one static (i.e., relatively unchanging) electrical characteristic metric. The static electrical characteristic metric (or metrics) of choice will likely vary with the application setting but can include, for example, a measure of electrical resistance, a measure of electrical reactance, and/or a measure of electrical continuity. Optionally (though preferably) the semiconductor device printing process itself is then adjusted (105) as a function, at least in part, of this metric.
摘要翻译：印刷平台接收（优选地与半导体器件印刷工艺（101）成直角））具有印刷在其上的至少一个半导体器件并且还具有印刷在其上的测试结构的衬底，该测试结构包括至少一个印刷半导体层。然后，这些教导提供了关于至少一个静态（即，相对不变的）电特性度量的测试结构的自动测试（103）。选择的静态电特性度量（或度量）可能随着应用设置而变化，但是可以包括例如电阻的测量，电抗的测量和/或电连续性的测量。可选地（尽管优选地），然后至少部分地基于该度量来调整（105）半导体器件打印过程本身。

14. 发明申请

US20060131545A1 Method and apparatus to facilitate printing of an electrically functional component 审中-公开
标题翻译：便于打印电功能部件的方法和装置
公开(公告)号：US20060131545A1
公开(公告)日：2006-06-22
申请号：US11013872
申请日：2004-12-16
申请人： Krishna Kalyanasundaram , Paul Brazis , Daniel Gamota , Abhijit Chowdhuri , Jie Zhang
发明人： Krishna Kalyanasundaram , Paul Brazis , Daniel Gamota , Abhijit Chowdhuri , Jie Zhang
IPC分类号： H01B1/12
CPC分类号： H01B1/22 , H01L51/0005 , H05K1/0269 , H05K1/097 , H05K1/16 , H05K2203/161
摘要： The density (and hence thickness) of a functional ink layer (41) as comprises a part of an active printed electronic component (71) is determined through interaction (13) of the functional ink with light. This information, in turn, facilitates assessment (14) of the likely corresponding electrical performance of the electronic component. When the functional ink comprises a transparent material, a dye can be added to facilitate the desired interaction and assessment.
摘要翻译：通过功能油墨与光的相互作用（13）确定包括活性印刷电子部件（71）的一部分的功能油墨层（41）的密度（因此厚度）。这些信息又有助于评估（14）电子部件可能相应的电气性能。当功能油墨包含透明材料时，可以添加染料以促进所需的相互作用和评估。

15. 发明申请

US20060001021A1 Multiple semiconductor inks apparatus and method 审中-公开
标题翻译：多种半导体油墨装置及方法
公开(公告)号：US20060001021A1
公开(公告)日：2006-01-05
申请号：US10882015
申请日：2004-06-30
申请人： Hakeem Adewole , Paul Brazis , Daniel Gamota , Jie Zhang
发明人： Hakeem Adewole , Paul Brazis , Daniel Gamota , Jie Zhang
IPC分类号： H01L29/08 , H01L21/00
CPC分类号： H01L27/283 , H01L51/0004 , H01L51/0097 , H05K1/0393 , H05K1/16 , H05K3/12 , Y02E10/549
摘要： A semiconductor device can be comprised of a substrate having a plurality of different printable semiconductor inks formed thereon. In a preferred approach at least some of these printable semiconductor inks comprise organic semiconductor material inks. These semiconductor inks can vary from one another with respect to various properties including but not limited to electrical characteristics and environmental efficacy.
摘要翻译：半导体器件可以由其上形成有多个不同的可印刷半导体油墨的衬底构成。在优选的方法中，这些可印刷半导体油墨中的至少一些包括有机半导体材料油墨。这些半导体油墨可以相对于包括但不限于电特性和环境功效的各种性质彼此不同。

16. 发明申请

US20050273552A1 Method and apparatus for reading and writing to solid-state memory 审中-公开
公开(公告)号：US20050273552A1
公开(公告)日：2005-12-08
申请号：US11197275
申请日：2005-08-04
申请人： Paul Brazis , Thomas Tirpak , Kin Tsui , Krishna Kalyanasundaram , Daniel Gamota
发明人： Paul Brazis , Thomas Tirpak , Kin Tsui , Krishna Kalyanasundaram , Daniel Gamota
IPC分类号： G11C7/10 , G11C8/12 , G06F12/00
CPC分类号： G11C8/12 , G06F3/061 , G06F3/0616 , G06F3/0625 , G06F3/064 , G06F3/0679 , G11C7/1006 , Y02D10/154
摘要： A method and apparatus for writing to solid-state memory is provided herein. In particular, a controller is provided that monitors operating parameters of each die within the system. In order to enable fast, real-time write operations, feedback from each die is analyzed and compared with a stored set of operating parameters. Based on this comparison, a particular die is chosen for write operations such that system performance is optimized.

17. 发明申请

US20050176196A1 Method of fabricating organic field effect transistors 失效
标题翻译：制造有机场效应晶体管的方法
公开(公告)号：US20050176196A1
公开(公告)日：2005-08-11
申请号：US11102166
申请日：2005-04-08
申请人： Jie Zhang , Paul Brazis , Daniel Gamota , Krishna Kalyanasundaram , Min-Xian Zhang
发明人： Jie Zhang , Paul Brazis , Daniel Gamota , Krishna Kalyanasundaram , Min-Xian Zhang
IPC分类号： H01L51/00 , H01L51/30 , H01L51/40 , H01L21/00 , H01L21/8234
CPC分类号： H01L51/0516 , H01L51/0024 , H01L51/0036 , H01L51/0051 , H01L51/0078 , H01L51/0084
摘要： Organic field effect transistors (OFETs) can be created rapidly and at low cost on organic films by using a multilayer film (202) that has an electrically conducting layer (204, 206) on each side of a dielectric core. The electrically conducting layer is patterned to form gate electrodes (214), and a polymer film (223) is attached onto the gate electrode side of the multilayer dielectric film, using heat and pressure (225) or an adhesive layer (228). A source electrode and a drain electrode (236) are then fashioned on the remaining side of the multilayer dielectric film, and an organic semiconductor (247) is deposited over the source and drain electrodes, so as to fill the gap between the source and drain electrodes and touch a portion of the dielectric film to create an organic field effect transistor.
摘要翻译：有机场效应晶体管（OFET）可以通过使用在介质芯的每一侧上具有导电层（204,206）的多层膜（202）在有机膜上快速且低成本地产生。图案化导电层以形成栅电极（214），并且使用热和压力（225）或粘合剂层（228）将聚合物膜（223）附着到多层电介质膜的栅电极侧。然后在多层电介质膜的剩余侧上形成源电极和漏电极（236），并且在源电极和漏电极上沉积有机半导体（247），以填充源极和漏极之间的间隙电极并且接触电介质膜的一部分以产生有机场效应晶体管。

18. 发明授权

US06868352B2 Organic semiconductor product state monitor 失效
标题翻译：有机半导体产品状态监视器
公开(公告)号：US06868352B2
公开(公告)日：2005-03-15
申请号：US10420616
申请日：2003-04-22
申请人： Hakeem Adewole , Paul Brazis , Daniel Gamota , Jie Zhang
发明人： Hakeem Adewole , Paul Brazis , Daniel Gamota , Jie Zhang
IPC分类号： G06F19/00 , H01L20060101
CPC分类号： G06K19/0723 , G06K19/0717 , G06K19/07703
摘要： An organic semiconductor product state monitor attached to a product receives a product usefulness input, which, along with the product predetermined usefulness limit, is used to determine an indicator command to indicate a state of usefulness of the product. An organic circuit is formed and placed on a product with a power supply to control the circuit operation.
摘要翻译：附加到产品的有机半导体产品状态监视器接收产品有用性输入，其与产品预定有用限制一起用于确定指示产品有用状态的指示符命令。形成有机电路并放置在具有电源的产品上以控制电路操作。

19. 发明授权

US06661024B1 Integrated circuit including field effect transistor and method of manufacture 失效
标题翻译：集成电路包括场效应晶体管及其制造方法
公开(公告)号：US06661024B1
公开(公告)日：2003-12-09
申请号：US10187737
申请日：2002-07-02
申请人： Jie Zhang , Paul Brazis , Daniel Gamota , Krishna Kalyanasundaram , Steven Scheifers , Jerzy Wielgus , Abhijit Roy Chowdhuri
发明人： Jie Zhang , Paul Brazis , Daniel Gamota , Krishna Kalyanasundaram , Steven Scheifers , Jerzy Wielgus , Abhijit Roy Chowdhuri
IPC分类号： H01L3524
CPC分类号： H01L51/0516 , B82Y10/00 , H01L27/283 , H01L51/0024 , H01L51/0036 , H01L51/0038 , H01L51/0046 , H01L51/0052 , H01L51/0053 , H01L51/0078 , H01L51/0097 , H01L51/0512 , H01L51/0541 , H01L51/0545
摘要： An integrated circuit (100, 200, 300, 400) that includes a field effect transistor (102, 202, 302, 402) is fabricated by forming an organic semiconductor channel (112, 216, 308, 418) on one substrate (106, 204), forming device electrodes (114, 116, 110, 208, 210, 212) on one or more other substrates (104, 108, 206), and subsequently laminating the substrates together. In one embodiment, a dielectric patch (214) that functions as a gate dielectric is formed on one of the substrates (204, 206) prior to performing the lamination. Lamination provides a low cost route to device assembly, allows for separate fabrication of different device structures on different substrates, and thins various device layers resulting in improved performance.
摘要翻译：包括场效应晶体管（102,202,302,402）的集成电路（100,200,300,400）通过在一个衬底上形成有机半导体沟道（112,216,308,418）来制造， 204），在一个或多个其它衬底（104,108,206）上形成器件电极（114,116,110,208,210,212），然后将衬底层叠在一起。在一个实施例中，在执行层压之前，在一个基板（204,206）上形成用作栅极电介质的电介质贴片（214）。层压为器件组装提供了低成本的途径，允许在不同衬底上单独制造不同的器件结构，并且使各种器件层产生改善的性能。

20. 发明申请

US20070090459A1 Multiple gate printed transistor method and apparatus 审中-公开
标题翻译：多栅极印刷晶体管的方法和装置
公开(公告)号：US20070090459A1
公开(公告)日：2007-04-26
申请号：US11259492
申请日：2005-10-26
申请人： Jie Zhang , Hakeem Adewole , Paul Brazis , Timothy Collins , Daniel Gamota , John Szczech , Jerzy Wielgus
发明人： Jie Zhang , Hakeem Adewole , Paul Brazis , Timothy Collins , Daniel Gamota , John Szczech , Jerzy Wielgus
IPC分类号： H01L27/12
CPC分类号： H01L51/0554 , H01L27/1292 , H01L29/78681 , H01L29/7869 , H01L51/0004 , H01L51/0022
摘要： A printed transistor has a first gate (202) printed and disposed on a first side of a printed deposit of semiconductor material (201) and a second printed gate (301) disposed on an opposite side of the printed deposit of semiconductor material. By one approach these elements are provided using a serial printing process. By another approach these elements are provided through use of a lamination process.
摘要翻译：印刷晶体管具有印刷并设置在半导体材料（201）的印刷沉积物的第一侧上的第一栅极（202）和设置在半导体材料的印刷沉积物的相对侧上的第二印刷栅极（301）。通过一种方法，使用串行打印处理提供这些元件。通过另一种方法，通过使用层压方法提供这些元件。

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