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    • 11. 发明授权
    • Electronic video game
    • 电子游戏
    • US4179124A
    • 1979-12-18
    • US859937
    • 1977-12-12
    • Jed Margolin
    • Jed Margolin
    • A63F13/00G09G5/42A63F9/02
    • A63F13/40A63F13/00G09G5/42A63F2300/203
    • An electronic game in which a standard television receiver may be a terminal is fed by an interface device which is in turn interconnected to first and second controllers, the first controller interacts with a matrix or display memory, which may be a read-only-memory (ROM) which is controlled by a matrix selector register. The first controller also has a matrix address register which feeds it. The second controller is fed by a dot address register. The matrix memory stores the digital data to control the matrix image desired to be displayed. The controller contains X and Y display address counters which indicate the position of the video beam on a grid at any given time. When the addresses of the beam coincide with the addresses of the positions stored in the memory as determined by a comparator the matrix will be displayed. A similar structure is utilized for a dot display (normally smaller) matrix in which the X and Y display address registers have a dual function working for both dot display and matrix display positions of the game and use a second comparator to control the output of the dot display.
    • 其中标准电视接收机可以是终端的电子游戏由接口设备馈送,接口设备又互连到第一和第二控制器,第一控制器与矩阵或显示存储器交互,矩阵或显示存储器可以是只读存储器 (ROM),其由矩阵选择器寄存器控制。 第一个控制器还有一个矩阵地址寄存器,用于馈送它。 第二个控制器由点地址寄存器馈送。 矩阵存储器存储数字数据以控制期望显示的矩阵图像。 控制器包含X和Y显示地址计数器,用于指示任何给定时间的视频光束在网格上的位置。 当光束的地址与比较器确定的存储在存储器中的位置的地址一致时,将显示矩阵。 类似的结构用于点显示(通常较小的)矩阵,其中X和Y显示地址寄存器具有双重功能,用于游戏的点显示和矩阵显示位置,并且使用第二比较器来控制 点显示。
    • 13. 发明授权
    • Memory with integrated programmable controller
    • 带集成可编程控制器的内存
    • US07360130B2
    • 2008-04-15
    • US11130939
    • 2005-05-17
    • Jed Margolin
    • Jed Margolin
    • G11C29/00
    • G11C29/16G11C29/006G11C2029/2602
    • An internal processing capability is added to a computer memory by adding a small processor, a small amount of processor RAM memory, a small amount of non-volatile memory, and some logic. During wafer testing the internal processor system allows the memory to be tested at full speed and substantially simultaneously with the testing of other memories on the wafer. At any stage after packaging, the part can be tested by having the host processor read the non-volatile memory, determine what test program to use, load it into the RAM memory, and run the Self-Test program. The internal processor system also allows additional functions such as data searching, data moving, and graphics primitives to be performed entirely within the memory.
    • 通过添加小型处理器,少量处理器RAM存储器,少量非易失性存储器和一些逻辑来将内部处理能力添加到计算机存储器。 在晶片测试期间,内部处理器系统允许以全速测试存储器,并且与晶片上的其它存储器的测试基本上同时进行测试。 在打包后的任何阶段,可以通过让主机处理器读取非易失性存储器,确定要使用的测试程序,将其加载到RAM存储器中并运行自检程序来测试该部件。 内部处理器系统还允许在存储器内完全执行附加功能,例如数据搜索,数据移动和图形原语。
    • 18. 发明申请
    • SYSTEM FOR SENSING AIRCRAFT AND OTHER OBJECTS
    • 用于感应飞机和其他物体的系统
    • US20130176163A1
    • 2013-07-11
    • US13594815
    • 2012-08-25
    • Jed Margolin
    • Jed Margolin
    • G01S13/00G01S13/93
    • G01S13/003G01S5/12G01S11/02G01S13/9303
    • A system for sensing aircraft and other objects uses bistatic radar with spread-spectrum signals transmitted from remotely located sources such as aircraft flying at very high altitudes or from a satellite constellation. A bistatic spread spectrum radar system using a satellite constellation can be integrated with a communications system and/or with a system using long baseline radar interferometry to validate the digital terrain elevation database. The reliability and safety of TCAS and ADS-B are improved by using the signals transmitted from a TCAS or ADS-B unit as a radar transmitter with a receiver used to receive reflections. Aircraft and other objects using spread spectrum radar are detected by using two separate receiving systems. Cross-Correlation between the outputs of the two receiving systems reveals whether a noise signal is produced by the receiving systems themselves or is coming from the outside.
    • 用于感测飞机和其他物体的系统使用双基地雷达,其具有从远程位置的源传输的扩频信号,例如飞行器在非常高的高度飞行或从卫星星座飞行。 使用卫星星座的双稳态扩频雷达系统可以与通信系统和/或与使用长基线雷达干涉测量的系统集成以验证数字地形高程数据库。 通过使用从TCAS或ADS-B单元发送的信号作为具有用于接收反射的接收机的雷达发射机,提高了TCAS和ADS-B的可靠性和安全性。 使用扩频雷达的飞机和其他物体通过使用两个独立的接收系统进行检测。 两个接收系统的输出之间的交叉相关性揭示了噪声信号是由接收系统本身产生的还是来自外部的。
    • 19. 发明申请
    • System for sensing aircraft and other objects
    • 用于感应飞机和其他物体的系统
    • US20110169684A1
    • 2011-07-14
    • US12910779
    • 2010-10-22
    • Jed Margolin
    • Jed Margolin
    • G01S13/93G01S13/75
    • G01S13/003G01S5/12G01S11/02G01S13/9303
    • A system for sensing aircraft and other objects uses bistatic radar with spread-spectrum signals transmitted from remotely located sources such as aircraft flying at very high altitudes or from a satellite constellation. A bistatic spread spectrum radar system using a satellite constellation can be integrated with a communications system and/or with a system using long baseline radar interferometry to validate the digital terrain elevation database. The reliability and safety of TCAS and ADS-B are improved by using the signals transmitted from a TCAS or ADS-B unit as a radar transmitter with a receiver used to receive reflections. Aircraft and other objects using spread spectrum radar are detected by using two separate receiving systems. Cross-Correlation between the outputs of the two receiving systems reveals whether a noise signal is produced by the receiving systems themselves or is coming from the outside.
    • 用于感测飞机和其他物体的系统使用双基地雷达,其具有从远程位置的源传输的扩频信号,例如飞行器在非常高的高度飞行或从卫星星座飞行。 使用卫星星座的双稳态扩频雷达系统可以与通信系统和/或与使用长基线雷达干涉测量的系统集成以验证数字地形高程数据库。 通过使用从TCAS或ADS-B单元发送的信号作为具有用于接收反射的接收机的雷达发射机,提高了TCAS和ADS-B的可靠性和安全性。 使用扩频雷达的飞机和其他物体通过使用两个独立的接收系统进行检测。 两个接收系统的输出之间的交叉相关性揭示了噪声信号是由接收系统本身产生的还是来自外部的。
    • 20. 发明申请
    • Memory with integrated programmable controller
    • 带集成可编程控制器的内存
    • US20050258456A1
    • 2005-11-24
    • US11130939
    • 2005-05-17
    • Jed Margolin
    • Jed Margolin
    • G11C29/00G11C29/16H01L21/335H01L29/76
    • G11C29/16G11C29/006G11C2029/2602
    • An internal processing capability is added to a computer memory by adding a small processor, a small amount of processor RAM memory, a small amount of non-volatile memory, and some logic. During wafer testing the internal processor system allows the memory to be tested at full speed and substantially simultaneously with the testing of other memories on the wafer. At any stage after packaging, the part can be tested by having the host processor read the non-volatile memory, determine what test program to use, load it into the RAM memory, and run the Self-Test program. The internal processor system also allows additional functions such as data searching, data moving, and graphics primitives to be performed entirely within the memory.
    • 通过添加小型处理器,少量处理器RAM存储器,少量非易失性存储器和一些逻辑来将内部处理能力添加到计算机存储器。 在晶片测试期间,内部处理器系统允许以全速测试存储器,并且与晶片上的其它存储器的测试基本上同时进行测试。 在打包后的任何阶段,可以通过让主机处理器读取非易失性存储器,确定要使用的测试程序,将其加载到RAM存储器中并运行自检程序来测试该部件。 内部处理器系统还允许在存储器内完全执行附加功能,例如数据搜索,数据移动和图形原语。