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11. 发明授权

US07078244B2 Multi-bit MRAM device with switching nucleation sites 有权
公开(公告)号：US07078244B2
公开(公告)日：2006-07-18
申请号：US11112815
申请日：2005-04-21
申请人： Janice H. Nickel , Manoj K. Bhattacharyya
发明人： Janice H. Nickel , Manoj K. Bhattacharyya
IPC分类号： H01L21/00
CPC分类号： H01L43/08 , G11C11/15 , G11C11/16 , G11C11/5607 , G11C2211/5615 , G11C2211/5616
摘要： A magnetic memory cell includes a first magneto-resistive device and a second magneto-resistive device. The first magneto-resistive device has a first sense layer. The second magneto-resistive device is connected in series with the first magneto-resistive device. The second magneto-resistive device has a second sense layer. At least one controlled nucleation site is placed on at least one of the first sense layer and the second sense layer.

12. 发明授权

US06862212B2 Multi-bit magnetic memory cells 有权
标题翻译：多位磁记忆体单元
公开(公告)号：US06862212B2
公开(公告)日：2005-03-01
申请号：US10697172
申请日：2003-10-30
申请人： Janice H. Nickel , Manoj Bhattacharyya
发明人： Janice H. Nickel , Manoj Bhattacharyya
IPC分类号： G11C11/14 , G11C11/15 , G11C11/16 , G11C11/56 , H01F10/30 , H01L21/8246 , H01L27/105 , H01L43/00 , H01L43/08 , G11C11/00
CPC分类号： H01L43/08 , G11C11/15 , G11C11/16 , G11C11/5607 , G11C2211/5615 , G11C2211/5616 , H01F10/3254 , H01F41/307 , H01L27/222
摘要： A magnetic memory cell includes first and second magneto-resistive devices connected in series. The first and second magneto-resistive devices have sense layers with different coercivities. Magnetic Random Access Memory (MRAM) devices may include arrays of these memory cells.
摘要翻译：磁存储单元包括串联连接的第一和第二磁阻元件。第一和第二磁阻装置具有不同矫顽力的感应层。磁性随机存取存储器（MRAM）设备可以包括这些存储器单元的阵列。

13. 发明授权

US06858883B2 Partially processed tunnel junction control element 失效
标题翻译：部分处理隧道结控制元件
公开(公告)号：US06858883B2
公开(公告)日：2005-02-22
申请号：US10454552
申请日：2003-06-03
申请人： Peter J. Fricke , Janice H. Nickel , Andrew L. Van Brocklin
发明人： Peter J. Fricke , Janice H. Nickel , Andrew L. Van Brocklin
IPC分类号： H01L27/10 , H01L29/88
CPC分类号： H01L27/2418 , H01L27/101 , H01L27/224 , H01L27/2481
摘要： A memory system, including a first electrode, a memory storage element, and a control element. The control element having a breakdown voltage. The breakdown voltage is increased by partially-processing the control element. In one aspect, the partial-processing results by processing the control element for a briefer duration than the memory storage element. In another aspect, the partial-processing results by forming the control element from a plurality of layers, some of the plurality of layers are unprocessed while other ones of the plurality of layers are fully processed.
摘要翻译：一种包括第一电极，存储器存储元件和控制元件的存储器系统。控制元件具有击穿电压。通过部分处理控制元件来增加击穿电压。在一个方面，通过处理比存储器存储元件更短的持续时间的控制元件来实现部分处理。在另一方面，通过从多个层形成控制元件的部分处理结果，多个层中的一些层是未处理的，而多个层中的其他层被完全处理。

14. 发明授权

US06819586B1 Thermally-assisted magnetic memory structures 有权
标题翻译：热辅助磁记忆体结构
公开(公告)号：US06819586B1
公开(公告)日：2004-11-16
申请号：US10692841
申请日：2003-10-24
申请人： Thomas C. Anthony , Manoj K. Bhattacharyya , Janice H. Nickel
发明人： Thomas C. Anthony , Manoj K. Bhattacharyya , Janice H. Nickel
IPC分类号： G11C1114
CPC分类号： G11C11/16 , G11C11/1675
摘要： An exemplary array of thermally-assisted magnetic memory structures, each of the memory structures comprises a memory cell, a write conductor contacting the memory cell, the write conductor selecting the memory cell in a first coordinate during a write operation, and a heating system contacting the memory cell. The heating system heats the memory cell during the write operation and selects the memory cell by the heating in a second coordinate.
摘要翻译：一种热辅助磁存储器结构的示例性阵列，每个存储结构包括存储单元，与存储单元接触的写入导体，写入导体在写入操作期间以第一坐标选择存储单元，以及加热系统接触存储单元。加热系统在写入操作期间加热存储单元，并通过加热在第二坐标中选择存储单元。

15. 发明授权

US06603678B2 Thermally-assisted switching of magnetic memory elements 有权
标题翻译：磁存储元件的热辅助切换
公开(公告)号：US06603678B2
公开(公告)日：2003-08-05
申请号：US09758757
申请日：2001-01-11
申请人： Janice H. Nickel , Lung T. Tran
发明人： Janice H. Nickel , Lung T. Tran
IPC分类号： G11C1114
CPC分类号： G11C11/16 , G11C11/1675
摘要： A magnetic memory element is written to by heating the memory element and applying at least one magnetic field to the memory element. The memory element is heated via heating lines which can be formed in a single path or plurality of paths. Each path has one end tied to a reference potential, and the other end coupled to a current source via a transistor.
摘要翻译：通过加热存储元件并将至少一个磁场施加到存储元件来写入磁存储元件。存储元件通过可以以单个路径或多个路径形成的加热线进行加热。每个路径的一端连接到参考电位，另一端通过晶体管耦合到电流源。

16. 发明授权

US06475812B2 Method for fabricating cladding layer in top conductor 有权
标题翻译：在顶部导体中制作包层的方法
公开(公告)号：US06475812B2
公开(公告)日：2002-11-05
申请号：US09802650
申请日：2001-03-09
申请人： Janice H. Nickel , Thomas C. Anthony
发明人： Janice H. Nickel , Thomas C. Anthony
IPC分类号： H01L2100
CPC分类号： H01L27/222 , B82Y10/00 , G11C11/16
摘要： A method for cladding two or three sides of a top conductor for a magnetic memory device in ferromagnetic material includes forming a trench with side walls in a coating layer above the memory device. A first ferromagnetic material is deposited along the side walls of the trench. Any ferromagnetic material in a bottom of the trench can be removed. A conductor material is deposited in the trench over the memory device. A second ferromagnetic material is deposited over the conductor material in the trench to form a cladding of the ferromagnetic material around three side of the conductor.
摘要翻译：用于包覆铁磁材料中的磁存储器件的顶部导体的两侧或三侧的方法包括在存储器件上方的涂层中形成具有侧壁的沟槽。第一铁磁材料沿沟槽的侧壁沉积。可以去除沟槽底部的任何铁磁材料。导体材料沉积在存储器件上的沟槽中。第二铁磁材料沉积在沟槽中的导体材料上，以形成围绕导体三侧的铁磁材料的包层。

17. 发明授权

US11591020B1 Navigation infrastructure for motor vehicles 有权
公开(公告)号：US11591020B1
公开(公告)日：2023-02-28
申请号：US15260266
申请日：2016-09-08
申请人： Janice H. Nickel
发明人： Janice H. Nickel
IPC分类号： B62D15/02 , G01C21/26 , G05D1/02 , H01Q1/32 , G06K7/10
摘要： A transit system includes a road, a plurality of pavement markers spaced apart along a lane line of the road, and a plurality of RF devices carried by the pavement markers. The RF devices are configured to transmit RF navigation signals to motor vehicles traveling along the road.

18. 发明申请

US20210294331A1 Object identification for autonomous road vehicles 有权
公开(公告)号：US20210294331A1
公开(公告)日：2021-09-23
申请号：US17339986
申请日：2021-06-05
申请人： Janice H. Nickel , Bryan H. Nickel
发明人： Janice H. Nickel , Bryan H. Nickel
IPC分类号： G05D1/02 , G08G1/16 , B60W30/09 , B60W30/18 , B60W30/14 , B60W30/12 , B60W10/18 , B60W10/20 , G06K9/00 , G06K19/07
摘要： An autonomous road vehicle includes means for receiving wireless identification signals during vehicle navigation and using the wireless identification signals to determine position and identification of nearby road objects. The autonomous road vehicle further includes an autonomous vehicle control system responsive to the positions and the identifications.

19. 发明授权

US09588888B2 Memory device and method for altering performance characteristic based on bandwidth demand 有权
标题翻译：基于带宽需求改变性能特征的存储器件和方法
公开(公告)号：US09588888B2
公开(公告)日：2017-03-07
申请号：US12847907
申请日：2010-07-30
申请人： Janice H. Nickel , Gilberto Ribeiro
发明人： Janice H. Nickel , Gilberto Ribeiro
IPC分类号： G06F12/00 , G11C13/00 , G06F12/08
CPC分类号： G06F12/0802 , G06F2212/2024 , G06F2212/601 , G11C13/0002 , G11C13/0007 , G11C13/0069 , G11C2213/77
摘要： A memory device and method for altering a performance characteristic of a memory array to increase a rate at which the memory device writes data in response to the memory device experiencing a demand for bandwidth above a threshold. The memory device may include a memory controller and a memory array, which may include memristive memory elements. To alter a performance characteristic, for example, the memristive memory elements may be written at sub-full resistive states which have a smaller difference between high and low resistive states, and/or the memory controller may disable a subset of memory elements and/or memory cells along a bit line and/or word line of the memory array. The subset of memory elements may be re-enable in response to the demand for bandwidth falling below the threshold, and data may be moved and/or rearranged within the memory device when the subset of memory elements is re-enabled. Altering the performance characteristic may increase a rate at which the memory device writes data.
摘要翻译：一种用于改变存储器阵列的性能特性以增加存储器件响应于经历对带宽高于阈值的需求而写入数据的速率的存储器件和方法。存储器设备可以包括存储器控制器和存储器阵列，其可以包括忆阻存储器元件。为了改变性能特征，例如，忆阻存储器元件可以被写入在低电阻状态和低电阻状态之间具有较小差异的亚满电阻状态，和/或存储器控制器可以禁用存储器元件的子集和/或沿存储器阵列的位线和/或字线的存储器单元。存储器元件的子集可以响应于对带宽的要求低于阈值而被重新启用，并且当存储器元件的子集被重新启用时，数据可以被移动和/或重新排列在存储器设备内。改变性能特征可以增加存储器件写入数据的速率。

20. 发明授权

US08658463B2 Memristor with embedded switching layer 有权
标题翻译：带有嵌入式开关层的忆阻器
公开(公告)号：US08658463B2
公开(公告)日：2014-02-25
申请号：US13562063
申请日：2012-07-30
申请人： Janice H. Nickel , Matthew D. Pickett
发明人： Janice H. Nickel , Matthew D. Pickett
IPC分类号： H01L21/00 , H01L21/16 , H01L21/20 , H01L47/00 , H01L29/76 , H01L29/94 , H01L31/062 , H01L31/113 , H01L31/119
CPC分类号： H01L27/2481 , H01L45/08 , H01L45/1233 , H01L45/1266 , H01L45/145 , H01L45/146 , H01L45/1633
摘要： A method of making a memristor having an embedded switching layer include exposing a surface portion of a first electrode material within a via to a reactive species to form the switching layer embedded within and at surface of the via. The via is in contact with a first conductor trace. The method further includes depositing a layer of a second electrode material adjacent to the via surface and patterning the layer into a column aligned with the via. The method further includes depositing an interlayer dielectric material to surround the column and providing a second conductor trace in electrical contact with the second electrode material of the column.
摘要翻译：制造具有嵌入式切换层的忆阻器的方法包括将通孔内的第一电极材料的表面部分暴露于反应性物质，以形成嵌入通孔内和表面的开关层。通孔与第一导体迹线接触。该方法还包括沉积与通孔表面相邻的第二电极材料层，并将该层图案化成与通孔对齐的列。该方法还包括沉积层间绝缘材料以围绕该柱并提供与该柱的第二电极材料电接触的第二导体迹线。

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