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11. 发明授权

US07389508B2 System and method for grouping processors and assigning shared memory space to a group in heterogeneous computer environment 有权
标题翻译：用于将处理器分组并将共享内存空间分配给异构计算机环境中的组的系统和方法
公开(公告)号：US07389508B2
公开(公告)日：2008-06-17
申请号：US10670833
申请日：2003-09-25
申请人： Maximino Aguilar, Jr. , Michael Norman Day , Mark Richard Nutter , James Xenidis
发明人： Maximino Aguilar, Jr. , Michael Norman Day , Mark Richard Nutter , James Xenidis
IPC分类号： G06F9/46 , G06F12/00 , G06F13/00
CPC分类号： G06F9/5061 , G06F2209/5012
摘要： A system and method for grouping processors is presented. A processing unit (PU) initiates an application and identifies the application's requirements. The PU assigns one or more synergistic processing units (SPUs) and a memory space to the application in the form of a group. The application specifies whether the task requires shared memory or private memory. Shared memory is a memory space that is accessible by the SPUs and the PU. Private memory, however, is a memory space that is only accessible by the SPUs that are included in the group. When the application executes, the resources within the group are allocated to the application's execution thread. Each group has its own group properties, such as address space, policies (i.e. real-time, FIFO, run-to-completion, etc.) and priority (i.e. low or high). These group properties are used during thread execution to determine which groups take precedence over other tasks.
摘要翻译：提出了一种用于分组处理器的系统和方法。处理单元（PU）启动应用程序并识别应用程序的要求。 PU以组的形式向应用分配一个或多个协同处理单元（SPU）和存储器空间。应用程序指定任务是否需要共享内存或专用内存。共享内存是可由SPU和PU访问的内存空间。然而，专用内存是只能由组中包含的SPU访问的内存空间。当应用程序执行时，组内的资源被分配给应用程序的执行线程。每个组都有自己的组属性，如地址空间，策略（即实时，FIFO，运行完成等）和优先级（即低或高）。在线程执行期间使用这些组属性来确定哪些组优先于其他任务。

12. 发明授权

US07290112B2 System and method for virtualization of processor resources 有权
标题翻译：处理器资源虚拟化的系统和方法
公开(公告)号：US07290112B2
公开(公告)日：2007-10-30
申请号：US10955093
申请日：2004-09-30
申请人： Maximino Aguilar, Jr. , Michael Norman Day , Mark Richard Nutter , James Xenidis
发明人： Maximino Aguilar, Jr. , Michael Norman Day , Mark Richard Nutter , James Xenidis
IPC分类号： G06F12/00
CPC分类号： G06F12/109 , G06F12/0284 , G06F12/1045
摘要： A system and method for virtualization of processor resources is presented. A thread is created on a processor and the processor's local memory is mapped into an effective address space. In doing so, the processor's local memory is accessible by other processors, regardless of whether the processor is running. Additional threads create additional local memory mappings into the effective address space. The effective address space corresponds to either a physical local memory or a “soft” copy area. When the processor is running, a different processor may access data that is located in the first processor's local memory from the processor's local storage area. When the processor is not running, a softcopy of the processor's local memory is stored in a memory location (i.e. locked cache memory, pinned system memory, virtual memory, etc.) for other processors to continue accessing.
摘要翻译：提出了一种用于处理器资源虚拟化的系统和方法。在处理器上创建线程，并将处理器的本地内存映射到有效的地址空间。这样做，处理器的本地内存可以由其他处理器访问，无论处理器是否正在运行。附加线程会在有效地址空间中创建额外的本地内存映射。有效地址空间对应于物理本地存储器或“软”复制区域。当处理器运行时，不同的处理器可以从处理器的本地存储区域访问位于第一处理器的本地存储器中的数据。当处理器未运行时，处理器的本地存储器的软拷贝存储在其他处理器的存储器位置（即锁定的高速缓冲存储器，固定的系统存储器，虚拟存储器等）中以继续访问。

13. 发明申请

US20050081201A1 System and method for grouping processors 有权
标题翻译：用于分组处理器的系统和方法
公开(公告)号：US20050081201A1
公开(公告)日：2005-04-14
申请号：US10670833
申请日：2003-09-25
申请人： Maximino Aguilar , Michael Day , Mark Nutter , James Xenidis
发明人： Maximino Aguilar , Michael Day , Mark Nutter , James Xenidis
IPC分类号： G06F9/46 , G06F9/50
CPC分类号： G06F9/5061 , G06F2209/5012
摘要： A system and method for grouping processors is presented. A processing unit (PU) initiates an application and identifies the application's requirements. The PU assigns one or more synergistic processing units (SPUs) and a memory space to the application in the form of a group. The application specifies whether the task requires shared memory or private memory. Shared memory is a memory space that is accessible by the SPUs and the PU. Private memory, however, is a memory space that is only accessible by the SPUs that are included in the group. When the application executes, the resources within the group are allocated to the application's execution thread. Each group has its own group properties, such as address space, policies (i.e. real-time, FIFO, run-to-completion, etc.) and priority (i.e. low or high). These group properties are used during thread execution to determine which groups take precedence over other tasks.
摘要翻译：提出了一种用于分组处理器的系统和方法。处理单元（PU）启动应用程序并识别应用程序的要求。 PU以组的形式向应用分配一个或多个协同处理单元（SPU）和存储器空间。应用程序指定任务是否需要共享内存或专用内存。共享内存是可由SPU和PU访问的内存空间。然而，专用内存是只能由组中包含的SPU访问的内存空间。当应用程序执行时，组内的资源被分配给应用程序的执行线程。每个组都有自己的组属性，如地址空间，策略（即实时，FIFO，运行完成等）和优先级（即低或高）。在线程执行期间使用这些组属性来确定哪些组优先于其他任务。

14. 发明申请

US20140013073A1 USING LARGE FRAME PAGES WITH VARIABLE GRANULARITY 有权
标题翻译：使用可变尺寸的大框架页
公开(公告)号：US20140013073A1
公开(公告)日：2014-01-09
申请号：US13541055
申请日：2012-07-03
申请人： Ahmed Gheith , Eric Van Hensbergen , James Xenidis
发明人： Ahmed Gheith , Eric Van Hensbergen , James Xenidis
IPC分类号： G06F12/10
CPC分类号： G06F12/1009 , G06F12/109
摘要： The page tables in existing art are modified to allow virtual address resolution by mapping to multiple overlapping entries, and resolving a physical address from the most specific entry. This enables more efficient use of system resources by allowing smaller frames to shadow larger frames. A page table is selected. When a virtual address in a request corresponds to an entry in the page table, which identifies a next page table associated with the large frame, a determination is made that the virtual address corresponds to an entry in the next page table, the entry in the next page table referencing a small frame overlay for the large frame. The virtual address is mapped to a physical address in the small frame overlay using data of the entry in the next page table. The physical address in a process-specific view of the large frame is returned.
摘要翻译：现有技术中的页表被修改为允许通过映射到多个重叠条目来实现虚拟地址解析，并从最特定的条目解析物理地址。通过允许较小的帧来遮蔽较大的帧，这样可以更有效地利用系统资源。选择页表。当请求中的虚拟地址对应于页表中的与大帧相关联的下一页表的条目时，确定虚拟地址对应于下一页表中的条目，引用大帧的小帧覆盖的下一页表。使用下一页表中条目的数据将虚拟地址映射到小帧覆盖中的物理地址。返回大帧的进程特定视图中的物理地址。

15. 发明授权

US08615644B2 Processor with hardware thread control logic indicating disable status when instructions accessing shared resources are completed for safe shared resource condition 有权
标题翻译：具有硬件线程控制逻辑的处理器，指示访问共享资源的指令在安全共享资源状态完成时指示禁用状态
公开(公告)号：US08615644B2
公开(公告)日：2013-12-24
申请号：US12708791
申请日：2010-02-19
申请人： Becky Bruce , Giles R. Frazier , Bradly G. Frey , Kumar K. Gala , Cathy May , Michael D. Snyder , Gary Whisenhunt , James Xenidis
发明人： Becky Bruce , Giles R. Frazier , Bradly G. Frey , Kumar K. Gala , Cathy May , Michael D. Snyder , Gary Whisenhunt , James Xenidis
IPC分类号： G06F9/38
CPC分类号： G06F9/30101 , G06F9/30123 , G06F9/3851 , G06F9/3857
摘要： A technique for indicating a safe shared resource condition with respect to a disabled thread provides a mechanism for providing a fast indication to other hardware threads that a temporarily disabled thread can no longer impact shared resources, such as shared special-purpose registers and translation look-aside buffers within the processor core. Signals from pipelines within the core indicates whether any of the instructions pending in the pipeline impact the shared resources and if not, then the thread disable status is presented to the other threads via a state change in a thread status register. Upon receiving an indication that a particular hardware thread is to be disabled, control logic halts the dispatch of instructions for the particular hardware thread, and then waits until any indication that a shared resource is impacted by an instruction has cleared. Then the control logic updates the thread status to indicate the thread is disabled.
摘要翻译：用于指示关于被禁用线程的安全共享资源状况的技术提供了一种用于向其他硬件线程提供快速指示的机制，临时禁用的线程不再影响共享资源，例如共享专用寄存器和翻译查找，处理器核心内的缓冲区。来自核心内的流水线的信号表示流水线中的任何待执行的任何指示是否影响共享资源，如果没有，则通过线程状态寄存器中的状态更改将线程禁用状态呈现给其他线程。在接收到特定硬件线程被禁用的指示时，控制逻辑停止对特定硬件线程的指令的分派，然后等待直到由指令影响共享资源的任何指示已经被清除。然后控制逻辑更新线程状态以指示线程被禁用。

16. 发明申请

US20110154351A1 Tunable Error Resilience Computing 有权
标题翻译：可调整错误弹性计算
公开(公告)号：US20110154351A1
公开(公告)日：2011-06-23
申请号：US12642908
申请日：2009-12-21
申请人： Daniel J. Henderson , Prabhakar N. Kudva , Naresh Nayar , Pia Naoko Sanda , David W. Siegel , James L. Van Oosten , James Xenidis
发明人： Daniel J. Henderson , Prabhakar N. Kudva , Naresh Nayar , Pia Naoko Sanda , David W. Siegel , James L. Van Oosten , James Xenidis
IPC分类号： G06F9/46
CPC分类号： G06F9/5027 , Y02D10/22
摘要： An attribute of a descriptor associated with a task informs a runtime environment of which instructions a processor is to run to schedule a plurality of resources for completion of the task in accordance with a level of quality of service in a service level agreement.
摘要翻译：与任务相关联的描述符的属性通知运行时环境处理器将要运行的指令，以根据服务级别协议中的服务质量级别来调度用于完成任务的多个资源。

17. 发明授权

US07748006B2 Loading software on a plurality of processors 失效
标题翻译：在多个处理器上加载软件
公开(公告)号：US07748006B2
公开(公告)日：2010-06-29
申请号：US12131348
申请日：2008-06-02
申请人： Maximino Aguilar, Jr. , Alex Chunghen Chow , Michael Norman Day , Michael Stan Gowen , Mark Richard Nutter , James Xenidis
发明人： Maximino Aguilar, Jr. , Alex Chunghen Chow , Michael Norman Day , Michael Stan Gowen , Mark Richard Nutter , James Xenidis
IPC分类号： G06F9/46 , G06F9/44 , G06F9/445 , G06F15/16
CPC分类号： G06F9/44557 , G06F9/44526
摘要： Loading software on a plurality of processors is presented. A processing unit (PU) retrieves a file from system memory and loads it into its internal memory. The PU extracts a processor type from the file's header which identifies whether the file should execute on the PU or a synergistic processing unit (SPU). If an SPU should execute the file, the PU DMA's the file to the SPU for execution. In one embodiment, the file is a combined file which includes both PU and SPU code. In this embodiment, the PU identifies one or more section headers included in the file which indicates embedded SPU code within the combined file. In this embodiment, the PU extracts the SPU code from the combined file and DMA's the extracted code to an SPU for execution.
摘要翻译：在多个处理器上加载软件。处理单元（PU）从系统存储器检索文件并将其加载到其内部存储器中。 PU从文件头中提取一种处理器类型，用于标识文件是否应在PU或协同处理单元（SPU）上执行。如果SPU应该执行该文件，PU DMA将该文件提交给SPU执行。在一个实施例中，该文件是包括PU和SPU代码的组合文件。在该实施例中，PU识别包括在文件中的一个或多个区段标题，其指示组合文件内的嵌入式SPU代码。在本实施例中，PU从组合文件中提取SPU代码，并将提取的代码DMA提取给SPU以执行。

18. 发明申请

US20100049883A1 METHOD AND SYSTEM FOR MEMORY ADDRESS TRANSLATION AND PINNING 审中-公开
标题翻译：用于存储器翻译和引导的方法和系统
公开(公告)号：US20100049883A1
公开(公告)日：2010-02-25
申请号：US12568712
申请日：2009-09-29
申请人： Shmuel Ben-Yehuda , Scott Guthridge , Orran Yaakov Krieger , Zorik Machulsky , Julian Satran , Leah Shalev , Ilan Shimony , James Xenidis
发明人： Shmuel Ben-Yehuda , Scott Guthridge , Orran Yaakov Krieger , Zorik Machulsky , Julian Satran , Leah Shalev , Ilan Shimony , James Xenidis
IPC分类号： G06F13/28 , G06F12/10
CPC分类号： G06F12/1081 , G06F12/126 , G06F2212/1016 , G06F2212/1044
摘要： A method and system for memory address translation and pinning are provided. The method includes attaching a memory address space identifier to a direct memory access (DMA) request, the DMA request is sent by a consumer and using a virtual address in a given address space. The method further includes looking up for the memory address space identifier to find a translation of the virtual address in the given address space used in the DMA request to a physical page frame. Provided that the physical page frame is found, pinning the physical page frame as long as the DMA request is in progress to prevent an unmapping operation of said virtual address in said given address space, and completing the DMA request, wherein the steps of attaching, looking up and pinning are centrally controlled by a host gateway.
摘要翻译：提供了一种用于存储器地址转换和钉扎的方法和系统。该方法包括将存储器地址空间标识符附加到直接存储器访问（DMA）请求，DMA请求由消费者发送并且使用给定地址空间中的虚拟地址。该方法还包括查找存储器地址空间标识符以找到在DMA请求中使用的给定地址空间中的虚拟地址到物理页面帧的转换。只要找到物理页面帧，只要DMA请求正在进行，固定物理页面帧，以防止所述给定地址空间中的所述虚拟地址的解映射操作，并且完成DMA请求，其中，查找和固定由主机网关集中控制。

19. 发明申请

US20080172543A1 Device, Method and Computer Program Product for Multi-Level Address Translation 有权
标题翻译：多级地址转换的设备，方法和计算机程序产品
公开(公告)号：US20080172543A1
公开(公告)日：2008-07-17
申请号：US11623468
申请日：2007-01-16
申请人： Shmuel Ben-Yehuda , Orran Yaakov Krieger , Jon David Mason , James Xenidis
发明人： Shmuel Ben-Yehuda , Orran Yaakov Krieger , Jon David Mason , James Xenidis
IPC分类号： G06F9/34
CPC分类号： G06F12/1081
摘要： A method for retrieving information from a storage unit, the method includes: receiving, by an input output memory management unit second-level translation information representative of a partition of a storage unit address space; receiving, by a input output memory management unit, a direct memory access request that comprises a consumer identifier and a second memory address that was first-level translated by a communication circuit translation entity; performing, by the input output memory management unit, a second-level translation of the second memory address such as to provide a third memory address, in response to the identity of the consumer; and accessing the storage unit using the third memory address.
摘要翻译：一种从存储单元检索信息的方法，所述方法包括：通过输入输出存储器管理单元接收表示存储单元地址空间分区的二级转换信息; 由输入输出存储器管理单元接收直接存储器访问请求，该直接存储器访问请求包括消费者标识符和由通信电路转换实体首次翻译的第二存储器地址; 通过输入输出存储器管理单元，响应于消费者的身份，执行第二存储器地址的第二级转换，以提供第三存储器地址; 以及使用第三存储器地址访问存储单元。

20. 发明申请

US20080155203A1 Grouping processors and assigning shared memory space to a group in a heterogeneous computer environment 有权
标题翻译：将处理器分组并将共享内存空间分配给异构计算机环境中的组
公开(公告)号：US20080155203A1
公开(公告)日：2008-06-26
申请号：US12042254
申请日：2008-03-04
申请人： Maximino Aguilar , Michael Norman Day , Mark Richard Nutter , James Xenidis
发明人： Maximino Aguilar , Michael Norman Day , Mark Richard Nutter , James Xenidis
IPC分类号： G06F12/00
CPC分类号： G06F9/5061 , G06F2209/5012
摘要： Grouping processors is presented. A processing unit (PU) initiates an application and identifies the application's requirements. The PU assigns one or more synergistic processing units (SPUs) and a memory space to the application in the form of a group. The application specifies whether the task requires shared memory or private memory. Shared memory is a memory space that is accessible by the SPUs and the PU. Private memory, however, is a memory space that is only accessible by the SPUs that are included in the group. When the application executes, the resources within the group are allocated to the application's execution thread. Each group has its own group properties, such as address space, policies (i.e. real-time, FIFO, run-to-completion, etc.) and priority (i.e. low or high). These group properties are used during thread execution to determine which groups take precedence over other tasks.
摘要翻译：介绍了分组处理器。处理单元（PU）启动应用程序并识别应用程序的要求。 PU以组的形式向应用分配一个或多个协同处理单元（SPU）和存储器空间。应用程序指定任务是否需要共享内存或专用内存。共享内存是可由SPU和PU访问的内存空间。然而，专用内存是只能由组中包含的SPU访问的内存空间。当应用程序执行时，组内的资源被分配给应用程序的执行线程。每个组都有自己的组属性，如地址空间，策略（即实时，FIFO，运行完成等）和优先级（即低或高）。在线程执行期间使用这些组属性来确定哪些组优先于其他任务。

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