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    • 11. 发明申请
    • SECONDARY BATTERY
    • 二次电池
    • US20110076533A1
    • 2011-03-31
    • US12848409
    • 2010-08-02
    • Hyun-Jin CHOI
    • Hyun-Jin CHOI
    • H01M6/10H01M2/08H01M2/02
    • H01M10/0431H01M2/0217H01M2/0426H01M2/08H01M10/0468H01M10/052
    • A secondary battery in which a fixing tape is attached to an electrode assembly, a positive electrode tab, a negative electrode tab, and a cap plate without use of an insulating case to prevent the electrode assembly from vibrating. The secondary battery includes an electrode assembly including a positive electrode plate to which a positive electrode tab is coupled, a negative electrode plate to which a negative electrode tab is coupled, and a separator interposed between the positive electrode plate and the negative electrode plate, a can having an opened part on one side to accommodate the electrode assembly, a cap assembly sealing the opened part of the can, and a fixing tape continuously attached from the electrode assembly to a bottom surface of the cap assembly while being attached to the positive electrode tab and the negative electrode tab.
    • 一种二次电池,其中固定带附着到电极组件,正极片,负电极片和盖板上,而不使用绝缘壳体以防止电极组件振动。 二次电池包括:电极组件,其包括正电极接线片连接到的正电极板,负电极接头连接到的负电极板和介于正电极板和负电极板之间的隔板; 可以在一侧具有开口部分以容纳电极组件,将盖的开口部分密封的盖组件和从电极组件连续附接到盖组件的底表面的固定带,同时附接到正电极 接片和负极接头。
    • 18. 发明授权
    • Controller, a method of operating the controller and a memory system
    • 控制器,操作控制器和存储器系统的方法
    • US08769378B2
    • 2014-07-01
    • US13070620
    • 2011-03-24
    • Sung Joo YooNam-Wook KangChan Ik ParkHyun Jin Choi
    • Sung Joo YooNam-Wook KangChan Ik ParkHyun Jin Choi
    • G11C29/00
    • G06F11/1068G11C2029/0411
    • The present disclosure provides a controller which comprises a command generator configured to generate a command to non volatile memory, and buffer configured to receive a first data and a second data and configured to combine the first data and the second data, an ECC unit configured to perform the ECC decoding. And the first page data may include at least one error bit corresponding to an error location table and the second page data may include at least one original bit which can be replaced with the error bit. The buffer may replace the at least one error bit with the said at least one original bit. The error location table may save information of location for the repeated error bit.
    • 本公开提供一种控制器,其包括命令发生器,其被配置为生成对非易失性存储器的命令,以及配置为接收第一数据和第二数据并被配置为组合第一数据和第二数据的缓冲器,ECC单元,被配置为 执行ECC解码。 并且第一页数据可以包括对应于错误位置表的至少一个错误位,并且第二页数据可以包括可以用错误位替换的至少一个原始位。 所述缓冲器可以用所述至少一个原始位替换所述至少一个错误位。 错误位置表可以保存重复错误位的位置信息。
    • 20. 发明授权
    • Apparatus and method of measuring integrity
    • 仪器和测量方法的完整性
    • US08423787B2
    • 2013-04-16
    • US11655213
    • 2007-01-19
    • Hyun-jin ChoiKyung-im JungMyung-june Jung
    • Hyun-jin ChoiKyung-im JungMyung-june Jung
    • G06F21/00
    • H04L9/3236
    • Provided are an apparatus and method of measuring integrity, in which unnecessary memory loading of an object for measuring integrity is avoided. The apparatus includes a mapping module loading at least one second object, among a plurality of second objects divided from a first object in accordance with an allocation unit of a memory, into the memory, a memory module storing a hash value of the divided second object, and a measurement module measuring integrity of the first object by comparing a hash value of the loaded at least one second object with the hash value stored in the memory module.
    • 提供了一种测量完整性的装置和方法,其中避免了用于测量完整性的对象的不必要的存储器负载。 所述装置包括映射模块,其将根据存储器的分配单元的从第一对象划分的多个第二对象中的至少一个第二对象加载到所述存储器中;存储模块,存储所划分的第二对象的散列值 以及测量模块,通过将所加载的至少一个第二对象的哈希值与存储在存储器模块中的散列值进行比较来测量第一对象的完整性。