专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

11. 发明申请

US20100126904A1 Thin-plate container 审中-公开
标题翻译：薄板容器
公开(公告)号：US20100126904A1
公开(公告)日：2010-05-27
申请号：US12329668
申请日：2008-12-08
申请人： Kung-Hao Cheng , Chang-Cheng Chen
发明人： Kung-Hao Cheng , Chang-Cheng Chen
IPC分类号： H01L21/673
CPC分类号： H01L21/67353 , H01L21/67359 , H01L21/67373
摘要： A thin-plate container comprises a container body with an opening and an interior area and being pivotally connected to at least a pair of swing hooks near its opening; a container door for closing the opening of the container body; and a latch component disposed in the container door, which is movable in a to-and-fro direction between a first position and a second position when the container door closes the opening of the container body, wherein in the first position, the latch component is contained in the container door, and in the second position, the latch component extends beyond the container door and is in contact with the pair of swing hooks of the container body for making the container door to move in a sealing direction by using the swing hooks to achieve a sealed status between the container door and the container body.
摘要翻译：薄板容器包括具有开口和内部区域的容器体，并且在其开口附近枢转地连接到至少一对摆动钩; 用于封闭容器主体的开口的容器门; 以及设置在所述容器门中的闩锁部件，当所述容器门关闭所述容器主体的开口时，所述闩锁部件能够在第一位置和第二位置之间沿一个一个来回的方向移动，其中在所述第一位置，所述闩锁部件被容纳在容器门中，并且在第二位置，闩锁部件延伸超过容器门并且与容器主体的一对摆动钩接触，以通过使用摆动使容器门沿密封方向移动钩子以达到容器门和容器主体之间的密封状态。

12. 发明授权

US07695872B2 Continuous sloped phase edge architecture fabrication technique using electron or optical beam blur for single phase shift mask ret 失效
标题翻译：使用电子或光束模糊的连续倾斜相位架构制造技术，用于单相位移掩模
公开(公告)号：US07695872B2
公开(公告)日：2010-04-13
申请号：US11894795
申请日：2007-08-20
申请人： Matt F. Vernon , Wen-Hao Cheng
发明人： Matt F. Vernon , Wen-Hao Cheng
IPC分类号： G03F1/00
CPC分类号： G03F1/30 , G03F1/28
摘要： A phase shift mask may include boundaries between phase shift regions with continuous sloped phase edges. The continuous sloped phase edges may be produced by introducing a predetermined degree of defocus into a beam used during production of the mask to image the pattern on the mask. Such a phase shift mask may be “trimless”, i.e., not require a corresponding binary “trim” mask for a second exposure to remove phase conflicts after exposure with the phase shift mask.
摘要翻译：相移掩模可以包括具有连续倾斜相位边缘的相移区域之间的边界。连续倾斜的相位边缘可以通过将预定程度的散焦引入到在制作掩模期间使用的光束中以在掩模上成像以形成图案来产生。这样的相移掩模可以是“无偏转”的，即不需要用于第二曝光的对应的二进制“修剪”掩模，以消除用相移掩模曝光之后的相位冲突。

13. 发明授权

US07582212B2 Method of removing silicon dioxide from waste liquid, method of cleaning membrane tube and method of processing waste water 有权
标题翻译：从废液中除去二氧化硅的方法，清洗膜管的方法和处理废水的方法
公开(公告)号：US07582212B2
公开(公告)日：2009-09-01
申请号：US11223496
申请日：2005-09-08
申请人： Hao-Cheng Wang
发明人： Hao-Cheng Wang
IPC分类号： B01D65/02
CPC分类号： B01D65/02 , B01D2311/24 , B01D2321/04 , B01D2321/168 , C02F1/444 , C02F1/722 , C02F2103/346 , C02F2303/16 , Y10S134/902 , Y10T436/206664
摘要： A method of removing silicon dioxide from a waste liquid is described. A solution containing fluoride ions is added into the waste liquid to form a reaction product. A method of cleaning a membrane tube for processing waste water is also described, wherein the membrane tube contains residues of waste water that include a first residue and a second residue containing silicon dioxide. A first cleaning step is conducted to reduce the concentration of the first residue in the membrane tube to a first concentration. A solution containing fluoride ions is added into the tube to react with the second residue to form a reaction product. A second cleaning step is then conducted to reduce the concentration of the residual fluorine ions in the membrane tube to a second concentration.
摘要翻译：描述了从废液中除去二氧化硅的方法。将含有氟离子的溶液加入到废液中以形成反应产物。还描述了清洗用于处理废水的膜管的方法，其中所述膜管含有包含第一残余物和含有二氧化硅的第二残留物的废水的残留物。进行第一清洗步骤以将膜管中的第一残留物的浓度降低到第一浓度。将含有氟离子的溶液加入到管中以与第二残留物反应以形成反应产物。然后进行第二清洗步骤以将膜管中的残留氟离子的浓度降低到第二浓度。

14. 发明申请

US20090008691A1 DRAM STRUCTURE AND METHOD OF MAKING THE SAME 有权
标题翻译： DRAM结构及其制作方法
公开(公告)号：US20090008691A1
公开(公告)日：2009-01-08
申请号：US11965769
申请日：2007-12-28
申请人： Tzung-Han Lee , Chih-Hao Cheng , Te-Yin Chen , Chung-Yuan Lee , En-Jui Li
发明人： Tzung-Han Lee , Chih-Hao Cheng , Te-Yin Chen , Chung-Yuan Lee , En-Jui Li
IPC分类号： H01L27/108
CPC分类号： H01L29/66621 , H01L27/10823 , H01L27/10829 , H01L27/10876 , H01L29/4236
摘要： A DRAM structure has a substrate, a buried transistor with a fin structure, a trench capacitor, and a surface strap on the surface of the substrate. The surface strap is used to electrically connect a drain region to the trench capacitor.
摘要翻译： DRAM结构具有衬底，具有翅片结构的埋入晶体管，沟槽电容器和衬底表面上的表面带。表面带用于将漏极区域电连接到沟槽电容器。

15. 发明申请

US20080318377A1 METHOD OF FORMING SELF-ALIGNED GATES AND TRANSISTORS 审中-公开
标题翻译：形成自对准栅和晶体管的方法
公开(公告)号：US20080318377A1
公开(公告)日：2008-12-25
申请号：US11964720
申请日：2007-12-27
申请人： Tzung-Han Lee , Chih-Hao Cheng , Pei-Tzu Lee , Te-Yin Chen , Chung-Yuan Lee
发明人： Tzung-Han Lee , Chih-Hao Cheng , Pei-Tzu Lee , Te-Yin Chen , Chung-Yuan Lee
IPC分类号： H01L21/8242
CPC分类号： H01L27/10876 , H01L27/0207 , H01L27/10879 , H01L29/66787 , H01L29/7851
摘要： Method for fabricating a self-aligned gate of a transistor including: forming a plurality of deep trench capacitors in a substrate, concurrently forming a surface strap and a contact pad on a surface of the substrate, wherein a spacing between the surface strap and the contact pad exposes a portion of an active area, filling the spacing with a dielectric layer, forming a photoresist pattern on the substrate, wherein the photoresist has an opening situated directly above the spacing between the surface strap and the contact pad, etching away the dielectric layer and a portion of a shallow trench isolation region through the opening thereby forming an upwardly protruding fin-typed channel structure, forming a gate dielectric layer on the upwardly protruding fin-typed channel structure, and forming a gate on the gate dielectric layer.
摘要翻译：一种用于制造晶体管的自对准栅极的方法，包括：在衬底中形成多个深沟槽电容器，同时在衬底的表面上形成表面带和接触焊盘，其中表面带和触点之间的间隔衬垫暴露有源区的一部分，用介电层填充间隔，在衬底上形成光致抗蚀剂图案，其中光致抗蚀剂具有位于表面带和接触垫之间的间隔正上方的开口，蚀刻掉介电层以及通过开口的浅沟槽隔离区域的一部分，从而形成向上突出的鳍状沟道结构，在向上突出的鳍状沟道结构上形成栅极电介质层，并在栅极电介质层上形成栅极。

16. 发明申请

US20080198129A1 Indication position calculation system, indicator for indication position calculation system, game system, and indication position calculation method 有权
标题翻译：指示位置计算系统，指示位置计算指标，游戏系统和指示位置计算方法
公开(公告)号：US20080198129A1
公开(公告)日：2008-08-21
申请号：US12068820
申请日：2008-02-12
申请人： Chiu Hao Cheng , Shing Lung Tai , Tatsuji Kumabayashi
发明人： Chiu Hao Cheng , Shing Lung Tai , Tatsuji Kumabayashi
IPC分类号： G09G5/00 , G06F17/00
CPC分类号： A63F13/219 , A63F13/04 , A63F13/213 , A63F2300/1087 , A63F2300/8076 , F41G3/2633 , F41G3/2661 , G01S1/70 , G01S5/163 , G06T7/70
摘要： An imaging section successively outputs light-reception information relating to each pixel from a starting pixel SP to an end pixel EP, the starting pixel SP being provided on one end of an image PC acquired by the imaging section and the end pixel EP being provided on the other end of the image PC. The imaging section is provided in an indicator so that the starting pixel SP is disposed on a lower side and the end pixel EP is disposed on an upper side when the indicator is held in a reference position.
摘要翻译：成像部分连续地将从每个像素相关的光接收信息从起始像素SP输出到结束像素EP，起始像素SP设置在由成像部分获取的图像PC的一端上，并且末端像素EP设置在图像PC的另一端。成像部设置在指示器中，使得起始像素SP设置在下侧，并且当指示器保持在参考位置时，端部像素EP设置在上侧。

17. 发明授权

US07375190B2 Recombinant protein and method of screening for agents that modulate polypeptide aggregation 有权
标题翻译：重组蛋白和筛选调节多肽聚集的试剂的方法
公开(公告)号：US07375190B2
公开(公告)日：2008-05-20
申请号：US11523090
申请日：2006-09-19
申请人： Tzu-Hao Cheng , Chia-Rung Liu
发明人： Tzu-Hao Cheng , Chia-Rung Liu
IPC分类号： C07K14/00 , C12N1/20 , C12N15/00 , C12Q1/00
CPC分类号： G01N33/6896 , C07K14/00 , C07K2319/43 , G01N2500/00 , Y10S435/975
摘要： This invention provides recombinant protein comprising formula as follows: A-B wherein A is polypeptide containing glutamine-rich domain comprising 8-200 glutamine residues and B is color-alteration enzyme modulated by the domain. This invention also provides an expressing vector and a cell produced therefrom. This invention further provides a method and a kit for screening a therapeutic agent for a neurodegenerative disease.
摘要翻译：本发明提供了包含如下公式的重组蛋白：<？in-line-formula description =“In-line Formulas”end =“lead”？> AB <？in-line-formula description =“In-line formula”end = “尾”→其中A是含有谷氨酰胺富含结构域的多肽，其含有8-200个谷氨酰胺残基，B是由该域调节的变色酶。本发明还提供了表达载体和由其制备的细胞。本发明还提供了用于筛选神经变性疾病的治疗剂的方法和试剂盒。

18. 发明授权

US07359344B1 Method, apparatus, and system for feathering data in a communication network 有权
标题翻译：在通信网络中羽化数据的方法，装置和系统
公开(公告)号：US07359344B1
公开(公告)日：2008-04-15
申请号：US10721410
申请日：2003-11-26
申请人： Hao Cheng , Joseph J. Boone
发明人： Hao Cheng , Joseph J. Boone
IPC分类号： H04B7/212
CPC分类号： H04B7/18589
摘要： A communication network control method for a communication network including a hub and a plurality of user nodes includes adjusting system parameters and feathering to reduce jitter and other effects given current conditions of the wireless channel, current loading of the network, and user constraints. In particular, the method includes transmitting a first and second frame with a burst time plan from the hub to each user node, and transmitting a first respective data burst from each of the user nodes to the hub according to the burst time plan. The time frame of the data burst from each user node arrives simultaneously at the hub. A position of each slot in the first data burst is allocated to be equally spaced along a time axis.
摘要翻译：包括集线器和多个用户节点的通信网络的通信网络控制方法包括调整系统参数和羽化以减少给定当前无线信道条件，网络当前负载和用户约束的抖动和其他影响。具体地说，该方法包括：将来自集线器的突发时间计划的第一帧和第二帧发送到每个用户节点，以及根据突发时间计划将来自每个用户节点的第一相应数据脉冲串发送到集线器。来自每个用户节点的数据突发的时间帧同时到达集线器。第一数据脉冲串中的每个时隙的位置被分配为沿时间轴等距间隔。

19. 发明授权

US07289410B2 ADIP demodulation method and apparatus 有权
标题翻译： ADIP解调方法和装置
公开(公告)号：US07289410B2
公开(公告)日：2007-10-30
申请号：US10623576
申请日：2003-07-22
申请人： Hao-Cheng Chen , Wen-Yi Wu
发明人： Hao-Cheng Chen , Wen-Yi Wu
IPC分类号： G11B7/00
CPC分类号： G11B7/0053
摘要： An ADIP demodulation method and apparatus, which are used in an optical disk driver to generate the ADIP information according to a wobble signal. The apparatus includes a slicing unit for receiving the wobble signal and generating a wobble pulse, a phase locked loop for generating a reference wobble signal with the same frequency and phase as the wobble pulse and a reference clock with frequency higher than the wobble pulse, a channel bit generator for generating a channel bit signal according to the reference wobble signal and the wobble pulse, and a decoder for decoding to ADIP information according to the channel bit signal. The channel bit generator generates a difference signal between the wobble pulse and the reference wobble signal, and outputs the channel bit signal according to the difference signal.
摘要翻译：一种ADIP解调方法和装置，用于光盘驱动器中以根据摆动信号产生ADIP信息。该装置包括用于接收摆动信号并产生摆动脉冲的切片单元，用于产生具有与摆动脉冲相同的频率和相位的参考摆动信号和频率高于摆动脉冲的参考时钟的锁相环，信道位发生器，用于根据参考摆动信号和摆动脉冲产生信道位信号;以及解码器，用于根据信道位信号对ADIP信息进行解码。通道位发生器产生摆动脉冲与参考摆动信号之间的差分信号，并根据差分信号输出通道位信号。

20. 发明申请

US20070241383A1 Single-gate non-volatile memory and operation method thereof 有权
标题翻译：单门非易失性存储器及其操作方法
公开(公告)号：US20070241383A1
公开(公告)日：2007-10-18
申请号：US11403858
申请日：2006-04-14
申请人： Hsin-Chang Lin , Wen-Chien Huang , Ming-Tsang Yang , Hao-Cheng Chang , Cheng-Ying Wu
发明人： Hsin-Chang Lin , Wen-Chien Huang , Ming-Tsang Yang , Hao-Cheng Chang , Cheng-Ying Wu
IPC分类号： H01L29/94
CPC分类号： H01L27/115
摘要： A single-gate non-volatile memory and an operation method thereof, wherein a transistor and a capacitor structure are embedded in a semiconductor substrate; the transistor comprises: a first electrically-conductive gate, a first dielectric layer, and multiple ion-doped regions; the capacitor structure comprises: a second electrically-conductive gate, a second dielectric layer, and a second on-doped region; the first electrically-conductive gate and the second electrically-conductive gate are interconnected to form a single floating gate of a memory cell; a reverse bias is used to implement the reading, writing, and erasing operations of the single-floating-gate memory cell; in the operation of a single-gate non-volatile memory with an isolation well, positive and negative voltages are applied to the drain, the gate, and the silicon substrate/the isolation well to create an inversion layer so that the absolute voltage, the area of the voltage booster circuit, and the current consumption can be reduced.
摘要翻译：一种单栅极非易失性存储器及其操作方法，其中晶体管和电容器结构嵌入在半导体衬底中; 所述晶体管包括：第一导电栅极，第一介电层和多个离子掺杂区域; 电容器结构包括：第二导电栅极，第二介电层和第二掺杂区域; 第一导电栅极和第二导电栅极互连以形成存储单元的单个浮置栅极; 使用反向偏置来实现单浮栅存储单元的读，写和擦除操作; 在具有隔离阱的单栅极非易失性存储器的操作中，正和负电压施加到漏极，栅极和硅衬底/隔离阱以产生反型层，使得绝对电压升压电路的面积，可以减少电流消耗。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式