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11. 发明授权

US08629053B2 Plasma treatment for semiconductor devices 有权
标题翻译：半导体器件等离子体处理
公开(公告)号：US08629053B2
公开(公告)日：2014-01-14
申请号：US12818890
申请日：2010-06-18
申请人： Chen-Fa Lu , Chung-Shi Liu , Chen-Hua Yu , Wei-Yu Chen , Cheng-Ting Chen
发明人： Chen-Fa Lu , Chung-Shi Liu , Chen-Hua Yu , Wei-Yu Chen , Cheng-Ting Chen
IPC分类号： H01L23/498 , H01L21/60
CPC分类号： H01L24/13 , H01L23/293 , H01L23/3171 , H01L23/498 , H01L23/49816 , H01L23/49822 , H01L24/03 , H01L24/05 , H01L24/11 , H01L2224/0345 , H01L2224/03452 , H01L2224/03462 , H01L2224/0362 , H01L2224/03831 , H01L2224/03901 , H01L2224/0401 , H01L2224/05572 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05669 , H01L2224/1147 , H01L2224/11622 , H01L2224/1181 , H01L2224/1183 , H01L2224/11849 , H01L2224/11901 , H01L2224/13111 , H01L2224/13116 , H01L2224/93 , H01L2924/00014 , H01L2924/0002 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01072 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01084 , H01L2924/01322 , H01L2924/01327 , H01L2924/014 , H01L2924/12044 , H01L2924/14 , H01L2924/1434 , H01L2924/15311 , H01L2924/15788 , H01L2924/181 , H05K3/28 , H05K3/3478 , H05K3/4007 , H01L2224/11 , H01L2224/05552 , H01L2924/00 , H01L2924/1082
摘要： A semiconductor device having a polymer layer and a method of fabricating the same is provided. A two-step plasma treatment for a surface of the polymer layer includes a first plasma process to roughen the surface of the polymer layer and loosen contaminants, and a second plasma process to make the polymer layer smoother or make the polymer layer less rough. An etch process may be used between the first plasma process and the second plasma process to remove the contaminants loosened by the first plasma process. In an embodiment, the polymer layer exhibits a surface roughness between about 1% and about 8% as measured by Atomic Force Microscopy (AFM) with the index of surface area difference percentage (SADP) and/or has surface contaminants of less than about 1% of Ti, less than about 1% of F, less than about 1.5% Sn, and less than about 0.4% of Pb.
摘要翻译：提供了具有聚合物层的半导体器件及其制造方法。用于聚合物层表面的两步等离子体处理包括使聚合物层的表面粗糙化并且使污染物松动的第一等离子体工艺，以及使聚合物层更平滑或使聚合物层变得粗糙的第二等离子体工艺。可以在第一等离子体工艺和第二等离子体工艺之间使用蚀刻工艺，以除去由第一等离子体工艺松动的污染物。在一个实施方案中，聚合物层通过原子力显微镜（AFM）测量的表面粗糙度在约1％至约8％之间，其表面积差异百分比（SADP）指数和/或具有小于约1的表面污染物的Ti％，小于约1％的F，小于约1.5％的Sn和小于约0.4％的Pb。

12. 发明申请

US20130099371A1 SEMICONDUCTOR PACKAGE HAVING SOLDER JOINTED REGION WITH CONTROLLED AG CONTENT 审中-公开
标题翻译：具有受控AG内容的焊接接头区域的半导体封装
公开(公告)号：US20130099371A1
公开(公告)日：2013-04-25
申请号：US13278621
申请日：2011-10-21
申请人： Ming-Da CHENG , Kuei-Wei HUANG , Yu-Peng TSAI , Cheng-Ting CHEN , Hsiu-Jen LIN , Chung-Shi LIU
发明人： Ming-Da CHENG , Kuei-Wei HUANG , Yu-Peng TSAI , Cheng-Ting CHEN , Hsiu-Jen LIN , Chung-Shi LIU
IPC分类号： H01L23/498 , H01L21/60
CPC分类号： H01L24/13 , H01L24/05 , H01L24/11 , H01L24/16 , H01L2224/0345 , H01L2224/0401 , H01L2224/05008 , H01L2224/05022 , H01L2224/05124 , H01L2224/05139 , H01L2224/05147 , H01L2224/05184 , H01L2224/05572 , H01L2224/05647 , H01L2224/05666 , H01L2224/05681 , H01L2224/05686 , H01L2224/1132 , H01L2224/1145 , H01L2224/11452 , H01L2224/1146 , H01L2224/11849 , H01L2224/13012 , H01L2224/13014 , H01L2224/13082 , H01L2224/13111 , H01L2224/13147 , H01L2224/16145 , H01L2224/16238 , H01L2224/81191 , H01L2924/00014 , H01L2924/1305 , H01L2924/1306 , H01L2924/13091 , H01L2924/01029 , H01L2924/04941 , H01L2924/04953 , H01L2924/01013 , H01L2924/01024 , H01L2924/01028 , H01L2924/0105 , H01L2924/01079 , H01L2924/01073 , H01L2924/01049 , H01L2924/0103 , H01L2924/01025 , H01L2924/01022 , H01L2924/01047 , H01L2924/00012 , H01L2924/00 , H01L2224/05552
摘要： A semiconductor package includes a workpiece with a conductive trace and a chip with a conductive pillar. The chip is attached to the workpiece and a solder joint region is formed between the conductive pillar and the conductive trace. The silver (Ag) content in the solder layer is between 0.5 and 1.8 weight percent.
摘要翻译：半导体封装包括具有导电迹线的工件和具有导电柱的芯片。芯片附着在工件上，并且在导电柱和导电迹线之间形成焊点区域。焊料层中的银（Ag）含量为0.5-1.8重量％。

13. 发明申请

US20090134984A1 Car Poster that Changes Display Contents 审中-公开
标题翻译：更改显示内容的汽车海报
公开(公告)号：US20090134984A1
公开(公告)日：2009-05-28
申请号：US11944733
申请日：2007-11-26
申请人： Cheng-Ting Chen
发明人： Cheng-Ting Chen
IPC分类号： B60Q1/00
CPC分类号： B60Q1/268 , B60Q1/503 , G09F21/04
摘要： A car poster has a display device and a remote controller. The display device has a monitor that displays different contents according to different objectives. The remote controller transmits control signals to remotely control the monitor to change the display contents. A basic circuit of the display device has a controller, a memory, a receiver, a monitor, a connection port and a first power source. The controller is a control and operation center. The memory is used to previously stores multiple display contents and also is coupled to the controller. The receiver is coupled to the controller for receiving control signals from the remote controller.
摘要翻译：汽车海报有一个显示设备和一个遥控器。显示装置具有根据不同目的显示不同内容的监视器。遥控器发送控制信号以远程控制监视器以改变显示内容。显示装置的基本电路具有控制器，存储器，接收器，监视器，连接端口和第一电源。控制器是控制和操作中心。存储器用于预先存储多个显示内容，并且还耦合到控制器。接收器耦合到控制器以从遥控器接收控制信号。

14. 发明申请

US20220071333A1 SAFETY HELMET INNER LINING ADJUSTABLE FOR SUITABLE WEARING 有权
公开(公告)号：US20220071333A1
公开(公告)日：2022-03-10
申请号：US17039882
申请日：2020-09-30
申请人： Cheng-Ting CHEN
发明人： Cheng-Ting CHEN
IPC分类号： A42B3/12 , A42B3/14
摘要： The present invention provides a safety helmet inner lining adjustable for suitable wearing, consisting of: a covering body, which has an inner side surface that contacts a user's head and an outer side surface relative to the inner side surface; at least one interlayer pocket, which is disposed on the outer side surface of the covering body; and at least one cushiony pad, which is suitable for placement inside the interlayer pocket. A user is able to place the cushiony pads of suitable thickness into the interlayer pockets at preset positions according to the user's to head shape and dimensions. The inner lining is then put onto the head and a safety helmet put on top. The cushiony pads enable correcting the interspace between the user's head and the safety helmet, thereby allowing suitable and perfect fitting of the safety helmet that ensures safety of the wearer.

15. 发明申请

US20120065764A1 SYSTEM AND METHOD TO REDUCE PRE-BACK-GRINDING PROCESS DEFECTS 有权
标题翻译：减少前置磨削过程缺陷的系统和方法
公开(公告)号：US20120065764A1
公开(公告)日：2012-03-15
申请号：US12879278
申请日：2010-09-10
申请人： Chen-FA LU , Cheng-Ting CHEN , James HU , Chung-Shi LIU
发明人： Chen-FA LU , Cheng-Ting CHEN , James HU , Chung-Shi LIU
IPC分类号： G06F17/00
CPC分类号： G05B19/41875 , B24B37/005
摘要： Processing defects arising during processing of a semiconductor wafer prior to back-grinding are reduced with systems and methods of sensor placement. One or more holes are bored into a chuck table for receiving semiconductor wafers, or a support table next to the chuck table. One or more sensors are disposed in the holes for monitoring parameters during a pre-back-grinding (PBG) process. A control box converts a set of signals received from the sensors. A computer-implemented process control tool receives the converted set of signals from the control box and determines whether the PBG process will continue.
摘要翻译：通过传感器放置的系统和方法，减少了在后研磨之前处理半导体晶片期间产生的加工缺陷。将一个或多个孔钻入用于接收半导体晶片的卡盘台，或者在卡盘台旁边的支撑台。一个或多个传感器设置在孔中，用于在前置后研磨（PBG）过程期间监测参数。控制箱转换从传感器接收的一组信号。计算机实现的过程控制工具从控制箱接收转换的信号集，并确定PBG过程是否继续。

16. 发明授权

US09412689B2 Semiconductor packaging structure and method 有权
标题翻译：半导体封装结构及方法
公开(公告)号：US09412689B2
公开(公告)日：2016-08-09
申请号：US13357379
申请日：2012-01-24
申请人： Chun-Cheng Lin , Chung-Shi Liu , Kuei-Wei Huang , Cheng-Ting Chen , Wei-Hung Lin , Ming-Da Cheng
发明人： Chun-Cheng Lin , Chung-Shi Liu , Kuei-Wei Huang , Cheng-Ting Chen , Wei-Hung Lin , Ming-Da Cheng
IPC分类号： H01L23/02 , H01L23/498 , H01L25/10 , H01L23/00
CPC分类号： H01L25/0657 , H01L21/0273 , H01L21/486 , H01L21/56 , H01L21/76898 , H01L23/3128 , H01L23/49827 , H01L23/49838 , H01L23/49866 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/81 , H01L25/105 , H01L25/50 , H01L2224/0231 , H01L2224/0239 , H01L2224/03452 , H01L2224/0401 , H01L2224/05083 , H01L2224/05124 , H01L2224/05144 , H01L2224/05147 , H01L2224/05155 , H01L2224/05166 , H01L2224/05171 , H01L2224/05184 , H01L2224/1131 , H01L2224/11424 , H01L2224/1152 , H01L2224/1162 , H01L2224/11825 , H01L2224/11849 , H01L2224/13024 , H01L2224/131 , H01L2224/13109 , H01L2224/13111 , H01L2224/13113 , H01L2224/13118 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13611 , H01L2224/16225 , H01L2224/16227 , H01L2224/16235 , H01L2224/16238 , H01L2225/06517 , H01L2225/06541 , H01L2225/06548 , H01L2225/06586 , H01L2225/1023 , H01L2225/1058 , H01L2924/01013 , H01L2924/01022 , H01L2924/01024 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/01047 , H01L2924/01048 , H01L2924/0105 , H01L2924/01073 , H01L2924/01074 , H01L2924/01079 , H01L2924/0132 , H01L2924/0133 , H01L2924/014 , H01L2924/04941 , H01L2924/04953 , H01L2924/12042 , H01L2924/15311 , H01L2924/15321 , H01L2924/15747 , H01L2924/18161 , H01L2924/2064 , H01L2924/20641 , H01L2924/20642 , H01L2924/00014 , H01L2924/00
摘要： A system and method for packaging semiconductor dies is provided. An embodiment comprises a first package with a first contact and a second contact. A post-contact material is formed on the first contact in order to adjust the height of a joint between the contact pad a conductive bump. In another embodiment a conductive pillar is utilized to control the height of the joint between the contact pad and external connections.
摘要翻译：提供一种用于封装半导体管芯的系统和方法。实施例包括具有第一触点和第二触点的第一封装。在第一接触件上形成接触后材料，以便调节接触垫之间的接头的高度，导体凸块。在另一个实施例中，使用导电柱来控制接触垫和外部连接之间的接头的高度。

17. 发明申请

US20130285238A1 STUD BUMP STRUCTURE FOR SEMICONDUCTOR PACKAGE ASSEMBLIES 有权
标题翻译：用于半导体封装组件的STUD BUMP结构
公开(公告)号：US20130285238A1
公开(公告)日：2013-10-31
申请号：US13460412
申请日：2012-04-30
申请人： Meng-Tse CHEN , Hsiu-Jen LIN , Chih-Wei LIN , Cheng-Ting CHEN , Ming-Da CHENG , Chung-Shi LIU
发明人： Meng-Tse CHEN , Hsiu-Jen LIN , Chih-Wei LIN , Cheng-Ting CHEN , Ming-Da CHENG , Chung-Shi LIU
IPC分类号： H01L23/48 , H01L21/60
CPC分类号： H01L24/14 , H01L21/4853 , H01L23/3677 , H01L23/49816 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/73 , H01L25/105 , H01L2224/1134 , H01L2224/13076 , H01L2224/1308 , H01L2224/131 , H01L2224/13124 , H01L2224/13144 , H01L2224/13147 , H01L2224/14135 , H01L2224/14136 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48227 , H01L2224/73104 , H01L2224/73204 , H01L2225/0651 , H01L2225/1023 , H01L2225/1058 , H01L2924/00012 , H01L2924/00014 , H01L2924/15331 , H01L2924/15787 , H01L2924/3512 , H01L2924/014 , H01L2924/00 , H01L2224/45015 , H01L2924/207
摘要： A semiconductor package structure comprises a substrate, a die bonded to the substrate, and one or more stud bump structures connecting the die to the substrate, wherein each of the stud bump structures having a stud bump and a solder ball encapsulating the stud bump to enhance thermal dissipation and reduce high stress concentrations in the semiconductor package structure.
摘要翻译：半导体封装结构包括衬底，与衬底结合的管芯，以及将管芯连接到衬底的一个或多个柱塞凸块结构，其中每个凸起凸块结构具有柱形凸起和封装凸起凸起的焊球，以增强散热并减少半导体封装结构中的高应力集中。

18. 发明申请

US20130122652A1 Methods for Performing Reflow in Bonding Processes 有权
标题翻译：在粘合过程中进行回流的方法
公开(公告)号：US20130122652A1
公开(公告)日：2013-05-16
申请号：US13298056
申请日：2011-11-16
申请人： Hsiu-Jen Lin , Chih-Wei Lin , Cheng-Ting Chen , Ming-Da Cheng , Chung-Shi Liu
发明人： Hsiu-Jen Lin , Chih-Wei Lin , Cheng-Ting Chen , Ming-Da Cheng , Chung-Shi Liu
IPC分类号： H01L21/50
CPC分类号： H01L24/75 , H01L24/81 , H01L24/97 , H01L2224/131 , H01L2224/16225 , H01L2224/16227 , H01L2224/75283 , H01L2224/7598 , H01L2224/81005 , H01L2224/81136 , H01L2224/81191 , H01L2224/81192 , H01L2224/81193 , H01L2224/8123 , H01L2224/814 , H01L2224/81815 , H01L2224/97 , H01L2924/014 , H01L2924/00012 , H01L2224/81
摘要： A method includes placing a cover over a lower package component, wherein the cover comprises an opening aligned to the lower package component. An upper package component is placed over the lower package component. The upper package component is aligned to the opening, and a solder region is dispose between the upper package component and the lower package component. The cover and the upper package component are exposed to a radiation to reflow the solder region.
摘要翻译：一种方法包括将盖子放置在下部封装部件上，其中盖子包括与下部封装部件对准的开口。上封装组件放置在下封装组件上。上部封装部件与开口对准，并且焊接区域配置在上部封装部件和下部封装部件之间。盖和上部封装部件暴露于辐射以回流焊接区域。

19. 发明申请

US20110309490A1 Plasma Treatment for Semiconductor Devices 有权
标题翻译：半导体器件等离子体处理
公开(公告)号：US20110309490A1
公开(公告)日：2011-12-22
申请号：US12818890
申请日：2010-06-18
申请人： Chen-Fa Lu , Chung-Shi Liu , Chen-Hua Yu , Wei-Yu Chen , Cheng-Ting Chen
发明人： Chen-Fa Lu , Chung-Shi Liu , Chen-Hua Yu , Wei-Yu Chen , Cheng-Ting Chen
IPC分类号： H01L23/498 , H01L21/60
CPC分类号： H01L24/13 , H01L23/293 , H01L23/3171 , H01L23/498 , H01L23/49816 , H01L23/49822 , H01L24/03 , H01L24/05 , H01L24/11 , H01L2224/0345 , H01L2224/03452 , H01L2224/03462 , H01L2224/0362 , H01L2224/03831 , H01L2224/03901 , H01L2224/0401 , H01L2224/05572 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05669 , H01L2224/1147 , H01L2224/11622 , H01L2224/1181 , H01L2224/1183 , H01L2224/11849 , H01L2224/11901 , H01L2224/13111 , H01L2224/13116 , H01L2224/93 , H01L2924/00014 , H01L2924/0002 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01072 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01084 , H01L2924/01322 , H01L2924/01327 , H01L2924/014 , H01L2924/12044 , H01L2924/14 , H01L2924/1434 , H01L2924/15311 , H01L2924/15788 , H01L2924/181 , H05K3/28 , H05K3/3478 , H05K3/4007 , H01L2224/11 , H01L2224/05552 , H01L2924/00 , H01L2924/1082
摘要： A semiconductor device having a polymer layer and a method of fabricating the same is provided. A two-step plasma treatment for a surface of the polymer layer includes a first plasma process to roughen the surface of the polymer layer and loosen contaminants, and a second plasma process to make the polymer layer smoother or make the polymer layer less rough. An etch process may be used between the first plasma process and the second plasma process to remove the contaminants loosened by the first plasma process. In an embodiment, the polymer layer exhibits a surface roughness between about 1% and about 8% as measured by Atomic Force Microscopy (AFM) with the index of surface area difference percentage (SADP) and/or has surface contaminants of less than about 1% of Ti, less than about 1% of F, less than about 1.5% Sn, and less than about 0.4% of Pb.
摘要翻译：提供了具有聚合物层的半导体器件及其制造方法。用于聚合物层表面的两步等离子体处理包括使聚合物层的表面粗糙化并且使污染物松动的第一等离子体工艺，以及使聚合物层更平滑或使聚合物层变得粗糙的第二等离子体工艺。可以在第一等离子体工艺和第二等离子体工艺之间使用蚀刻工艺，以除去由第一等离子体工艺松动的污染物。在一个实施方案中，聚合物层通过原子力显微镜（AFM）测量的表面粗糙度在约1％至约8％之间，其表面积差异百分比（SADP）指数和/或具有小于约1的表面污染物的Ti％，小于约1％的F，小于约1.5％的Sn和小于约0.4％的Pb。

20. 发明授权

US06692985B2 Solar cell substrate with thin film polysilicon 有权
标题翻译：具有薄膜多晶硅的太阳能电池基板
公开(公告)号：US06692985B2
公开(公告)日：2004-02-17
申请号：US10163432
申请日：2002-06-07
申请人： Chorng-Jye Huang , Lee Ching Kuo , Jyi Tyan Yeh , Chien Sheng Huang , Leo C. K. Liau , Shih-Chen Lin , Cheng-Ting Chen , Feng-Cheng Jeng
发明人： Chorng-Jye Huang , Lee Ching Kuo , Jyi Tyan Yeh , Chien Sheng Huang , Leo C. K. Liau , Shih-Chen Lin , Cheng-Ting Chen , Feng-Cheng Jeng
IPC分类号： H01L3118
CPC分类号： H01L31/03921 , H01L31/03682 , H01L31/068 , H01L31/075 , H01L31/182 , Y02E10/546 , Y02E10/547 , Y02E10/548 , Y02P70/521
摘要： A solar cell substrate with thin film polysilicon. The solar cell substrate includes a substrate; a transparent conductive layer, formed on the substrate; a thermal isolation layer having inlaid conductive layers, formed on the transparent conductive layer; and a polysilicon layer, formed on the thermal isolation layer.
摘要翻译：具有薄膜多晶硅的太阳能电池基板。太阳能电池基板包括基板; 形成在基板上的透明导电层; 形成在所述透明导电层上的具有镶嵌导电层的热隔离层; 和形成在热隔离层上的多晶硅层。

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