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11. 发明授权

US06294921B1 Apparatus for testing an integrated circuit device 失效
标题翻译：用于测试集成电路器件的装置
公开(公告)号：US06294921B1
公开(公告)日：2001-09-25
申请号：US09360151
申请日：1999-07-26
申请人： Anthony R. Bonaccio , Howard J. Leighton
发明人： Anthony R. Bonaccio , Howard J. Leighton
IPC分类号： G01R1073
CPC分类号： G01R31/043
摘要： A method and apparatus for contact testing a plurality of devices under test, either sequentially or simultaneously. In a first test phase it is determined whether the test probe to each contact is shorted to the most negative rail. In a second phase it is determined whether the test probe has made proper contact, and whether ESD diodes on the devices under test are functional. In both test phases a negative pulse is generated on a tester bus and applied to the contact by the test probe. In the first test phase the positive rail of the device under test is grounded; in the second test phase the positive rail of the device under test is made positive. The negative rail of the device under test is connected to the negative rail of the tester. In both test phases, upon termination of the negative pulse, the bus is restored to a positive voltage which is dependent upon the condition of the contact and the condition of expected input devises at the contact. The bus voltage as measured in accordance with a logic which determines the condition of the contact and the condition of expected input devices at the contact. Data signals for functional testing of the device under test are can be applied to the bus through an isolating driver which preserves he bolt of the contact test.
摘要翻译：一种用于连续或同时接触测试多个待测器件的方法和装置。在第一个测试阶段，确定每个触点的测试探针是否短接到最负的导轨。在第二阶段，确定测试探针是否已正确接触，以及被测器件上的ESD二极管是否正常工作。在两个测试阶段，在测试仪总线上产生负脉冲，并通过测试探头施加到触点。在第一个测试阶段，被测器件的正极接地; 在第二个测试阶段，正在测试的器件的正极。被测器件的负极线连接到测试仪的负极轨。在两个测试阶段，在负脉冲终止时，总线恢复到正电压，这取决于接触条件和接触期间预期输入条件。总线电压根据确定接触状态的逻辑和接点处的预期输入设备的状态来测量。用于测试设备的功能测试的数据信号可以通过隔离驱动器应用于总线，该隔离驱动器保持接触测试的螺栓。

12. 发明授权

US5901002A Quad burst servo demodulator with adjustable slew rate for hard disk drives 失效
标题翻译：适用于硬盘驱动器的可调压摆率的四脉冲串伺服解调器
公开(公告)号：US5901002A
公开(公告)日：1999-05-04
申请号：US921727
申请日：1997-08-27
申请人： Anthony R. Bonaccio
发明人： Anthony R. Bonaccio
IPC分类号： G01R19/04 , G11B5/596 , G11B21/10 , G11B5/09
CPC分类号： G11B5/59688 , G01R19/04 , G11B21/10 , G11B5/59611
摘要： A quad burst servo demodulator with adjustable slew rate for hard disk drives. The quad burst servo demodulator includes a peak voltage detecting system for detecting the peak voltages of an input signal, a plurality of storage capacitors for holding voltages proportional to the peak voltages observed by the peak voltage detecting system, and a programmable current source for charging (via an adjustable slew rate) the storage capacitors to voltages proportional to the detected peak voltages of the input signal.
摘要翻译：具有可调节转换速率的硬盘驱动器的四脉冲串伺服解调器。四脉冲串伺服解调器包括用于检测输入信号的峰值电压的峰值电压检测系统，用于保持与由峰值电压检测系统观察到的峰值电压成比例的电压的多个存储电容器和用于充电的可编程电流源（通过可调节的转换速率）存储电容器到与检测到的输入信号的峰值电压成比例的电压。

13. 发明授权

US4697099A Open line detector circuit 失效
标题翻译：开路检测电路
公开(公告)号：US4697099A
公开(公告)日：1987-09-29
申请号：US925018
申请日：1986-10-30
申请人： Anthony R. Bonaccio
发明人： Anthony R. Bonaccio
IPC分类号： G01R19/165 , H03K5/08 , H03K5/24
CPC分类号： H03K5/2418
摘要： This describes an open detector circuit essentially composed of comparator circuits with their outputs coupled to each other and to an open collector driver stage, driven from the output of the comparators. The detector circuit compares the voltages, such as may be present on twisted wire pairs, connected to its line inputs to set a predetermined line voltage output. If any of the input lines connected to the detector circuit becomes open the detector circuit is held in a specified state indicating such opening until it is actively reset. The detector circuit can detect and compare both positive and negative voltages with respect to different voltage sources.

14. 发明授权

US07793237B2 System, structure and method of providing dynamic optimization of integrated circuits using a non-contact method of selection, and a design structure 失效
标题翻译：使用非接触式选择方法提供集成电路的动态优化的系统，结构和方法以及设计结构
公开(公告)号：US07793237B2
公开(公告)日：2010-09-07
申请号：US11957584
申请日：2007-12-17
申请人： Anthony R. Bonaccio , Joseph A. Iadanza
发明人： Anthony R. Bonaccio , Joseph A. Iadanza
IPC分类号： G06F17/50
CPC分类号： H01L22/14 , G06F17/5045 , G06F2217/78 , H01L2924/0002 , H01L2924/00
摘要： A system, structure and method is provided for providing dynamic optimization of integrated circuits using a non-contact method of selection, and a design structure on which a subject circuit resides. The method is provided for optimizing an electronic system having at least one integrated circuit. The method includes storing a target performance voltage of the at least one integrated circuit; remotely querying the at least one integrated circuit to obtain the target performance voltage; and providing an operational voltage of a next-level assembly according to the stored target performance voltage.
摘要翻译：提供了一种用于使用非接触式选择方法提供集成电路的动态优化的系统，结构和方法以及被摄体电路所在的设计结构。该方法用于优化具有至少一个集成电路的电子系统。该方法包括存储至少一个集成电路的目标性能电压; 远程查询所述至少一个集成电路以获得所述目标性能电压; 以及根据存储的目标性能电压提供下一级组件的工作电压。

15. 发明申请

US20090051420A1 INTRINSIC RC POWER DISTRIBUTION FOR NOISE FILTERING OF ANALOG SUPPLIES 失效
标题翻译：用于噪声滤波的模拟电源的内部RC功率分配
公开(公告)号：US20090051420A1
公开(公告)日：2009-02-26
申请号：US12196718
申请日：2008-08-22
申请人： Anthony R. Bonaccio , Hayden C. Cranford, JR. , Joseph A. Iadanza , Sebastian T. Ventrone , Stephen D. Wyatt
发明人： Anthony R. Bonaccio , Hayden C. Cranford, JR. , Joseph A. Iadanza , Sebastian T. Ventrone , Stephen D. Wyatt
IPC分类号： H03K5/00
CPC分类号： G05F1/46
摘要： Analog supply for an analog circuit and process for supplying an analog signal to an analog circuit. The analog supply includes a noise filter having a variable resistor, and a control device coupled to adjust the variable resistor. The control device is structured and arranged to set the resistance of the variable resistor to maximize noise filtering and optimize performance of the analog circuit.
摘要翻译：用于模拟电路的模拟电源和用于向模拟电路提供模拟信号的过程。模拟电源包括具有可变电阻器的噪声滤波器和耦合以调节可变电阻器的控制装置。控制装置被构造和布置成设置可变电阻器的电阻以最大化噪声滤波并优化模拟电路的性能。

16. 发明授权

US07454305B2 Method and apparatus for storing circuit calibration information 失效
标题翻译：存储电路校准信息的方法和装置
公开(公告)号：US07454305B2
公开(公告)日：2008-11-18
申请号：US11164040
申请日：2005-11-08
申请人： Anthony R. Bonaccio , Allen P. Haar , Joseph A. Iadanza , Douglas W. Stout , Ivan L. Wemple
发明人： Anthony R. Bonaccio , Allen P. Haar , Joseph A. Iadanza , Douglas W. Stout , Ivan L. Wemple
IPC分类号： G01R31/00 , G06F19/00
CPC分类号： G01R31/2884 , G01R35/005
摘要： A method for altering circuit characteristics to make them independent of processing parameters of devices within an integrated circuit is disclosed. A process parameter is measured by a kerf or on-chip built-in test on a selective set of chip on a wafer, and the results are stored on a storage device within each respective chip. Then, for each of the remaining chips, a two-dimensional interpolation is performed to determine the process parameter value for the respective chip based on the measured value. The interpolated values are recorded along with the coordinates of the chip in an efuse control file. Such information is subsequently stored into an efuse module within the chip. On-chip digital control structures are used to adjust certain operational characteristics of a functional component within the chip based on the information stored in the efuse module.
摘要翻译：公开了一种用于改变电路特性以使它们与集成电路内的器件的处理参数无关的方法。通过在晶片上的选择性芯片组上的切口或片上内置测试来测量工艺参数，并将结果存储在各个芯片内的存储装置上。然后，对于剩余的每个芯片，执行二维内插，以基于测量值确定各个芯片的处理参数值。内插值与芯片在efuse控制文件中的坐标一起被记录。这样的信息随后被存储在芯片内的efuse模块中。片上数字控制结构用于根据存储在efuse模块中的信息来调整芯片内的功能组件的某些操作特性。

17. 发明授权

US07442583B2 Using electrically programmable fuses to hide architecture, prevent reverse engineering, and make a device inoperable 有权
标题翻译：使用电可编程保险丝隐藏架构，防止逆向工程，并使设备无法工作
公开(公告)号：US07442583B2
公开(公告)日：2008-10-28
申请号：US11016219
申请日：2004-12-17
申请人： Anthony R. Bonaccio , Karl R. Erickson , John A. Fifield , Chandrasekharan Kothandaraman , Phil C. Paone , William R. Tonti
发明人： Anthony R. Bonaccio , Karl R. Erickson , John A. Fifield , Chandrasekharan Kothandaraman , Phil C. Paone , William R. Tonti
IPC分类号： H01L21/82
CPC分类号： G06F12/1433 , G06F21/6245
摘要： Techniques and systems whereby operation of and/or access to particular features of an electronic device may be controlled after the device has left the control of the manufacturer are provided. The operation and/or access may be provided based on values stored in non-volatile storage elements, such as electrically programmable fused (eFUSES).
摘要翻译：提供了在设备已经离开制造商的控制之后可以控制电子设备的特定特征的操作和/或访问的技术和系统。可以基于存储在诸如电可编程融合（eFUSES）的非易失性存储元件中的值来提供操作和/或访问。

18. 发明授权

US07362138B1 Flexible multimode logic element for use in a configurable mixed-logic signal distribution path 有权
标题翻译：灵活的多模逻辑元件用于可配置的混合逻辑信号分配路径
公开(公告)号：US07362138B1
公开(公告)日：2008-04-22
申请号：US11613516
申请日：2006-12-20
申请人： Igor Arsovski , Anthony R. Bonaccio , Hayden C. Cranford, Jr. , Joseph A. Iadanza , Pradeep Thiagarajan , Sebastian T. Ventrone
发明人： Igor Arsovski , Anthony R. Bonaccio , Hayden C. Cranford, Jr. , Joseph A. Iadanza , Pradeep Thiagarajan , Sebastian T. Ventrone
IPC分类号： H03K19/0175
CPC分类号： H03K19/018585 , H03K3/35613 , H03K5/133 , H03K19/0016 , H03K2005/00058 , H03K2005/00208 , H03K2005/00228
摘要： A multimode circuit that is configured to operate in one of multiple operating modes is disclosed. In particular, an exemplary multimode circuit may be configured to operating in one of a full-swing mode, a limited-swing mode, a full-swing to limited-swing converter mode, and a limited-swing to full-swing converter mode. The operating modes of the multimode circuit may be dynamically selectable. One or more multimode circuits may be part of a configurable distribution path for controlling the performance of a signal distribution path or tree of an integrated circuit.
摘要翻译：公开了一种被配置为以多种操作模式之一操作的多模电路。特别地，示例性多模电路可以被配置为以全摆动模式，限制摆动模式，全摆幅至限定摆动转换器模式和限定摆动至全摆幅转换器模式之一进行操作。多模电路的工作模式可以动态地选择。一个或多个多模电路可以是用于控制集成电路的信号分配路径或树的性能的可配置分配路径的一部分。

19. 发明授权

US07287177B2 Digital reliability monitor having autonomic repair and notification capability 有权
标题翻译：数字可靠性监控器具有自主修复和通知功能
公开(公告)号：US07287177B2
公开(公告)日：2007-10-23
申请号：US10729751
申请日：2003-12-04
申请人： Anthony R. Bonaccio , Michael LeStrange , William R. Tonti , Sebastian T. Ventrone
发明人： Anthony R. Bonaccio , Michael LeStrange , William R. Tonti , Sebastian T. Ventrone
IPC分类号： G06F1/04 , G07C3/04
CPC分类号： G06F1/04
摘要： An integrated circuit, including: a pulse generator adapted to generate a pulsed signal; a cycle counter adapted to count cycles of the pulsed signal; one or more repairable circuit elements; and a repair processor adapted to repair a repairable circuit element when the cycle counter reaches a pre-determined cycle count.
摘要翻译：一种集成电路，包括：适于产生脉冲信号的脉冲发生器; 适于计数所述脉冲信号的周期的周期计数器; 一个或多个可修复电路元件; 以及修理处理器，其适于在循环计数器达到预定周期计数时修复可修复的电路元件。

20. 发明授权

US06963240B2 Damping of LC ringing in IC (integrated circuit) power distribution systems 失效
标题翻译： IC（集成电路）配电系统中LC振荡的阻尼
公开(公告)号：US06963240B2
公开(公告)日：2005-11-08
申请号：US10707171
申请日：2003-11-25
申请人： Anthony R. Bonaccio , Allen P. Haar , Michael A. Sorna , Ivan L. Wemple , Stephen D. Wyatt
发明人： Anthony R. Bonaccio , Allen P. Haar , Michael A. Sorna , Ivan L. Wemple , Stephen D. Wyatt
IPC分类号： G05F1/10 , G05F3/02 , H03K17/16 , H03L5/00
CPC分类号： G11C5/14 , H01L23/50 , H01L2924/0002 , H03K17/164 , H01L2924/00
摘要： A structure and method for damping LC (inductance-capacitance) ringing in integrated circuit (IC) power distribution systems. The structure comprises a resistance electrically connected in parallel with a plurality of electrical switches. The resistance and electrical switches are electrically connected in series with the package and on-chip power distribution circuit. When on-chip switching activity creates a sudden and appreciable change in IC power demand the electrical switches are opened to temporarily increase the resistance in series with the power supply. This serves to dampen the power-distribution LC ringing. Later, the electrical switches are closed to shunt the series resistance and reduce the level of steady-state voltage drop in the power structure.
摘要翻译：用于阻尼集成电路（IC）配电系统中LC（电感 - 电容）振铃的结构和方法。该结构包括与多个电开关并联电连接的电阻。电阻和电气开关与封装和片上配电电路串联电连接。当片上切换活动产生IC功率需求的突然和明显的变化时，电开关被打开以临时增加与电源串联的电阻。这用于抑制功率分配LC振铃。之后，电开关闭合以分流串联电阻并降低电源结构中稳态电压降的水平。

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