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    • 173. 发明授权
    • Display device and driving method thereof
    • 显示装置及其驱动方法
    • US08896585B2
    • 2014-11-25
    • US12929802
    • 2011-02-16
    • Myoung-Hwan YooChoon-Yul Oh
    • Myoung-Hwan YooChoon-Yul Oh
    • G06F3/038G09G5/00G09G3/32
    • G09G3/3275G09G2300/043G09G2300/0861G09G2320/0295G09G2320/043
    • A display device includes a display unit including a plurality of scan lines, a plurality of data lines to which a plurality of compensation data signals are transmitted, a plurality of light emitting signal lines, and a plurality of pixels respectively connected to the plurality of scan lines, the plurality of data lines, and the plurality of light emitting signal lines, and a data driver generating a data voltage corresponding to a image data signal, and converting the data voltage to the compensation data signal. The data driver includes a compensator generating the compensation data signal in accordance with a feedback voltage. The feedback voltage is determined by a degree of deterioration associated with each pixel, and increases with an increasing deterioration degree of the pixel.
    • 显示装置包括:显示单元,包括多个扫描线,多个数据线,多个补偿数据信号被发送到多个数据线,多个发光信号线以及分别连接到多个扫描的多个像素 线,多条数据线和多条发光信号线,以及数据驱动器,产生对应于图像数据信号的数据电压,并将数据电压转换成补偿数据信号。 数据驱动器包括根据反馈电压产生补偿数据信号的补偿器。 反馈电压由与每个像素相关联的劣化程度确定,并且随着像素的劣化程度的增加而增加。
    • 180. 发明授权
    • Devices and methods for bit error rate monitoring of intra-panel data link
    • 面板内数据链路误码率监控的设备和方法
    • US08788890B2
    • 2014-07-22
    • US13204214
    • 2011-08-05
    • Taesung KimPaolo Sacchetto
    • Taesung KimPaolo Sacchetto
    • G06F11/00
    • G09G3/006G09G3/20G09G3/3275G09G3/3685G09G2330/12G09G2370/08
    • Devices and methods for monitoring a bit error rate of an intra-panel data link (e.g., a chip-on-glass (COG) data link) between a timing controller and a display driver circuitry, according to an embodiment. The timing controller may send test data over a data link to the display driver circuitry. The test data may include a known or predictable stream of data. The display driver circuitry may receive the test data via the data link and detect bit errors based at least partly on the test data. An indication of the bit errors may be displayed on an array of pixels of the display or provided to the timing controller via a separate back channel data link.
    • 根据实施例,用于监视定时控制器和显示驱动器电路之间的面板内数据链路(例如,玻璃上芯片(COG)数据链路)的误码率的装置和方法。 定时控制器可以通过数据链路将测试数据发送到显示驱动器电路。 测试数据可以包括已知或可预测的数据流。 显示驱动器电路可以经由数据链路接收测试数据,并且至少部分地基于测试数据来检测位错误。 位错误的指示可以显示在显示器的像素阵列上,或者经由单独的反向通道数据链路提供给定时控制器。