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151. 发明申请

US20080157055A1 Resistive random access memory device 有权
标题翻译：电阻随机存取存储器件
公开(公告)号：US20080157055A1
公开(公告)日：2008-07-03
申请号：US11979894
申请日：2007-11-09
申请人： Jung-hyun Lee , Hyung-jin Bae , Sang-jun Choi
发明人： Jung-hyun Lee , Hyung-jin Bae , Sang-jun Choi
IPC分类号： H01L47/00
CPC分类号： H01L45/04 , H01L45/145
摘要： Provided is a resistive random access memory (RRAM) device having a switching device and a storage node connected to the switching device, the storage node including a first electrode formed of a metal compound, the metal compound including metal with no more than a divalence and a metal compound having anions, a solid electrolyte layer formed on the first electrode, and a second electrode formed on the solid electrolyte layer.
摘要翻译：提供一种电阻随机存取存储器（RRAM）装置，其具有与开关装置连接的开关装置和存储节点，所述存储节点包括由金属化合物形成的第一电极，所述金属化合物包括不超过二价的金属，具有阴离子的金属化合物，形成在第一电极上的固体电解质层和形成在固体电解质层上的第二电极。

152. 发明授权

US07374994B2 Bismuth titanium silicon oxide, bismuth titanium silicon oxide thin film, and method for forming the thin film 失效
标题翻译：铋钛氧化硅，铋钛氧化硅薄膜，以及薄膜形成方法
公开(公告)号：US07374994B2
公开(公告)日：2008-05-20
申请号：US11136456
申请日：2005-05-25
申请人： Young-jin Cho , Yo-sep Min , Young-soo Park , Jung-hyun Lee , June-key Lee , Yong-kyun Lee
发明人： Young-jin Cho , Yo-sep Min , Young-soo Park , Jung-hyun Lee , June-key Lee , Yong-kyun Lee
IPC分类号： H01L21/8242
CPC分类号： H01L21/28185 , C01G29/006 , C01P2002/36 , C01P2002/72 , C01P2002/77 , C01P2002/85 , C01P2002/89 , C01P2004/03 , C01P2004/04 , C01P2004/80 , C01P2006/40 , C04B35/16 , C04B35/475 , C04B35/6264 , C04B2235/3232 , C04B2235/3298 , C04B2235/3418 , C04B2235/441 , C04B2235/444 , C04B2235/658 , C04B2235/6581 , C04B2235/76 , H01L21/28194 , H01L21/31691 , H01L28/55 , H01L29/516 , H01L29/517
摘要： A bismuth titanium silicon oxide having a pyrochlore phase, a thin film formed of the bismuth titanium silicon oxide, a method for forming the bismuth-titanium-silicon oxide thin film, a capacitor and a transistor for a semiconductor device including the bismuth-titanium-silicon oxide thin film, and an electronic device employing the capacitor and/or the transistor are provided. The bismuth titanium silicon oxide has good dielectric properties and is thermally and chemically stable. The bismuth-titanium-silicon oxide thin film can be effectively used as a dielectric film of a capacitor or as a gate dielectric film of a transistor in a semiconductor device. Various electronic devices having good electrical properties can be manufactured using the capacitor and/or the transistor having the bismuth-titanium-silicon oxide film.
摘要翻译：具有烧绿石相的铋钛氧化硅，由氧化铋钛氧化物形成的薄膜，用于形成铋钛氧化硅薄膜的方法，用于半导体器件的电容器和晶体管，所述半导体器件包括铋钛 - 氧化硅薄膜以及采用电容器和/或晶体管的电子器件。铋钛氧化硅具有良好的介电性能，并且是热和化学稳定的。铋钛氧化硅薄膜可以有效地用作半导体器件中的电容器或晶体管的栅极电介质膜的电介质膜。可以使用具有铋钛 - 氧化硅膜的电容器和/或晶体管来制造具有良好电性能的各种电子器件。

153. 发明授权

US07371429B2 Precursor, thin layer prepared including the precursor, method of preparing the thin layer and phase-change memory device 有权
标题翻译：前体，薄层制备包括前体，制备薄层的方法和相变存储器件
公开(公告)号：US07371429B2
公开(公告)日：2008-05-13
申请号：US11349135
申请日：2006-02-08
申请人： Jung-Hyun Lee , Yoon-Ho Khang
发明人： Jung-Hyun Lee , Yoon-Ho Khang
IPC分类号： C23C16/00 , C07C395/00
CPC分类号： C23C16/305 , C07F7/10 , H01L27/2436 , H01L45/06 , H01L45/1233 , H01L45/144 , H01L45/1616
摘要： A Te precursor containing Te, a 15-group compound (for example, N) and/or a 14-group compound (for example, Si), a method of preparing the Te precursor, a Te-containing chalcogenide thin layer including the Te precursor, a method of preparing the thin layer; and a phase-change memory device. The Te precursor may be deposited at lower temperatures for forming a Te-containing chalcogenide thin layer doped with a 15-group compound (for example, N) and/or a 14-group compound (for example, Si). For example, the Te precursor may employ plasma enhanced chemical vapor deposition (PECVD) or plasma enhanced atomic layer deposition (PEALD) at lower deposition temperatures. The GST phase-change layer doped with a 15-group compound (for example, N) and/or a 14-group compound (for example, Si) formed by employing the Te precursor may have a decreased reset current, and thus when a memory device including the same is employed, its integration may be possible, and operation with higher capacity and/or higher speed may be possible.
摘要翻译：含有Te，15组化合物（例如N）和/或14组化合物（例如Si）的Te前体，制备Te前体的方法，含Te的硫族化物薄层，包括Te 前体，制备薄层的方法; 和相变存储器件。可以在较低温度下沉积Te前体以形成掺杂有15族化合物（例如N）和/或14-基团化合物（例如Si）的含Te的硫族化物薄层。例如，Te前体可以在较低的沉积温度下使用等离子体增强化学气相沉积（PECVD）或等离子体增强原子层沉积（PEALD）。掺杂有通过使用Te前体形成的15族化合物（例如N）和/或14族化合物（例如Si）的GST相变层可能具有降低的复位电流，因此当使用包括其的存储器件，其集成是可能的，并且具有更高容量和/或更高速度的操作可能是可能的。

154. 发明申请

US20080094455A1 INKJET PRINTHEAD HEATER AND METHOD OF MANUFACTURE 审中-公开
标题翻译： INKJET PRINTHEAD加热器及其制造方法
公开(公告)号：US20080094455A1
公开(公告)日：2008-04-24
申请号：US11742756
申请日：2007-05-01
申请人： Jung-hyun LEE , Sang-jun Choi , Hyung-jin Bae , Chan-bong Jun
发明人： Jung-hyun LEE , Sang-jun Choi , Hyung-jin Bae , Chan-bong Jun
IPC分类号： B41J2/05 , G11B5/127
CPC分类号： B41J2/14129 , B41J2/1603 , B41J2/1642 , B41J2/1646 , B41J2202/03
摘要： An inkjet printhead heater including a plurality of unit heater layers each including a first nitride layer and a second nitride layer stacked on the first nitride layer, and an inkjet printhead including the heater, and a method of manufacturing an inkjet printhead heater including stacking a plurality of unit heater layers, each including a substrate having a first nitride layer and a second nitride layer stacked on the first nitride layer.
摘要翻译：一种喷墨打印头加热器，包括多个单元加热器层，每个单元加热器层包括堆叠在第一氮化物层上的第一氮化物层和第二氮化物层，以及包括该加热器的喷墨打印头，以及制造喷墨打印头加热器的方法，的每个单元加热器层，每个单元加热器层包括具有堆叠在第一氮化物层上的第一氮化物层和第二氮化物层的基板。

155. 发明申请

US20080089120A1 Resistive memory devices having a CMOS compatible electrolyte layer and methods of operating the same 审中-公开
标题翻译：具有CMOS兼容电解质层的电阻式存储器件及其操作方法
公开(公告)号：US20080089120A1
公开(公告)日：2008-04-17
申请号：US11896215
申请日：2007-08-30
申请人： Sang-jun Choi , Jung-hyun Lee
发明人： Sang-jun Choi , Jung-hyun Lee
IPC分类号： H01L47/00 , G11C11/00
CPC分类号： G11C13/0011 , H01L27/2436 , H01L27/2463 , H01L45/085 , H01L45/1233 , H01L45/1266 , H01L45/144
摘要： Example embodiments may provide a resistive memory having an amorphous solid electrolyte layer and/or a method of operating the memory. The resistive memory may include a switching device and/or a storage node connected to the switching device. The storage node may include a lower electrode, an upper electrode crossing the lower electrode, and an amorphous solid electrolyte layer between the upper electrode and the lower electrode. The storage node may be useable as a data storage layer, wherein at least one of the upper electrode and the lower electrode may be formed of a diffusion metal.
摘要翻译：示例性实施例可以提供具有无定形固体电解质层的电阻性存储器和/或操作存储器的方法。电阻性存储器可以包括连接到开关装置的开关装置和/或存储节点。存储节点可以包括下电极，与下电极交叉的上电极，以及位于上电极和下电极之间的无定形固体电解质层。存储节点可以用作数据存储层，其中上电极和下电极中的至少一个可以由扩散金属形成。

156. 发明申请

US20080087635A1 Method of etching a nickel oxide layer and method of manufacturing a storage node 审中-公开
标题翻译：蚀刻氧化镍层的方法和制造存储节点的方法
公开(公告)号：US20080087635A1
公开(公告)日：2008-04-17
申请号：US11907091
申请日：2007-10-09
申请人： Soon-won Hwang , Jung-hyun Lee , Seok-jae Chung
发明人： Soon-won Hwang , Jung-hyun Lee , Seok-jae Chung
IPC分类号： B44C1/22
CPC分类号： H01L45/04 , H01L45/1233 , H01L45/146 , H01L45/1675
摘要： An etching method of a nickel oxide layer and a method of manufacturing a storage node of a resistive memory including the nickel oxide layer are provided. The method of etching the nickel oxide layer includes forming a nickel oxide layer on a substrate, forming a mask pattern on a desired region of the nickel oxide layer, removing the nickel oxide layer around the mask pattern using plasma generated from a mixed etching gas having a desired ratio of a main gas and an additive gas and removing the mask pattern.
摘要翻译：提供了氧化镍层的蚀刻方法以及制造包含氧化镍层的电阻式存储器的存储节点的方法。蚀刻氧化镍层的方法包括在基板上形成氧化镍层，在氧化镍层的期望区域上形成掩模图案，使用从具有主气体和添加气体的期望比例，并去除掩模图案。

157. 发明申请

US20080002458A1 Nonvolatile variable resistance memory device and method of fabricating the same 有权
标题翻译：非易失性可变电阻存储器件及其制造方法
公开(公告)号：US20080002458A1
公开(公告)日：2008-01-03
申请号：US11799000
申请日：2007-05-18
申请人： Hyung-jin Bae , Jung-hyun Lee , Sang-jun Choi , Bum-seok Seo
发明人： Hyung-jin Bae , Jung-hyun Lee , Sang-jun Choi , Bum-seok Seo
IPC分类号： B32B9/04 , B05D1/36 , G11C11/00
CPC分类号： H01L27/101 , G11C13/00 , G11C13/0014 , G11C13/0016 , H01L27/2436 , H01L45/04 , H01L45/1233 , H01L45/142 , H01L45/146
摘要： A nonvolatile variable resistance memory device may include a lower electrode; a stacked structure including a first Cu compound layer disposed on the lower electrode, and a second Cu compound layer disposed on the first Cu compound layer; and an upper electrode disposed on the second Cu compound layer.
摘要翻译：非易失性可变电阻存储器件可以包括下电极; 包括设置在下电极上的第一Cu化合物层和设置在第一Cu化合物层上的第二Cu化合物层的堆叠结构; 以及设置在第二Cu化合物层上的上电极。

158. 发明申请

US20070164214A1 Conductive carbon nanotube tip, probe having the conductive carbon nanotube tip, and method of manufacturing the conductive carbon nanotube tip 有权
标题翻译：导电性碳纳米管尖端，具有导电性碳纳米管尖端的探针，以及导电性碳纳米管尖端的制造方法
公开(公告)号：US20070164214A1
公开(公告)日：2007-07-19
申请号：US11513197
申请日：2006-08-31
申请人： Sang-jun Choi , Jung-Hyun Lee , Sang-bong Bang , Bum-seok Seo , Chang-soo Lee
发明人： Sang-jun Choi , Jung-Hyun Lee , Sang-bong Bang , Bum-seok Seo , Chang-soo Lee
IPC分类号： G12B21/02
CPC分类号： G01Q70/12 , G01Q70/14 , Y10S977/876 , Y10S977/879
摘要： A conductive carbon nanotube tip and a manufacturing method thereof are provided. The conductive carbon nanotube tip includes a carbon nanotube tip substantially vertically placed on a substrate, and a ruthenium coating layer covering a surface of the carbon nanotube tip and extending to at least a part of the substrate. The manufacturing method includes substantially vertically placing a carbon nanotube tip on a substrate, and forming a ruthenium coating layer on the carbon nanotube tip and at least a part of the substrate.
摘要翻译：提供导电性碳纳米管尖端及其制造方法。导电性碳纳米管尖端包括基本上垂直放置在基板上的碳纳米管尖端和覆盖碳纳米管尖端的表面并延伸到基板的至少一部分的钌涂层。制造方法包括将碳纳米管尖端基本上垂直放置在基板上，并且在碳纳米管尖端和基板的至少一部分上形成钌涂层。

159. 发明申请

US20070059447A1 Method of fabricating lanthanum oxide layer and method of fabricating MOSFET and capacitor using the same 审中-公开
标题翻译：制造氧化镧层的方法及使用其制造MOSFET和电容器的方法
公开(公告)号：US20070059447A1
公开(公告)日：2007-03-15
申请号：US11599207
申请日：2006-11-14
申请人： Jong-Pyo Kim , Jung-Hyun Lee , Bum-Seok Seo , Jung-Hyoung Lee
发明人： Jong-Pyo Kim , Jung-Hyun Lee , Bum-Seok Seo , Jung-Hyoung Lee
IPC分类号： C23C16/00
CPC分类号： H01L21/0228 , C23C16/40 , H01L21/02175 , H01L21/02192 , H01L21/022 , H01L21/28194 , H01L21/3141 , H01L21/31604 , H01L29/517
摘要： Methods of fabricating a lanthanum oxide layer, and methods of fabricating a MOSFET and/or a capacitor especially adapted for semiconductor applications using such a lanthanum oxide layer are disclosed. The methods include a preliminary step of disposing a semiconductor substrate into a chamber. Tris(bis(trimethylsilyl)amino)Lanthanum as a lanthanum precursor is then injected into the chamber such that the lanthanum precursor is chemisorbed on the semiconductor substrate. Then, after carrying out a first purge of the chamber, at least one oxidizer is injected into the chamber such that the oxidizer is chemisorbed with the lanthanum precursor on the semiconductor substrate. Then, the chamber is purged a second time. The described steps of injecting the lanthanum precursor into the chamber, first-purging the chamber, injecting an oxidizer into the chamber, and second-purging the chamber may be sequentially and repeatedly performed to form a lanthanum oxide layer of a desired thickness having enhanced semiconductor characteristics.
摘要翻译：公开了制造氧化镧层的方法以及特别适用于使用这种氧化镧层的半导体应用的MOSFET和/或电容器的制造方法。所述方法包括将半导体衬底设置到腔室中的预备步骤。然后将三（双（三甲基甲硅烷基）氨基）镧作为镧前体注入室中，使得镧前体在半导体衬底上被化学吸附。然后，在进行室的第一次吹扫之后，至少一个氧化剂被注入到室中，使得氧化剂与半导体衬底上的镧前体化学吸附。然后，房间被第二次清除。将镧前体注入到室中，首先清洗室，将氧化剂注入到室中，以及对室进行第二次净化的所述步骤可以被顺序地和重复地进行，以形成具有增强的半导体的所需厚度的氧化镧层特点

160. 发明申请

US20070045728A1 Non-volatile semiconductor memory device having ion conductive layer and methods of fabricating and operating the same 有权
标题翻译：具有离子传导层的非易失性半导体存储器件及其制造和操作方法
公开(公告)号：US20070045728A1
公开(公告)日：2007-03-01
申请号：US11508991
申请日：2006-08-24
申请人： Jung-hyun Lee
发明人： Jung-hyun Lee
IPC分类号： H01L29/76
CPC分类号： H01L45/145 , H01L27/24 , H01L45/04
摘要： A non-volatile semiconductor memory device having an ion conductive layer, and methods of fabricating and operating the same are disclosed. The non-volatile memory device may include a substrate, a switching element formed in the substrate, and a storage node connected to the switching element, the storage node may include a lower electrode connected to the switching element, and used as an ion source; a data storage layer formed on the lower electrode, a portion thereof being spaced from the lower electrode; a side electrode spaced from the lower electrode, a side surface thereof being connected to a portion of the data storage layer spaced from the lower electrode; and an upper electrode formed on the data storage layer, or may include a lower electrode connected to the switching element, and used as an ion source; and a data storage layer formed on the lower electrode; an upper electrode formed on the data storage layer.
摘要翻译：公开了具有离子传导层的非易失性半导体存储器件及其制造和操作方法。非易失性存储器件可以包括衬底，形成在衬底中的开关元件和连接到开关元件的存储节点，存储节点可以包括连接到开关元件的下电极，并用作离子源; 形成在所述下电极上的数据存储层，其一部分与所述下电极间隔开; 与所述下电极间隔开的侧电极，其侧表面与所述数据存储层的与所述下电极间隔开的部分连接; 以及形成在数据存储层上的上电极，或者可以包括连接到开关元件的下电极，并用作离子源; 和形成在下电极上的数据存储层; 形成在数据存储层上的上电极。

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