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141. 发明授权

US11043975B2 Encoding method, decoding method, apparatus, and system 有权
公开(公告)号：US11043975B2
公开(公告)日：2021-06-22
申请号：US16579264
申请日：2019-09-23
申请人： HUAWEI TECHNOLOGIES CO., LTD.
发明人： Yuchun Lu
IPC分类号： H03M13/00 , H03M13/29 , H03M13/15
摘要： This application provides an encoding method. The method includes: determining a frame of an outer code of to-be-encoded data, where the frame of the outer code includes a data information code and a check code of the data information code, the frame of the outer code is divided into Q data blocks, each data block in the Q data blocks includes W bits, and W and Q are integers greater than 0; and encoding the Q data blocks to obtain Q codewords of an inner code, where the Q data blocks are in a one-to-one correspondence with the Q codewords of the inner code, a first codeword in the Q codewords of the inner code includes a first data block and a check code of the first data block, the first codeword is any codeword in the Q codewords of the inner code.

142. 发明授权

US11043964B2 Memory system, packet protection circuit, and CRC calculation method 有权
公开(公告)号：US11043964B2
公开(公告)日：2021-06-22
申请号：US16805098
申请日：2020-02-28
申请人： KIOXIA CORPORATION
发明人： Yukimasa Miyamoto , Daisuke Taki , Takeshi Kumagaya , Tomoya Horiguchi
IPC分类号： H03M13/00 , H03M13/09 , H03M13/29
摘要： A memory system includes a packet protection circuit. The packet protection circuit includes a plurality of first CRC calculation circuits, each configured to calculate a CRC of M-byte data, where M is an integer greater than or equal to 1 and less than N, where N is an integer greater than or equal to 2, a first selector configured to output a CRC calculation result of one of the first CRC calculation circuits, and a second CRC calculation circuit configured to calculate a CRC of L-byte data, where L

143. 发明授权

US11042439B1 Efficient read and recovery with outer code 有权
公开(公告)号：US11042439B1
公开(公告)日：2021-06-22
申请号：US15345440
申请日：2016-11-07
申请人： Seagate Technology LLC
发明人： Deepak Sridhara , Ara Patapoutian , Prafulla B Reddy
IPC分类号： G06F11/00 , G06F11/10 , H03M13/29 , H03M13/11 , H03M13/15 , H03M13/37
摘要： An apparatus may include a circuit configured to initialize a read operation to read one or more requested data segments of a respective data unit having a plurality of data segments. Based on a number of failed data segments of the requested data segments and an erasure capability of an outer code error correction scheme, the circuit may perform erasure recovery to recover the failed data segments. Based on the number of failed data segments, the erasure capability of the outer code error correction scheme, and a threshold value, the circuit may perform iterative outer code recovery to recover the failed data segments.

144. 发明申请

US20210176006A1 PARALLEL TURBO DECODING WITH NON-UNIFORM WINDOW SIZES 有权
公开(公告)号：US20210176006A1
公开(公告)日：2021-06-10
申请号：US16475640
申请日：2018-02-06
申请人： ACCELERCOMM LIMITED
发明人： Robert Maunder , Matthew Brejza , Luping Xiang
IPC分类号： H04L1/00 , H03M13/25 , H03M13/27 , H03M13/29 , H03M13/45
摘要： A turbo decoder circuit performs a turbo decoding process to recover a frame of data symbols from a received signal comprising soft decision values for each data symbol of the frame. The data symbols of the frame have been encoded with a turbo encoder comprising upper and lower convolutional encoders which can each be represented by a trellis, and an interleaver which interleaves the encoded data between the upper and lower convolutional encoders. The turbo decoder circuit comprises a clock, a configurable network circuitry for interleaving soft decision values, an upper decoder and a lower decoder. Each of the upper and lower decoders include processing elements, which are configured, during a series of consecutive clock cycles, iteratively to receive, from the configurable network circuitry, a priori soft decision values pertaining to data symbols associated with a window of an integer number of consecutive trellis stages representing possible paths between states of the upper or lower convolutional encoder. The processing elements perform parallel calculations associated with the window using the a priori soft decision values in order to generate corresponding extrinsic soft decision values pertaining to the data symbols. The configurable network circuitry includes network controller circuitry which controls a configuration of the configurable network circuitry iteratively, during the consecutive clock cycles, to provide the a priori soft decision values for the upper decoder by interleaving the extrinsic soft decision values provided by the lower decoder, and to provide the a priori soft decision values for the lower decoder by interleaving the extrinsic soft decision values provided by the upper decoder. The interleaving performed by the configurable network circuitry controlled by the network controller is in accordance with a predetermined schedule, which provides the a priori soft decision values at different cycles of the one or more consecutive clock cycles to avoid contention between different a priori soft decision values being provided to the same processing element of the upper or the lower decoder during the same clock cycle. Accordingly the processing elements can have a window size which includes a number of stages of the trellis so that the decoder can be configured with an arbitrary number of processing elements, making the decoder circuit an arbitrarily parallel turbo decoder.

145. 发明授权

US11032114B2 Apparatus and method for sending and receiving broadcast signals 有权
公开(公告)号：US11032114B2
公开(公告)日：2021-06-08
申请号：US16917105
申请日：2020-06-30
申请人： LG ELECTRONICS INC.
发明人： Jaehyung Kim , Woosuk Ko , Sungryong Hong
IPC分类号： H04L27/26 , H04L12/18 , H04L1/00 , H03M13/25 , H03M13/27 , H03M13/29 , H03M13/09 , H03M13/11 , H03M13/15 , H04L5/00
摘要： A device for processing a broadcast signal, includes a tuner configured to receive the broadcast signal carrying a bootstrap prefixed to the beginning of a signal frame, the bootstrap including one or more bootstrap symbols, a last bootstrap symbol immediately followed by a preamble of the signal frame including bootstrap termination information, the bootstrap including first information for representing a structure of the preamble; a demodulator configured to demodulate the broadcast signal; a de-framer configured to de-frame the signal frame in the broadcast signal to output the preamble and PLP data, the preamble carrying Layer 1 (L1) signaling data for the signal frame; a signaling decoder configured to decode the L1 signaling data; and a decoder to decode the PLP data based on the L1 signaling data.

146. 发明申请

US20210168186A1 Audio Stagger Casting 有权
公开(公告)号：US20210168186A1
公开(公告)日：2021-06-03
申请号：US17124219
申请日：2020-12-16
申请人： Coherent Logix Incorporated
发明人： Kevin A. Shelby , Peter J. Nysen , Michael B. Doerr
IPC分类号： H04L29/06 , H03M13/29 , H04N21/414 , H04L1/00 , H04N21/6437 , H04N21/438 , H04L1/06 , H04N21/2383 , H04L1/08 , H04N21/61 , H03M13/00 , H04N21/2381 , H04L1/04 , H03M13/27 , H03M13/11
摘要： A system and method for wirelessly transmitting audiovisual information. A first plurality of packets including audiovisual information may be generated. A second plurality of packets including error correction coding information for the audiovisual information may be generated. Control information for associating the error correction coding information with the audiovisual information may be generated, and a third plurality of packets including the control information may also be generated. The plurality of packets, including the first, second, and third pluralities of packets, may be transmitted to a mobile device in a wireless manner. The control information may inform the mobile device of the association of the first error correction coding information with the audiovisual information.

147. 发明申请

US20210152189A1 INSTRUCTION SCHEDULING FACILITATING MITIGATION OF CROSSTALK IN A QUANTUM COMPUTING SYSTEM 有权
公开(公告)号：US20210152189A1
公开(公告)日：2021-05-20
申请号：US16687165
申请日：2019-11-18
申请人： International Business Machines Corporation
发明人： Prakash Murali , Ali Javadiabhari , David C. Mckay
IPC分类号： H03M13/29 , G06F9/48 , H03M13/00 , G06N10/00
摘要： Systems, computer-implemented methods, and computer program products that facilitate instruction scheduling to mitigate quantum gate crosstalk errors and/or qubit decoherence errors in a quantum device based on device characterization data are provided. According to an embodiment, a system can comprise a memory that stores computer executable components and a processor that executes the computer executable components stored in the memory. The computer executable components can comprise an assessment component that obtains device characterization data of a quantum device. The computer executable components can further comprise a scheduler component that generates a quantum gate execution schedule comprising parallel execution and serial execution of quantum gates in the quantum device based on the device characterization data.

148. 发明申请

US20210152186A1 DATA INTERLEAVING DEVICE AND METHOD IN WIRELESS COMMUNICATION SYSTEM USING POLAR CODE 有权
公开(公告)号：US20210152186A1
公开(公告)日：2021-05-20
申请号：US16637697
申请日：2018-07-27
申请人： Samsung Electronics Co., Ltd. , Industry Foundation of Chonnam National University
发明人： Min JANG , Hosung PARK , Jaeyoel KIM , Seokki AHN , Hongsil JEONG
IPC分类号： H03M13/27 , H03M13/13 , H03M13/29
摘要： Disclosed are: a communication technique for merging, with IoT technology, a 5G communication system for supporting a data transmission rate higher than that of a 4G system; and a system therefor. The present disclosure can be applied to intelligent services (for example, smart home, smart building, smart city, smart car or connected car, healthcare, digital education, retail, security and safety related services, and the like) on the basis of 5G communication technology and IoT-related technology.

149. 发明授权

US11012099B1 Half-size data array for encoding binary symmetry-invariant product codes 有权
公开(公告)号：US11012099B1
公开(公告)日：2021-05-18
申请号：US16666613
申请日：2019-10-29
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION
发明人： Robert A. Cyprus , Charles Camp
IPC分类号： H03M13/00 , H03M13/29 , H04L1/00 , G06F11/10
摘要： An encoder encodes input data utilizing a binary symmetry-invariant product code. The encoder includes circuitry including a half-size data array including D rows each having storage for H data bits (D=2×H+1). The encoder is configured to access bits of each row of the product code by reading a first H-bit data word from one of the D rows and a second H-bit data word across H different rows of the half-size data array. The encoder additionally includes a register configured to receive the bits of each row of the product code and to rotate the bits to obtain the rows of the product code and a row parity generator configured to generate row parity for each row of the product code. The encoder finally includes a column parity generator configured to generate, based on the row parity, column parities for the parity bits of all rows of the product code.

150. 发明申请

US20210144425A1 Control Information for a Wirelessly-Transmitted Data Stream 有权
公开(公告)号：US20210144425A1
公开(公告)日：2021-05-13
申请号：US16951371
申请日：2020-11-18
申请人： Coherent Logix, Incorporated
发明人： Colleen J. McGinn , Kevin A. Shelby , Peter J. Nysen , Michael B. Doerr
IPC分类号： H04N21/266 , H04L29/06 , H03M13/29 , H04N21/61 , H04N21/438 , H04N21/2381 , H03M13/00 , H04N21/236
摘要： Control information for configuring an audiovisual device to present multimedia content according to a first service type may be generated. A method may include generating first control information for configuring an audiovisual device to decode a multimedia stream, generating first data that indicates a structure of the first control information, and transmitting the first data and the first control information. The first control information may be generated according to a first protocol version. Second data and second control information may be similarly generated and transmitted according to a second protocol version. Disclosed techniques may facilitate receiving devices to determine whether they support received wireless transmissions and decode the transmissions based on the control information.

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