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    • 125. 发明授权
    • Method for detecting line-to-ground fault location in power network
    • 电力线路对地故障定位检测方法
    • US06756786B2
    • 2004-06-29
    • US10303822
    • 2002-11-26
    • Myoen-Song ChoiSeung-Jae Lee
    • Myoen-Song ChoiSeung-Jae Lee
    • H01H3102
    • G01R31/085G01R27/18
    • The present invention relates to a method for detecting a line-to-ground fault location in power network, and more particularly, detecting the line-to-ground fault location by direct 3-phase circuit analysis without using a symmetrical component transformation, so even in an unbalanced 3-phase circuit, the line-to-ground fault location can be accurately detected. In the method using direct 3-phase circuit analysis of this invention, inverse lemma is used to simplify matrix inversion calculations, thus the line-to-ground fault location can be easily and accurately determined even in the case of an unbalanced network without symmetrical component transformation.
    • 本发明涉及一种用于检测电网中线对地故障定位的方法,尤其涉及通过直接三相电路分析检测线对地故障定位而不使用对称分量变换的方法, 在不平衡的三相电路中,可以准确地检测到线对地故障位置。 在使用本发明的直接三相电路分析的方法中,使用逆引理来简化矩阵反演计算,因此即使在不对称分量的不平衡网络的情况下也可以容易且准确地确定线对地故障位置 转型。
    • 128. 发明授权
    • Methods of forming gates of semiconductor devices
    • 形成半导体器件栅极的方法
    • US08735250B2
    • 2014-05-27
    • US13241957
    • 2011-09-23
    • Jong-Won LeeBo-Un YoonSeung-Jae Lee
    • Jong-Won LeeBo-Un YoonSeung-Jae Lee
    • H01L21/8234
    • H01L21/28008H01L21/28105H01L21/823842H01L29/42376H01L29/49H01L29/513H01L29/66545
    • Methods of forming gates of semiconductor devices are provided. The methods may include forming a first recess in a first substrate region having a first conductivity type and forming a second recess in a second substrate region having a second conductivity type. The methods may also include forming a high-k layer in the first and second recesses. The methods may further include providing a first metal on the high-k layer in the first and second substrate regions, the first metal being provided within the second recess. The methods may additionally include removing at least portions of the first metal from the second recess while protecting materials within the first recess from removal. The methods may also include, after removing at least portions of the first metal from the second recess, providing a second metal within the second recess.
    • 提供了形成半导体器件的栅极的方法。 所述方法可以包括在具有第一导电类型的第一衬底区域中形成第一凹槽,并在具有第二导电类型的第二衬底区域中形成第二凹部。 所述方法还可以包括在第一和第二凹部中形成高k层。 所述方法还可以包括在第一和第二衬底区域中的高k层上提供第一金属,第一金属设置在第二凹槽内。 所述方法还可以包括从第二凹部移除第一金属的至少一部分,同时保护第一凹槽内的材料不被去除。 所述方法还可以包括在从第二凹部去除第一金属的至少一部分之后,在第二凹部内提供第二金属。