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121. 发明申请

US20060003489A1 One mask Pt/PCMO/Pt stack etching process for RRAM applications 有权
标题翻译：用于RRAM应用的一个掩模Pt / PCMO / Pt堆叠蚀刻工艺
公开(公告)号：US20060003489A1
公开(公告)日：2006-01-05
申请号：US10883228
申请日：2004-07-01
申请人： Fengyan Zhang , Lisa Stecker , Bruce Ulrich , Sheng Hsu
发明人： Fengyan Zhang , Lisa Stecker , Bruce Ulrich , Sheng Hsu
IPC分类号： H01L21/06
CPC分类号： H01L45/04 , H01L45/1233 , H01L45/147 , H01L45/1675
摘要： A one-mask etching method for use with a PCMO-containing RRAM to reduce stack side-wall residuals, includes preparing a substrate, taken from the group of substrates consisting of silicon, silicon dioxide and polysilicon; depositing a bottom electrode on the substrate; depositing a PCMO layer on the bottom electrode; depositing a top electrode on the PCMO layer; depositing a hard mask on the top electrode; depositing and patterning a photoresist layer on the hard mask; etching the hard mask; etching the top electrode using a first etching process having an etching atmosphere consisting of Ar, O2, and Cl2; etching the PCMO layer using an etching process taken from the group of etching processes consisting of the first etching process and a second etching process having an etching atmosphere consisting of Ar and O2. etching the bottom electrode using the first etching process; and completing the RRAM device.
摘要翻译：包含含PCMO的RRAM以减少堆叠侧壁残留物的单掩模蚀刻方法包括制备从由硅，二氧化硅和多晶硅组成的一组衬底取得的衬底; 在底物上沉积底部电极; 在底部电极上沉积PCMO层; 在PCMO层上沉积顶部电极; 在顶部电极上沉积硬掩模; 在硬掩模上沉积和图案化光致抗蚀剂层; 蚀刻硬掩模; 使用具有由Ar，O 2和Cl 2组成的蚀刻气氛的第一蚀刻工艺蚀刻顶部电极; 使用从由第一蚀刻工艺和由Ar和O 2组成的蚀刻气氛的第二蚀刻工艺组成的蚀刻工艺组中的蚀刻工艺来蚀刻PCMO层。使用第一蚀刻工艺蚀刻底部电极; 并完成RRAM设备。

122. 发明申请

US20050239262A1 PCMO thin film with memory resistance properties 有权
标题翻译：具有记忆电阻特性的PCMO薄膜
公开(公告)号：US20050239262A1
公开(公告)日：2005-10-27
申请号：US10831677
申请日：2004-04-23
申请人： Wei-Wei Zhuang , Tingkai Li , Sheng Hsu , Fengyan Zhang
发明人： Wei-Wei Zhuang , Tingkai Li , Sheng Hsu , Fengyan Zhang
IPC分类号： H01L27/105 , H01L21/00 , H01L21/20 , H01L27/10 , H01L45/00 , H01L49/02
CPC分类号： H01L45/04 , G11C13/0004 , G11C13/0007 , G11C13/0069 , G11C2013/0073 , G11C2213/31 , H01L45/1233 , H01L45/147 , H01L45/1608
摘要： A method is provided for forming a Pr0.3Ca0.7MnO3 (PCMO) thin film with crystalline structure-related memory resistance properties. The method comprises: forming a PCMO thin film with a first crystalline structure; and, changing the resistance state of the PCMO film using pulse polarities responsive to the first crystalline structure. In one aspect the first crystalline structure is either amorphous or a weak-crystalline. Then, the resistance state of the PCMO film is changed in response to unipolar pulses. In another aspect, the PCMO thin film has either a polycrystalline structure. Then, the resistance state of the PCMO film changes in response to bipolar pulses.
摘要翻译：提供了一种用于形成具有结晶结构相关的记忆电阻性质的Pr 0.3M 3 Ca 0.7 MnO 3（PCMO）薄膜的方法。该方法包括：形成具有第一晶体结构的PCMO薄膜; 并且使用响应于第一晶体结构的脉冲极性来改变PCMO膜的电阻状态。在一个方面，第一晶体结构是无定形或弱结晶。然后，响应于单极脉冲改变PCMO膜的电阻状态。另一方面，PCMO薄膜具有多晶结构。然后，PCMO膜的电阻状态响应于双极性脉冲而改变。

123. 发明申请

US20050196878A1 Single-phase c-axis doped PGO ferroelectric thin films 有权
标题翻译：单相c轴掺杂PGO铁电薄膜
公开(公告)号：US20050196878A1
公开(公告)日：2005-09-08
申请号：US11046620
申请日：2005-01-28
申请人： Fengyan Zhang , Wei-Wei Zhuang , Jong-Jan Lee , Sheng Hsu
发明人： Fengyan Zhang , Wei-Wei Zhuang , Jong-Jan Lee , Sheng Hsu
IPC分类号： H01L21/00 , H01L21/02 , H01L21/316 , H01L41/22
CPC分类号： H01L21/31691 , H01L28/55 , H01L41/317
摘要： A method for forming a doped PGO ferroelectric thin film, and related doped PGO thin film structures are described. The method comprising: forming either an electrically conductive or electrically insulating substrate; forming a doped PGO film overlying the substrate; annealing; crystallizing; and, forming a single-phase c-axis doped PGO thin film overlying the substrate, having a Curie temperature of greater than 200 degrees C. Forming a doped PGO film overlying the substrate includes depositing a doped precursor in the range between 0.1N and 0.5N, with a molecular formula of Pby−xMxGe3O11, where: M is a doping element; y=4.5 to 6; and, x=0.1 to 1. The element M can be Sn, Ba, Sr, Cd, Ca, Pr, Ho, La, Sb, Zr, or Sm.
摘要翻译：描述了用于形成掺杂的PGO铁电薄膜的方法以及相关的掺杂PGO薄膜结构。该方法包括：形成导电或电绝缘的衬底; 在衬底上形成掺杂的PGO膜; 退火; 结晶并且形成覆盖在衬底上的单相c轴掺杂的PGO薄膜，其居里温度大于200℃。形成覆盖在衬底上的掺杂PGO膜包括在0.1N和0.5之间的范围内沉积掺杂的前体 N，具有分子式为Pb x Si x N x N x O 11，其中：M是掺杂物元件; y = 4.5〜6; x = 0.1〜1。元素M可以是Sn，Ba，Sr，Cd，Ca，Pr，Ho，La，Sb，Zr或Sm。

124. 发明申请

US20050054119A1 Buffered-layer memory cell 失效
标题翻译：缓冲层存储单元
公开(公告)号：US20050054119A1
公开(公告)日：2005-03-10
申请号：US10755654
申请日：2004-01-12
申请人： Sheng Hsu , Tingkai Li , Fengyan Zhang , Wei Pan , Wei-Wei Zhuang , David Evans , Masayuki Tajiri
发明人： Sheng Hsu , Tingkai Li , Fengyan Zhang , Wei Pan , Wei-Wei Zhuang , David Evans , Masayuki Tajiri
IPC分类号： H01L27/10 , G11C13/00 , H01L27/24 , H01L45/00 , H01L21/00 , G11C11/00 , H01L21/336 , H01L21/8234
CPC分类号： H01L27/101 , G11C13/0007 , G11C13/0069 , G11C2013/0073 , G11C2213/31 , G11C2213/51 , G11C2213/56 , G11C2213/79 , H01L27/2436 , H01L45/04 , H01L45/12 , H01L45/1233 , H01L45/147
摘要： A method is provided for forming a buffered-layer memory cell. The method comprises: forming a bottom electrode; forming a colossal magnetoresistance (CMR) memory film overlying the bottom electrode; forming a memory-stable semiconductor buffer layer, typically a metal oxide, overlying the memory film; and, forming a top electrode overlying the semiconductor buffer layer. In some aspects of the method the semiconductor buffer layer is formed from YBa2Cu3O7−X (YBCO), indium oxide (In2O3), or ruthenium oxide (RuO2), having a thickness in the range of 10 to 200 nanometers (nm). The top and bottom electrodes may be TiN/Ti, Pt/TiN/Ti, In/TiN/Ti, PtRhOx compounds, or PtIrOx compounds. The CMR memory film may be a Pr1−XCaXMnO3 (PCMO) memory film, where x is in the region between 0.1 and 0.6, with a thickness in the range of 10 to 200 nm.
摘要翻译：提供了一种用于形成缓冲层存储单元的方法。该方法包括：形成底部电极; 形成覆盖底部电极的巨大磁阻（CMR）记忆膜; 形成存储器稳定的半导体缓冲层，通常为覆盖存储膜的金属氧化物; 并且形成覆盖半导体缓冲层的顶部电极。在该方法的某些方面，半导体缓冲层由厚度在10至200纳米（nm）范围内的YBa2Cu3O7-X（YBCO），氧化铟（In2O3）或氧化钌（RuO2）形成。顶部和底部电极可以是TiN / Ti，Pt / TiN / Ti，In / TiN / Ti，PtRhOx化合物或PtIrOx化合物。 CMR存储器膜可以是Pr1-XCaXMnO3（PCMO）记忆膜，其中x在0.1和0.6之间的区域中，厚度在10至200nm的范围内。

125. 发明申请

US20050009286A1 Method of fabricating nano-scale resistance cross-point memory array 有权
标题翻译：制造纳米级电阻交叉点存储阵列的方法
公开(公告)号：US20050009286A1
公开(公告)日：2005-01-13
申请号：US10909218
申请日：2004-07-29
申请人： Sheng Hsu , Wei-Wei Zhuang , Wei Pan , Fengyan Zhang
发明人： Sheng Hsu , Wei-Wei Zhuang , Wei Pan , Fengyan Zhang
IPC分类号： H01L27/105 , G11C13/00 , H01L21/8246 , H01L27/115 , H01L27/24 , H01L43/08 , H01L27/108
CPC分类号： G11C13/0007 , G11C2213/31 , G11C2213/77 , H01L27/2409 , H01L27/2463 , H01L45/04 , H01L45/1233 , H01L45/147 , H01L45/1683
摘要： A method of fabricating a nano-scale resistance cross-point memory array includes preparing a silicon substrate; depositing silicon oxide on the substrate to a predetermined thickness; forming a nano-scale trench in the silicon oxide; depositing a first connection line in the trench; depositing a memory resistor layer in the trench on the first connection line; depositing a second connection line in the trench on the memory resistor layer; and completing the memory array. A cross-point memory array includes a silicon substrate; a first connection line formed on the substrate; a colossal magnetoresistive layer formed on the first connection line; a silicon nitride layer formed on a portion of the colossal magnetoresistive layer; and a second connection line formed adjacent the silicon nitride layer and on the colossal magnetoresistive layer.
摘要翻译：制造纳米尺度电阻交叉点存储器阵列的方法包括制备硅衬底; 在衬底上沉积氧化硅至预定厚度; 在氧化硅中形成纳米尺度的沟槽; 在沟槽中沉积第一连接线; 在第一连接线上的沟槽中沉积记忆电阻层; 在所述存储器电阻层的沟槽中沉积第二连接线; 并完成内存阵列。交叉点存储器阵列包括硅衬底; 形成在所述基板上的第一连接线; 形成在第一连接线上的巨大的磁阻层; 形成在巨磁阻层的一部分上的氮化硅层; 以及与氮化硅层和巨磁阻层相邻形成的第二连接线。

126. 发明授权

US06483137B2 Capacitor utilizing c-axis oriented lead germanate film 失效
标题翻译：电容器采用c轴取向的锗酸铅膜
公开(公告)号：US06483137B2
公开(公告)日：2002-11-19
申请号：US09942205
申请日：2001-08-29
申请人： Tingkai Li , Fengyan Zhang , Yoshi Ono , Sheng Tang Hsu
发明人： Tingkai Li , Fengyan Zhang , Yoshi Ono , Sheng Tang Hsu
IPC分类号： H01L2976
CPC分类号： H01L21/31691 , C23C16/40 , H01L21/31604 , Y10S438/933 , Y10T428/12674 , Y10T428/12701 , Y10T428/12875
摘要： A ferroelectric Pb5Ge3O11 (PGO) thin film is provided with a metal organic vapor deposition (MOCVD) process and RTP (Rapid Thermal Process) annealing techniques. The PGO film is substantially crystallization with c-axis orientation at temperature between 450 and 650° C. The PGO film has an average grain size of about 0.5 microns, with a deviation in grain size uniformity of less than 10%. Good ferroelectric properties are-obtained for a 150 nm thick film with Ir electrodes. The films also show fatigue-free characteristics: no fatigue was observed up to 1×109 switching cycles. The leakage currents increase with increasing applied voltage, and are about 3.6×10−7 A/cm2 at 100 kV/cm. The dielectric constant shows a behavior similar to most ferroelectric materials, with a maximum dielectric constant of about 45. These high quality MOCVD Pb5Ge3O11 films can be used for high density single transistor ferroelectric memory applications because of the homogeneity of the PGO film grain size.
摘要翻译：铁电Pb5Ge3O11（PGO）薄膜提供金属有机气相沉积（MOCVD）工艺和RTP（快速热处理）退火技术。 PGO膜在450-650℃的温度下基本上以c轴取向结晶.PGO膜的平均粒径为约0.5微米，晶粒尺寸均匀度的偏差小于10％。对于具有Ir电极的150nm厚的膜，获得良好的铁电性能。这些胶片还显示出无疲劳特性：在1x109个开关周期内没有观察到疲劳。泄漏电流随着施加电压的增加而增加，在100kV / cm时为约3.6×10 -7 A / cm 2。介电常数表现出类似于大多数铁电材料的行为，其最大介电常数为约45.这些高质量的MOCVD Pb5Ge3O11膜可用于高密度单晶硅铁氧体存储器应用，因为PGO膜晶粒尺寸的均匀性。

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