会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 116. 发明授权
    • Semiconductor memory, semiconductor memory system, and error correction method for semiconductor memory
    • 半导体存储器,半导体存储器系统和用于半导体存储器的误差校正方法
    • US08078938B2
    • 2011-12-13
    • US12127603
    • 2008-05-27
    • Kuninori Kawabata
    • Kuninori Kawabata
    • G11C29/00
    • H03M13/2915G06F11/1008G06F11/108H03M13/19H03M13/2906
    • Aspects of the embodiment include providing a semiconductor memory comprising; a plurality of memory blocks that includes a plurality of regular memory cells; a plurality of first parity blocks that are disposed in accordance with the plurality of memory blocks, wherein the plurality of first parity blocks include a first parity memory cell holding a first parity code; a second parity block that includes a second parity memory cell holding a second parity code having a parity bit corresponding to the first parity code; a parity error correction unit that corrects an error of the first parity code using the second parity code; and a data error correction unit that corrects an error of the data stored in a regular memory cell using the first parity code corrected by the parity error correction unit.
    • 实施例的方面包括提供半导体存储器,包括: 多个存储块,包括多个常规存储单元; 多个第一奇偶校验块,其根据所述多个存储块设置,其中所述多个第一奇偶校验块包括保持第一奇偶校验码的第一奇偶校验存储单元; 第二奇偶校验块,包括保持具有对应于第一奇偶校验码的奇偶校验位的第二奇偶校验码的第二奇偶校验存储单元; 奇偶纠错单元,其使用所述第二奇偶校验码校正所述第一奇偶码的误差; 以及数据误差校正单元,其使用由奇偶纠错单元校正的第一奇偶校验来校正存储在常规存储单元中的数据的误差。
    • 120. 发明申请
    • FACILITATING ERROR DETECTION AND CORRECTION AFTER A MEMORY COMPONENT FAILURE
    • 在存储器组件故障后进行错误检测和校正
    • US20100332944A1
    • 2010-12-30
    • US12494506
    • 2009-06-30
    • Robert E. CypherBharat K. Daga
    • Robert E. CypherBharat K. Daga
    • H03M13/05G06F11/10H03M13/09
    • H03M13/293G06F11/1012H03M13/09H03M13/13H03M13/19H03M13/2909H03M13/2915H03M13/3776
    • Some embodiments of the present invention provide a system that can be reconfigured to provide error detection and correction after a failure of a memory component in a memory system. During operation, the system accesses a block of data from the memory system, wherein each block of data in the memory system includes an array of bits logically organized into R rows and C columns, including two checkbit columns containing checkbits, and C-2 data-bit columns containing data bits, wherein each column is stored in a different memory component, and wherein the checkbits are generated from the data bits to provide block-level detection and correction for a failed memory component. Next, upon examining the block of data, the system determines that a specific memory component in the memory system has failed. If the failed memory component contains a data-bit column for the block of data, the system uses checkbits from the two checkbit columns to correct the data-bit column, and then stores the corrected data-bit column. Next, the system generates and stores new checkbits in a functioning memory component, wherein the new checkbits provide single-error-correction and double-error-detection for erroneous bits in the block of data, but do not provide for detection and correction of a failed memory component.
    • 本发明的一些实施例提供一种系统,其可被重新配置以在存储器系统中的存储器组件故障之后提供错误检测和校正。 在操作期间,系统从存储器系统访问数据块,其中存储器系统中的每个数据块包括逻辑上组织成R行和C列的位阵列,包括两个包含校验位的校验位列和C-2数据 包含数据位的位列,其中每列存储在不同的存储器组件中,并且其中从数据位生成校验位以提供对故障存储器组件的块级检测和校正。 接下来,在检查数据块时,系统确定存储器系统中的特定存储器组件已经失败。 如果失败的内存组件包含数据块的数据位列,系统将使用两个checkbit列中的校验位来校正数据位列,然后存储校正的数据位列。 接下来,系统生成并将新的校验码存储在功能存储器组件中,其中新的校验位为数据块中的错误位提供单错误校正和双重错误检测,但不提供检测和校正 存储器组件失效