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    • 111. 发明申请
    • LIQUID CRYSTAL DISPLAY
    • 液晶显示器
    • US20080024709A1
    • 2008-01-31
    • US11772621
    • 2007-07-02
    • Seung-Hwan Moon
    • Seung-Hwan Moon
    • G02F1/1343
    • G09G3/3688G09G3/3655G09G3/3677G09G2300/0408G09G2300/0426G09G2300/0439G09G2330/021
    • A liquid crystal display includes a plurality of pixels arranged in a matrix, a substrate, and a plurality of gate lines, data lines, thin film transistors, pixel electrodes, and storage electrode lines. The gate lines are formed on the substrate. The data lines run crosswise relative to the gate lines above or below the gate lines, and the thin film transistors are connected to the gate lines and the data lines. The pixel electrodes are connected to the thin film transistors, and have a first side formed in parallel with the gate lines and a second side shorter than the first side and adjacent to the first side. The storage electrode lines overlap with the pixel electrodes. Storage electrode signals applied to the storage electrode lines are periodic alternating signals.
    • 液晶显示器包括排列成矩阵的多个像素,基板以及多条栅极线,数据线,薄膜晶体管,像素电极和存储电极线。 栅极线形成在基板上。 数据线相对于栅极线上方或下方的栅极线横向延伸,并且薄膜晶体管连接到栅极线和数据线。 像素电极连接到薄膜晶体管,并且具有与栅极线平行形成的第一侧和比第一侧短且与第一侧相邻的第二侧。 存储电极线与像素电极重叠。 施加到存储电极线的存储电极信号是周期性交替信号。
    • 113. 发明授权
    • Liquid crystal display and driving method thereof
    • 液晶显示及其驱动方法
    • US07193623B2
    • 2007-03-20
    • US10218294
    • 2002-08-14
    • Seung-Hwan Moon
    • Seung-Hwan Moon
    • G09G5/00G09G3/36G02F1/1345
    • G09G3/3611G09G3/3648G09G2300/0426
    • A liquid crystal display (LCD) is provided. A display region formed on an array panel has a plurality of gate lines and a plurality of data lines arranged in rows and columns, respectively. A data driving unit has a plurality of first data driving integrated circuits (ICs) and a plurality of second data driving ICs located proximal to the first data driving ICs, the plurality of first data driving ICs providing first data signals to a corresponding plurality of first data lines and the plurality of second data driving ICs providing second data signals to a corresponding plurality of second data lines. A gate driving unit has a plurality of gate driving ICs for providing scanning signals to the plurality of gate lines. A signal transmission film has a first signal transmission film and a second transmission film, the first transmission film transmitting the scanning signals to the gate driving unit and the first data signals to the plurality of first data driving ICs, and the second transmission film transmitting the second data signals to the plurality of second data driving ICs.
    • 提供液晶显示器(LCD)。 形成在阵列面板上的显示区域具有分别以行和列排列的多条栅极线和多条数据线。 数据驱动单元具有位于第一数据驱动IC附近的多个第一数据驱动集成电路(IC)和多个第二数据驱动IC,多个第一数据驱动IC提供第一数据信号到相应的多个第一数据 数据线和多个第二数据驱动IC,其向相应的多个第二数据线提供第二数据信号。 栅极驱动单元具有用于向多条栅极线提供扫描信号的多个栅极驱动IC。 信号传输膜具有第一信号传输膜和第二传输膜,第一传输膜将扫描信号传输到栅极驱动单元,并将第一数据信号传输到多个第一数据驱动IC,并且第二传输膜传输第 第二数据信号发送到多个第二数据驱动IC。
    • 114. 发明申请
    • Flat panel display and manufacturing method thereof
    • 平板显示及其制造方法
    • US20070052656A1
    • 2007-03-08
    • US11498434
    • 2006-08-03
    • Haeng-Won ParkSeung-Hwan Moon
    • Haeng-Won ParkSeung-Hwan Moon
    • G09G3/36
    • G09G3/3677G09G2300/0426G09G2310/08G09G2320/0223
    • A flat panel display with reduced malfunction rate and improved image quality and a method for making such flat panel display are presented. The flat panel display is operated by a gate drive circuit that receives a first gate signal for driving a first gate line at one end of a data line and a second gate signal for driving a second gate line at the other end of the data line. First and second clock signals are supplied to the gate drive circuit, and the width of the first and second clock signal lines are adjusted such that a phase difference between the first gate signal and the second gate signal corresponds to a signal delay time between the two ends of the data line. The first and second clock signal lines and the gate and data lines are integrated.
    • 本发明提供一种具有降低故障率和提高图像质量的平板显示器以及制造这种平板显示器的方法。 平板显示器由栅极驱动电路操作,栅极驱动电路接收用于驱动数据线一端的第一栅极线的第一栅极信号和用于驱动数据线另一端的第二栅极线的第二栅极信号。 第一和第二时钟信号被提供给栅极驱动电路,并且调整第一和第二时钟信号线的宽度,使得第一栅极信号和第二栅极信号之间的相位差对应于两者之间的信号延迟时间 数据线的末端。 第一和第二时钟信号线以及栅极和数据线被集成。