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111. 发明申请

US20090019444A1 Information processing and control 失效
公开(公告)号：US20090019444A1
公开(公告)日：2009-01-15
申请号：US12171063
申请日：2008-07-10
申请人： Kiyokuni Kawachiya , Takeshi Ogasawara , Hideaki Komatsu
发明人： Kiyokuni Kawachiya , Takeshi Ogasawara , Hideaki Komatsu
IPC分类号： G06F9/46
CPC分类号： G06F9/46
摘要： Information processing apparatus, including occurrence number counter counting events that occurred in each of a plurality of CPUs. Apparatus performs functions of; storing accumulated occurrence number of events, which occurred while the thread is being executed by each of the CPUs, in a thread storage area of the thread associating accumulated occurrence number with CPU; storing, in the thread storage area, a value of occurrence number counter of the CPU, the value having been counted before the thread is resumed by the CPU; and adding, to accumulated occurrence number which has been stored in accumulated number storing unit while corresponding to the CPU, a difference value obtained by subtracting a counter value, which has been stored in the start-time number storing unit of the thread, from a counter value of the occurrence number counter of the CPU, in a case where the CPU terminates an execution of the thread.

112. 发明申请

US20080141216A1 COMPILING METHOD AND STORAGE MEDIUM THEREFOR 失效
公开(公告)号：US20080141216A1
公开(公告)日：2008-06-12
申请号：US11932853
申请日：2007-10-31
申请人： Akira Koseki , Mikio Takeuchi , Hideaki Komatsu
发明人： Akira Koseki , Mikio Takeuchi , Hideaki Komatsu
IPC分类号： G06F12/06 , G06F9/44
CPC分类号： G06F8/447 , G06F8/441 , G06F8/443
摘要： A compiler includes a register allocator for allocating registers for instructions in a program to be compiled, and a code generator for generating object code based on the register allocation results performed by the register allocator. The register allocator allocates logical registers for instructions in the program to be compiled. The register allocation further allocates, to physical registers, the logical registers that are allocated to the instructions of the program, so that the physical registers that are live at a procedure call in the program to be compiled are allocated from the bottom of the register stack.

113. 发明授权

US07383417B2 Prefetching apparatus, prefetching method and prefetching program product 有权
标题翻译：预取设备，预取方法和预取程序产品
公开(公告)号：US07383417B2
公开(公告)日：2008-06-03
申请号：US11377518
申请日：2006-03-15
申请人： Toshiaki Yasue , Hideaki Komatsu
发明人： Toshiaki Yasue , Hideaki Komatsu
IPC分类号： G06F9/26 , G06F9/34 , G06F12/00
CPC分类号： G06F9/383 , G06F9/3832
摘要： The efficient performance of prefetching of data prior to the reading of the data by a program. A prefetching apparatus, for prefetching data from a file to a buffer before the data is read by a program, includes: a history recorder, for recording a history for a plurality of data readings issued by the program while performing data reading; a prefetching generator, for generating a plurality of prefetchings that correspond to the plurality of data readings recorded in the history; a prefetching process determination unit, for determining, based on the history, the performance order for the plurality of prefetchings; and a prefetching unit, for performing, when following the determination of the performance order the program is executed, the plurality of prefetchings in the performance order.
摘要翻译：在程序读取数据之前预取数据的有效性能。一种用于在由程序读取数据之前将数据从文件预取到缓冲器的预取装置包括：历史记录器，用于在执行数据读取时记录由程序发出的多个数据读取的历史; 预取生成器，用于生成对应于记录在历史中的多个数据读数的多个预取取; 预取处理确定单元，用于基于历史确定多个预取取的表现顺序; 以及预取单元，用于当执行所述程序的执行顺序的确定时，执行所述执行顺序中的所述多个预取。

114. 发明申请

US20080127151A1 Source Code Modification Technique 失效
标题翻译：源代码修改技术
公开(公告)号：US20080127151A1
公开(公告)日：2008-05-29
申请号：US11530954
申请日：2006-09-12
申请人： Motohiro Kawahito , Hideaki Komatsu , Toshio Nakatani
发明人： Motohiro Kawahito , Hideaki Komatsu , Toshio Nakatani
IPC分类号： G06F9/45
CPC分类号： G06F8/443
摘要： A modification to source code is applied in an automated manner to improve program performance while maintaining the meaning of an associated program. Source code is rewritten to improve the operation of the associated program. Prior to applying the source code optimization to the program, confirmation of approval by the programmer must be maintained. In one embodiment, the programmer is presented with numerical data pertaining to an improvement ratio associated with application of the source code optimization.
摘要翻译：以自动方式应用源代码的修改，以提高程序性能，同时保持相关程序的含义。源代码被重写以改善相关程序的操作。在将源代码优化应用于程序之前，必须保持程序员的批准确认。在一个实施例中，向程序员呈现关于与应用源代码优化相关联的改进率的数值数据。

115. 发明授权

US07331044B2 Compiling method and storage medium therefor 有权
标题翻译：编译方法及存储介质
公开(公告)号：US07331044B2
公开(公告)日：2008-02-12
申请号：US10063958
申请日：2002-05-29
申请人： Akira Koseki , Mikio Takeuchi , Hideaki Komatsu
发明人： Akira Koseki , Mikio Takeuchi , Hideaki Komatsu
IPC分类号： G06F9/45
CPC分类号： G06F8/447 , G06F8/441 , G06F8/443
摘要： A compiler includes a register allocator for allocating registers for instructions in a program to be compiled, and a code generator for generating object code based on the register allocation results performed by the register allocator. The register allocator allocates logical registers for instructions in the program to be compiled, register allocation further allocates, to physical registers, the logical registers that are allocated to the instructions of the program, so that the physical registers that are live at a procedure call in the program to be compiled are allocated from the bottom of the register stack.
摘要翻译：编译器包括用于分配用于要编译的程序中的指令的寄存器的寄存器分配器，以及用于根据由寄存器分配器执行的寄存器分配结果来生成目标代码的代码生成器。寄存器分配器为要编译的程序中的指令分配逻辑寄存器，寄存器分配进一步向物理寄存器分配分配给程序指令的逻辑寄存器，使得在过程调用中存在的物理寄存器要编译的程序从寄存器堆栈的底部分配。

116. 发明申请

US20070256066A1 Profile-Based Global Live-Range Splitting 失效
标题翻译：基于档案的全球直播分割
公开(公告)号：US20070256066A1
公开(公告)日：2007-11-01
申请号：US11380833
申请日：2006-04-28
申请人： Takuya Nakaike , Tatsushi Inagaki , Hideaki Komatsu
发明人： Takuya Nakaike , Tatsushi Inagaki , Hideaki Komatsu
IPC分类号： G06F9/45
CPC分类号： G06F8/433 , G06F8/441 , G06F8/443
摘要： A method and system are provided for splitting a live-range of a variable in frequently executed regions of program instructions. The live-range of a variable is split into multiple sub-ranges, each of which can be assigned to a different register or spilled into memory. The amount of spill code is reduced in frequently used regions of code by coalescing the live ranges based on profile information obtained after splitting the live ranges at every join and fork point in a control flow graph.
摘要翻译：提供了一种方法和系统，用于在频繁执行的程序指令区域中分割变量的实时范围。变量的实时范围被分成多个子范围，每个子范围可以分配给不同的寄存器或溢出到存储器中。在频繁使用的代码区域中，通过在控制流程图中的每个连接点和分支点分割活动范围之后获得的简档信息来聚合生存范围，减少了经常使用的代码区域的数量。

117. 发明授权

US07260817B2 Method using array range check information for generating versioning code before a loop for execution 失效
标题翻译：使用数组范围检查信息在循环执行之前生成版本代码的方法
公开(公告)号：US07260817B2
公开(公告)日：2007-08-21
申请号：US10334180
申请日：2002-12-30
申请人： Motohiro Kawahito , Toshiaki Yasue , Hideaki Komatsu
发明人： Motohiro Kawahito , Toshiaki Yasue , Hideaki Komatsu
IPC分类号： G06F9/45
CPC分类号： G06F8/437 , G06F8/4441
摘要： A system and method are provided that in one aspect eliminate redundant array range checks by performing a versioning for a loop. In another aspect, a system and method optimize array range checks by performing data-flow analysis in reverse order of the program execution. Yet in another aspect, a system and method obtains information about array ranges already checked by performing data-flow analysis in program execution order and eliminate redundant array range checks from this information.
摘要翻译：提供了一种系统和方法，其一方面通过执行循环的版本控制来消除冗余阵列范围检查。在另一方面，系统和方法通过以与程序执行相反的顺序执行数据流分析来优化阵列范围检查。另一方面，系统和方法通过以程序执行顺序执行数据流分析获得已经检查的数组范围的信息，并从该信息中消除冗余阵列范围检查。

118. 发明授权

US07174546B2 Compiler and register allocation method 失效
标题翻译：编译器和寄存器分配方法
公开(公告)号：US07174546B2
公开(公告)日：2007-02-06
申请号：US09950904
申请日：2001-09-12
申请人： Akira Koseki , Hideaki Komatsu
发明人： Akira Koseki , Hideaki Komatsu
IPC分类号： G06F9/45
CPC分类号： G06F8/441
摘要： A computer, computer compiler and method for reducing the number of interferences between variables during graph coloring while maintaining the possibility that the instructions will be executed in parallel. A compiler, which converts into a machine language the source code of a program written in a programming language and optimizes the program includes: a directed acyclic graph DAG analysis unit 11 for constructing and analyzing a DAG for an instruction in a program to be processed; an interference graph construction unit 12 for employing the analysis results to construct an interference graph representing the probability that an interference will occur between variables used by the instructions; and a graph coloring unit 13 for allocating registers for the instruction based on the interference graph that is constructed.
摘要翻译：一种用于在图形着色期间减少变量之间的干扰数量的计算机，计算机编译器和方法，同时保持指令将被并行执行的可能性。一种编译器，其将以编程语言编写的程序的源代码转换为机器语言，并且优化程序包括：用于构建和分析用于要处理的程序中的指令的DAG的有向非循环图DAG分析单元11; 干涉图构造单元12，用于使用分析结果构建表示在指令使用的变量之间将发生干扰的概率的干涉图; 以及图形着色单元13，用于基于所构建的干涉图来分配用于指令的寄存器。

119. 发明申请

US20060179428A1 Method and system for efficiently starting a JAVA application 审中-公开
标题翻译：有效启动JAVA应用程序的方法和系统
公开(公告)号：US20060179428A1
公开(公告)日：2006-08-10
申请号：US11054899
申请日：2005-02-10
申请人： Kiyokuni Kawachiya , Tamiya Onodera , Kazunori Ogata , Hideaki Komatsu
发明人： Kiyokuni Kawachiya , Tamiya Onodera , Kazunori Ogata , Hideaki Komatsu
IPC分类号： G06F9/45
CPC分类号： G06F9/485
摘要： A method and system are provided for starting a new JAVA application while eliminating overhead associated therewith. The new JAVA application is created from a memory image of an initialized JAVA application. The memory image of the process which is executing the initialized JAVA application is copied to enable the memory image to be observed by the new JAVA application. In addition, to copying the memory image, the states of system resources and operating system monitors not present in the copied memory image are recreated on the JAVA application.
摘要翻译：提供了一种方法和系统，用于启动新的JAVA应用程序，同时消除与之相关的开销。新的JAVA应用程序是从已初始化的JAVA应用程序的内存映像创建的。正在执行初始化JAVA应用程序的进程的内存映像被复制，以使新的JAVA应用程序能够观察到内存映像。此外，为了复制内存映像，在JAVA应用程序中重新创建不存在于复制的内存映像中的系统资源和操作系统监视器的状态。

120. 发明授权

US06634023B1 Compile method, exception handling method and computer 有权
公开(公告)号：US06634023B1
公开(公告)日：2003-10-14
申请号：US09334789
申请日：1999-06-16
申请人： Hideaki Komatsu , Takeshi Oqasawara
发明人： Hideaki Komatsu , Takeshi Oqasawara
IPC分类号： G06F945
CPC分类号： G06F8/445
摘要： The present invention enables re-ordering of instructions to be executed while assuring a precise exception. In Java language, an optimization process of re-ordering instructions to be executed is performed by Just-In-Time compiler. For instance, the instructions lining in order from instruction E1 which was moved forward to instruction S2which had been located before E1 is registered as interrupt inhibited section R1, and from instruction S4 which was moved forward to instruction S3 which had been located before S4 is registered as interrupt inhibited section R2 (S is an instruction which has an affect observable from the outside at the execution, and E is an instruction which may cause an exception). Also, in FIG. 7, S4 which was an instruction behind E1 in the original order is registered as R1's instruction invalid at an exception. If E1 causes an exception, an interrupt handler is activated and the instructions of interrupt inhibited section R1 are copied to another area. S4 is not copied in that case. In addition, a branch code to an exception handling routine is attached to the end of the copy. If execution is restarted from S1, the instructions required to be executed for assuring the precise exception are executed, and it may move on to an exception handling routine thereafter.

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