会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 111. 发明授权
    • Pixel array substrate
    • 像素阵列基板
    • US08330884B2
    • 2012-12-11
    • US12352575
    • 2009-01-12
    • Liang-hao KangYang-Hui Chang
    • Liang-hao KangYang-Hui Chang
    • G02F1/1368G02F1/1333
    • G02F1/136204G09G3/3648G09G2300/0413G09G2330/04
    • A pixel array substrate includes a pixel region and a circuit region adjacent to the pixel region. A plurality of display pixel units are disposed in the pixel region and a plurality of dummy pixel units are disposed in the circuit region. Each of the dummy pixel units includes a data line, a scan line, a plurality of switching elements and a plurality of pixel electrodes. The switching elements are electrically connected to the scan line and data line. The pixel electrodes are electrically connected to the switching elements. Particularly, electrostatic currents in the pixel region can be dissipated by the dummy pixel units in the circuit region. The dummy pixel units preserve the continuity of electricity in the pixel array substrate and function as an inner short ring. Therefore, the area of the circuit region on the pixel array substrate is larger.
    • 像素阵列基板包括像素区域和与像素区域相邻的电路区域。 多个显示像素单元设置在像素区域中,并且在电路区域中设置多个虚拟像素单元。 每个虚拟像素单元包括数据线,扫描线,多个开关元件和多个像素电极。 开关元件电连接到扫描线和数据线。 像素电极电连接到开关元件。 特别地,像素区域中的静电电流可以由电路区域中的虚拟像素单元消散。 虚拟像素单元保持像素阵列基板中的电连续性并且用作内部短环。 因此,像素阵列基板上的电路区域的面积较大。
    • 112. 发明授权
    • Liquid crystal display device with adaptive charging/discharging time and related driving method
    • 具有自适应充放电时间和相关驱动方式的液晶显示装置
    • US08325123B2
    • 2012-12-04
    • US12716275
    • 2010-03-03
    • Ling LiShian-Jun ChiouYing-Hui ChenChi-Neng Mo
    • Ling LiShian-Jun ChiouYing-Hui ChenChi-Neng Mo
    • G09G3/36
    • G09G3/3648G09G2310/0251G09G2320/0285G09G2340/16G09G2360/16
    • A liquid crystal display device includes a plurality of gate lines, a plurality of data lines, a pixel array, a gate driver, a timing controller, and an optimization circuit. Each pixel unit in the pixel array displays images according to the gate driving signal received from a corresponding gate line and the data driving signal received from a corresponding data line. According to an optimized reference value, the timing controller provides an output enable signal, based on which the gate driver outputs the gate driving signals. The optimization circuit receives a first grayscale data related to display images of a row of pixel units in a first driving period and a second grayscale data related to display images of the row of pixel units in a second driving period, and provides the optimized reference value according the difference between the first and second grayscale data.
    • 液晶显示装置包括多条栅极线,多条数据线,像素阵列,栅极驱动器,定时控制器和优化电路。 像素阵列中的每个像素单元根据从对应的栅极线接收的栅极驱动信号和从相应的数据线接收的数据驱动信号来显示图像。 根据优化的参考值,定时控制器提供输出使能信号,基于该输出使能信号,栅极驱动器输出栅极驱动信号。 优化电路在第二驱动周期中接收与第一驱动周期中的一行像素单元的显示图像相关的第一灰度数据和与第二驱动周期中的该像素单元的显示图像相关的第二灰度数据,并且提供优化的参考值 根据第一和第二灰度数据之间的差异。
    • 113. 发明申请
    • PIXEL STRUCTURE AND MANUFACTURING METHOD THEREOF
    • 像素结构及其制造方法
    • US20120292620A1
    • 2012-11-22
    • US13183448
    • 2011-07-15
    • Yuan-Hsin Tsou
    • Yuan-Hsin Tsou
    • H01L33/16H01L33/42H01L33/52
    • H01L27/1288
    • A manufacturing method of pixel structure includes: sequentially forming a gate, a gate insulation layer, a semiconductor layer and a conductive layer on a substrate; forming a first patterned photoresist layer including multiple first photoresist blocks and multiple second photoresist blocks on the conductive layer; reducing the thickness of the first patterned photoresist layer until the second photoresist blocks are completely removed; forming a pixel electrode layer and a second photoresist layer on a partial pixel electrode layer; removing a part of the pixel electrode layer exposed by the second photoresist layer, a partial conductive layer and a partial semiconductor layer both under the removed pixel electrode layer to define a first electrode block, a second electrode block and a channel region; removing the remained first patterned photoresist layer and second photoresist layer and forming a protective layer and a common electrode layer on a part of the protective layer.
    • 像素结构的制造方法包括:在基板上依次形成栅极,栅极绝缘层,半导体层和导电层; 在所述导电层上形成包括多个第一光致抗蚀剂嵌段和多个第二光致抗蚀剂嵌段的第一图案化光致抗蚀剂层; 减小第一图案化光致抗蚀剂层的厚度,直到第二光致抗蚀剂块完全去除; 在部分像素电极层上形成像素电极层和第二光致抗蚀剂层; 在去除的像素电极层下面去除由第二光致抗蚀剂层暴露的像素电极层的一部分,部分导电层和部分半导体层,以限定第一电极块,第二电极块和沟道区; 去除残留的第一图案化光致抗蚀剂层和第二光致抗蚀剂层,并在保护层的一部分上形成保护层和公共电极层。
    • 116. 发明授权
    • Gate driving circuit of display panel including shift register sets
    • 显示面板的门驱动电路包括移位寄存器组
    • US08305330B2
    • 2012-11-06
    • US12582716
    • 2009-10-21
    • Yu-Chieh FangLiang-Hua Yeh
    • Yu-Chieh FangLiang-Hua Yeh
    • G09G3/36
    • G09G3/3677G09G2320/0257
    • A gate driving circuit of a display panel including a plurality of shift register sets coupled in series is provided. Every shift register set includes a shift register unit and a transistor coupled therewith. The shift register units receive a gate timing signal and an inverted gate timing signal, and one of a first level shift register unit and a last level shift register unit further receives a threshold driving signal. The shift register units respectively output a plurality of gate driving signals sequentially according to the threshold driving signal, the gate timing signal and the inverted gate timing signal. A gate and a first source/drain of each transistor are coupled to receive a gate controlling signal, and a second source/drain of each transistor is coupled to the corresponding shift register unit to output one of the gate driving signals.
    • 提供了包括串联耦合的多个移位寄存器组的显示面板的栅极驱动电路。 每个移位寄存器组包括移位寄存器单元和与其耦合的晶体管。 移位寄存器单元接收门定时信号和反相门定时信号,并且第一电平移位寄存器单元和最后电平移位寄存器单元中的一个进一步接收阈值驱动信号。 移位寄存器单元根据阈值驱动信号,门定时信号和反相门定时信号分别输出多个栅极驱动信号。 每个晶体管的栅极和第一源极/漏极被耦合以接收栅极控制信号,并且每个晶体管的第二源极/漏极耦合到相应的移位寄存器单元以输出栅极驱动信号之一。
    • 118. 发明授权
    • Light pen
    • 光笔
    • US08292485B2
    • 2012-10-23
    • US12643944
    • 2009-12-21
    • Yin Wang
    • Yin Wang
    • B43K29/00
    • G06F3/03545G06F2203/04101G06F2203/04105
    • A light pen includes a case, a light source, a pen-nib structure, a first lens device, an elastic piece, a hollow knob, and a linkage pipe. The pen-nib structure is disposed through the case. The first lens device is disposed between the light source and the pen-nib structure. The elastic piece is connected to the first lens device. The hollow knob rotatably sheathes the first lens device. The linkage pipe sheathes the first lens device and is connected to the hollow knob for driving the elastic piece to move away from the pen-nib structure when the hollow knob rotates to a first position, so that the pen-nib structure can move relative to the case. The linkage pipe is further used for being separate from the elastic piece when the hollow knob rotates to a second position, so that the elastic piece can be engaged with the pen-nib structure.
    • 光笔包括壳体,光源,笔尖结构,第一透镜装置,弹性片,中空旋钮和连杆管。 笔尖结构通过外壳设置。 第一透镜装置设置在光源和笔尖结构之间。 弹性件连接到第一透镜装置。 中空旋钮可旋转地夹住第一透镜装置。 连接管固定第一透镜装置并且连接到中空旋钮,用于驱动弹性片,以在中空旋钮旋转到第一位置时远离笔尖结构移动,使得笔尖结构可相对于 案子。 当中空旋钮旋转到第二位置时,连杆管进一步用于与弹性件分离,使得弹性件可与笔尖结构接合。
    • 119. 发明授权
    • Image processing method for multi-depth-of-field 3D-display
    • 用于多场景3D显示的图像处理方法
    • US08289373B2
    • 2012-10-16
    • US12431230
    • 2009-04-28
    • Meng-Chao KaoTzu-Chiang Shen
    • Meng-Chao KaoTzu-Chiang Shen
    • H04N13/00
    • H04N13/395
    • A multi-depth-of-field 3D-display image processing method is provided. An input image is divided into a foreground and a background signal, resolutions of the foreground and the background signals are compressed into half, the foreground and the background signals with half resolution are synthesized into a relay image to be displayed at a first and a second side of the relay image respectively, and the background signal of the relay image is reversed towards the other side. The relay image is then input to a play device, and a processing circuit reads a forward pixel data and a backward pixel data simultaneously and provides the data to a front and a back panel respectively. The processing circuit magnifies the first side of the front panel and the back panel into a full screen picture towards a predetermined direction, so as to output a full picture 3D image.
    • 提供了一种多场景3D显示图像处理方法。 输入图像被分成前景和背景信号,前景和背景信号的分辨率被压缩成一半,具有半分辨率的前景和背景信号被合成为中继图像以在第一和第二时间显示 并且继电器图像的背景信号朝向另一侧反转。 然后将继电器图像输入到播放装置,并且处理电路同时读取前向像素数据和后向像素数据,并将数据分别提供给前面板和后面板。 处理电路将前面板和后面板的第一面朝向预定方向放大成全屏图像,以便输出全画面3D图像。
    • 120. 发明授权
    • Integrated electrochromic 2D/3D display device
    • 集成电致变色2D / 3D显示设备
    • US08284242B2
    • 2012-10-09
    • US12542701
    • 2009-08-18
    • Yin WangChun-Fu Liu
    • Yin WangChun-Fu Liu
    • H04N15/00H04N13/04
    • H04N13/31H04N13/356
    • An integrated electrochromic 2D/3D display device including a first substrate; a parallax barrier unit disposed under the first substrate; a color filter unit disposed under the parallax barrier unit; a common electrode disposed under the color filter unit; a liquid crystal unit disposed under the common electrode; a plurality of thin film transistors disposed under the liquid crystal unit; a second substrate disposed under the plurality of thin film transistors; and a light emitting unit disposed under the second substrate is provided. Another integrated electrochromic 2D/3D display device including a substrate; a parallax barrier unit disposed under the substrate; and a display unit disposed under the parallax barrier unit is also provided. An adjustment of a planar image and a stereo image is performed to reduce a thickness and an assembling cost of conventional display devices.
    • 一种包括第一基板的集成电致变色2D / 3D显示装置; 设置在所述第一基板下方的视差屏障单元; 设置在视差屏障单元下方的滤色器单元; 设置在所述滤色器单元下方的公共电极; 设置在公共电极下方的液晶单元; 设置在液晶单元下方的多个薄膜晶体管; 设置在所述多个薄膜晶体管下方的第二基板; 并且设置设置在第二基板下方的发光单元。 另一种集成的电致变色2D / 3D显示装置,包括基板; 设置在所述基板下方的视差屏障单元; 并且还设置设置在视差屏障单元下方的显示单元。 执行平面图像和立体图像的调整以减小常规显示装置的厚度和组装成本。