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101. 发明申请

US20150348864A1 Connectable Package Extender for Semiconductor Device Package 有权
标题翻译：用于半导体器件封装的可连接封装扩展器
公开(公告)号：US20150348864A1
公开(公告)日：2015-12-03
申请号：US14290046
申请日：2014-05-29
申请人： Infineon Technologies AG
发明人： Tian San Tan , Theng Chao Long , Ming Kai Benny Goh
IPC分类号： H01L23/367 , H01L23/31 , H01L21/48 , H01L29/78 , H01L29/739 , H01L21/52 , H01L21/56 , H01L23/46
CPC分类号： H01L23/3672 , H01L21/4871 , H01L21/4882 , H01L21/52 , H01L21/56 , H01L23/3107 , H01L23/3675 , H01L23/46 , H01L23/473 , H01L23/49524 , H01L23/49562 , H01L23/49568 , H01L24/37 , H01L24/40 , H01L29/7395 , H01L29/7802 , H01L2224/32245 , H01L2224/37124 , H01L2224/37147 , H01L2224/40245 , H01L2924/13055 , H01L2924/181 , H01L2924/00012 , H01L2924/00
摘要： A semiconductor packaging system includes a semiconductor device package having a semiconductor chip with two or more terminals and a protective structure encapsulating and electrically insulating the semiconductor chip. Two or more electrical conductors that are each electrically connected to one of the terminals extend to an outer surface of the protective structure. A first surface feature is on an exterior surface of the semiconductor device package. The system further includes a connectable package extender having a second surface feature configured to interlock with the first surface feature when the first surface feature is mated with the second surface feature so as to secure the package extender to the semiconductor device package. An extension portion adjoins and extends away from the exterior surface of the semiconductor device package when the package extender is secured to the semiconductor device package.
摘要翻译：半导体封装系统包括具有两个或更多个端子的半导体芯片的半导体器件封装以及封装并电绝缘半导体芯片的保护结构。两个或多个电连接到一个端子的电导体延伸到保护结构的外表面。第一表面特征在半导体器件封装的外表面上。该系统还包括可连接的包装扩展器，其具有第二表面特征，该第二表面特征构造成当第一表面特征与第二表面特征配合时与第一表面特征互锁，以便将包装延伸器固定到半导体器件封装。当包装延伸器固定到半导体器件封装件上时，延伸部分邻接并延伸远离半导体器件封装的外表面。

102. 发明授权

US09196563B2 Bonded body and semiconductor module 有权
标题翻译：保固体和半导体模块
公开(公告)号：US09196563B2
公开(公告)日：2015-11-24
申请号：US14374396
申请日：2012-11-21
申请人： Hitachi, Ltd.
发明人： Yuichi Sawai , Takashi Naito , Takuya Aoyagi , Tadashi Fujieda , Mutsuhiro Mori
IPC分类号： H01L23/34 , H01L23/373 , B23K35/26 , H01L23/00 , C04B37/02 , C22C13/00 , H01L21/52 , H01L33/62 , H01L33/64 , C22C5/06
CPC分类号： H01L23/3736 , B23K35/26 , C04B37/025 , C04B37/026 , C04B2235/96 , C04B2235/9607 , C04B2237/10 , C04B2237/12 , C04B2237/125 , C04B2237/366 , C04B2237/368 , C04B2237/408 , C22C5/06 , C22C13/00 , H01L21/52 , H01L23/3731 , H01L23/3735 , H01L24/32 , H01L24/34 , H01L24/36 , H01L24/40 , H01L33/62 , H01L33/641 , H01L2224/32245 , H01L2224/40095 , H01L2224/40225 , H01L2224/48091 , H01L2224/48227 , H01L2224/48228 , H01L2224/48464 , H01L2224/73221 , H01L2224/73265 , H01L2924/00014 , H01L2924/01047 , H01L2924/01082 , H01L2924/014 , H01L2924/1432 , H01L2924/15747 , H01L2924/15787 , H01L2924/181 , Y10T428/12014 , H01L2924/00 , H01L2924/00012 , H01L2224/37099
摘要： Bondability and heat conductivity of a bonded body in which some of metal, ceramic, or semiconductor are bonded to each other are improved. In the bonded body in which a first member and a second member each comprise one of metal, ceramic, or semiconductor are bonded to each other, the second member is bonded to the first member by way of an adhesive member disposed to the surface of the first member, and the adhesive member contains a V2O5-containing glass and metal particles. In a semiconductor module having a base metal, a ceramic substrate, a metal wiring, and a semiconductor chip, the ceramic substrate is bonded to the base metal by way of a first adhesive member disposed to the surface of the base metal, the metal wiring is bonded to the ceramic substrate by way of a second adhesive member disposed to the surface of the ceramic substrate, the semiconductor chip is bonded to the metal wiring by way of a third adhesive member disposed to the surface of the metal wiring, and the first adhesive member, the second adhesive member, and the third adhesive member each comprise a V2O5-containing glass and metal particles.
摘要翻译：其中一些金属，陶瓷或半导体彼此结合的接合体的结合性和导热性得到改善。在其中每个包括金属，陶瓷或半导体中的一个的第一构件和第二构件彼此结合的接合体中，第二构件通过设置在第二构件的表面上的粘合构件接合到第一构件第一构件，并且粘合构件含有含V2O5的玻璃和金属颗粒。在具有基底金属，陶瓷基板，金属布线和半导体芯片的半导体模块中，陶瓷基板通过设置在基板金属的表面上的第一粘合部件接合到基底金属，金属布线通过设置在陶瓷基板的表面上的第二粘合部件与陶瓷基板接合，半导体芯片通过设置在金属布线表面的第三粘合部件与金属布线接合，第一粘合剂构件，第二粘合构件和第三粘合构件各自包含含V 2 O 5的玻璃和金属颗粒。

103. 发明申请

US20150325925A1 EMBEDDED MILLIMETER-WAVE PHASED ARRAY MODULE 有权
标题翻译：嵌入式毫米波波形阵列模块
公开(公告)号：US20150325925A1
公开(公告)日：2015-11-12
申请号：US14132729
申请日：2013-12-18
申请人： Telesphor Teles Kamgaing , ADEL ELSHERBINI , VALLURI RAO
发明人： Telesphor Teles Kamgaing , ADEL ELSHERBINI , VALLURI RAO
IPC分类号： H01Q21/00 , H01L21/52 , H01L23/66 , H01L23/498 , H01Q1/38 , H01L21/48
CPC分类号： H01L23/66 , H01L21/4853 , H01L21/52 , H01L23/49816 , H01L23/49827 , H01L23/49838 , H01L24/19 , H01L24/20 , H01L2223/6622 , H01L2223/6677 , H01L2223/6683 , H01L2224/04105 , H01L2224/12105 , H01L2224/73267 , H01L2924/15192 , H01L2924/15311 , H01L2924/15313 , H01L2924/18162 , H01L2924/3025 , H01Q1/2283 , H01Q1/38 , H01Q21/0006 , H01Q21/0093 , H01Q23/00
摘要： Embodiments of an embedded mm-wave radio integrated circuit into a substrate of a phased array module are disclosed. In some embodiments, the phased array module includes a first set of substrate layers made of a first material. The mm-wave radio integrated circuit may be embedded in the first set of substrate layers. A second set of substrate layers may be coupled to the first set of substrate layers. The second set of substrate layers may be made of a second material that has a lower electrical loss than the first material. The second set of substrate layers may include a plurality of antenna elements coupled through vias to the mm-wave radio integrated circuit.
摘要翻译：公开了将嵌入式毫米波无线电集成电路放入相控阵列模块的衬底中的实施例。在一些实施例中，相控阵列模块包括由第一材料制成的第一组衬底层。毫米波无线电集成电路可以嵌入在第一组衬底层中。第二组衬底层可以耦合到第一组衬底层。第二组衬底层可以由具有比第一材料低的电损耗的第二材料制成。第二组衬底层可以包括通过通孔耦合到毫米波无线电集成电路的多个天线元件。

104. 发明授权

US09177945B2 Packaged semiconductor device having multilevel leadframes configured as modules 有权
标题翻译：具有被配置为模块的多级引线框的封装半导体器件
公开(公告)号：US09177945B2
公开(公告)日：2015-11-03
申请号：US14572988
申请日：2014-12-17
申请人： Texas Instruments Incorporated
发明人： Richard J. Saye
IPC分类号： H01L21/00 , H01L25/00 , H01L23/495 , H01L21/56 , H01L23/00 , H01L21/52 , H01L23/31
CPC分类号： H01L25/50 , H01L21/52 , H01L21/56 , H01L21/561 , H01L23/3107 , H01L23/495 , H01L23/49537 , H01L23/49551 , H01L23/49568 , H01L23/49575 , H01L24/38 , H01L24/97 , H01L2224/40245 , H01L2924/15747 , H01L2924/181 , H01L2924/00
摘要： Fabricating a packaged semiconductor device provides first planar leadframe with first leads and pads having attached electronic components. The first leadframe has a set of elongated leads bent at an angle away from the plane of the first leadframe. A second planar leadframe has second leads having attached electronic components. The bent leads of the first leadframe conductively connected to the second leadframe, forming a conductively linked 3-dimensional network between components and leads in two planes.
摘要翻译：制造封装的半导体器件提供具有附接的电子部件的第一引线和焊盘的第一平面引线框架。第一引线框架具有一组细长引线，该引线以与第一引线框架平面成一定角度弯曲。第二平面引线框架具有附接的电子部件的第二引线。第一引线框的弯曲引线导电地连接到第二引线框架，在两个平面中在部件和引线之间形成导电连接的3维网络。

105. 发明申请

US20150294920A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20150294920A1
公开(公告)日：2015-10-15
申请号：US14437507
申请日：2012-11-20
申请人： Rintaro Asai , Atsushi Tanida
发明人： Rintaro Asai , Atsushi Tanida
IPC分类号： H01L23/10 , H01L23/00 , H01L23/495
CPC分类号： H01L23/10 , H01L21/52 , H01L23/051 , H01L23/3107 , H01L23/4334 , H01L23/48 , H01L23/49513 , H01L23/49562 , H01L23/49582 , H01L24/29 , H01L24/32 , H01L24/33 , H01L24/48 , H01L24/83 , H01L2224/29101 , H01L2224/29339 , H01L2224/29355 , H01L2224/32245 , H01L2224/33181 , H01L2224/335 , H01L2224/48091 , H01L2224/48247 , H01L2224/73265 , H01L2224/8382 , H01L2224/83825 , H01L2924/00014 , H01L2924/0132 , H01L2924/13055 , H01L2924/13091 , H01L2924/181 , H01L2924/00 , H01L2224/45099 , H01L2924/0105 , H01L2924/01051 , H01L2924/01029 , H01L2924/00012
摘要： A semiconductor device includes a transistor, lead frames, a metal spacer, one surface of which is bonded to the transistor by a first bonding material and the other surface of which is bonded to the lead frame by a second bonding material, and a plastic mold. The plastic mold packages the transistor and the metal spacer. One surface of each of the lead frames is attached to the plastic mold. Strength of the second bonding material is lower than strength of the first bonding material. According to the above configuration, when stress is repeatedly applied to the semiconductor device, a crack occurs earlier in the second bonding material than in the first bonding material. The stress is buffered at the first bonding material.
摘要翻译：半导体器件包括晶体管，引线框架，金属间隔物，其一个表面通过第一接合材料接合到晶体管，并且其另一个表面通过第二接合材料结合到引线框架，以及塑料模具。塑料模具封装晶体管和金属间隔物。每个引线框架的一个表面附接到塑料模具。第二接合材料的强度低于第一接合材料的强度。根据上述结构，当对半导体器件重复施加应力时，与第一接合材料相比，在第二接合材料中发生较早的裂纹。应力在第一接合材料处被缓冲。

106. 发明申请

US20150294919A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：US20150294919A1
公开(公告)日：2015-10-15
申请号：US14432291
申请日：2013-09-12
申请人： Sumitomo Electric Industries, Ltd.
发明人： Hiroshi Notsu
IPC分类号： H01L23/10 , H01L21/54 , H01L21/56 , H01L21/52
CPC分类号： H01L23/10 , H01L21/52 , H01L21/54 , H01L21/56 , H01L23/04 , H01L23/13 , H01L23/16 , H01L23/24 , H01L23/36 , H01L23/3735 , H01L2224/32225 , H01L2224/45014 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48247 , H01L2224/48472 , H01L2224/73265 , H01L2224/85201 , H01L2224/85205 , H01L2924/00011 , H01L2924/00014 , H01L2924/10253 , H01L2924/10254 , H01L2924/10272 , H01L2924/1033 , H01L2924/1305 , H01L2924/13055 , H01L2924/13091 , H01L2924/00 , H01L2924/01015 , H01L2924/206
摘要： A semiconductor device which can improve its reliability and a method for manufacturing the same are provided. A semiconductor device (10) in accordance with one embodiment comprises a semiconductor element (12), a substrate (20), a case (40), and a sealant injection path (50). The semiconductor element (12) is mounted to the substrate (20). The case (40) contains the substrate (20) and allows a sealant to be injected therein for sealing the semiconductor element (12) to the inside. The sealant injection path (50) is formed in the case (40) and used for injecting the sealant into the case (40). In the sealant injection path (50), an injection port within the case (40) for the sealant is located on the substrate (20) side of an injection region (44) of the sealant within the case (40).
摘要翻译：提供了可以提高其可靠性的半导体器件及其制造方法。根据一个实施例的半导体器件（10）包括半导体元件（12），衬底（20），壳体（40）和密封剂注入路径（50）。半导体元件（12）安装在基板（20）上。壳体（40）包含基板（20），并且允许将密封剂注入其中以将半导体元件（12）密封到内部。密封剂注入路径（50）形成在壳体（40）中并用于将密封剂注入到壳体（40）中。在密封剂注入路径（50）中，用于密封剂的壳体（40）内的注入口位于壳体（40）内的密封剂的注入区域（44）的基板（20）侧。

107. 发明申请

US20150255403A1 METHODS RELATED TO FABRICATION OF SHIELDED RADIO-FREQUENCY MODULE 审中-公开
标题翻译：与屏蔽无线电频率模块的制造相关的方法
公开(公告)号：US20150255403A1
公开(公告)日：2015-09-10
申请号：US14720873
申请日：2015-05-25
申请人： SKYWORKS SOLUTIONS, INC.
发明人： Dinhphuoc V. HOANG , Thomas E. NOLL , Anil K. AGARWAL , Robert W. WARREN , Matthew S. READ , Anthony LOBIANCO
IPC分类号： H01L23/552 , H01L21/52 , H01L21/48 , H01L21/56
CPC分类号： H01L23/552 , H01L21/4853 , H01L21/52 , H01L21/56 , H01L23/3121 , H01L23/49811 , H01L24/48 , H01L24/97 , H01L2224/48091 , H01L2924/00014 , H01L2924/01005 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01051 , H01L2924/01078 , H01L2924/01079 , H01L2924/12042 , H01L2924/181 , H01L2924/19042 , H01L2924/19105 , H01L2924/19107 , H01L2924/3025 , Y10T29/49126 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： According to one exemplary embodiment, an overmolded package includes a component situated on a substrate. The overmolded package further includes an overmold situated over the component and the substrate. The overmolded package further includes a wirebond cage situated over the substrate and in the overmold, where the wirebond cage surrounds the component, and where the wirebond cage includes a number of wirebonds. The wirebond cage forms an EMI shield around the component. According to this exemplary embodiment, the overmolded package further includes a conductive layer situated on a top surface of the overmold and connected to the wirebond cage, where the conductive layer forms an EMI shield over the component.
摘要翻译：根据一个示例性实施例，包覆成型的包装包括位于基底上的部件。包覆成型的包装进一步包括位于组件和衬底之上的包覆成型。包覆成型的包装还包括位于衬底上方和覆盖模制件中的引线键合框架，其中引线键合框架围绕组件，并且其中引线键合框架包括多个引线键。引线键盘在组件周围形成EMI屏蔽。根据该示例性实施例，包覆成型的封装还包括位于包覆模制体的顶表面上并连接到引线键合框架的导电层，其中导电层在部件上形成EMI屏蔽。

108. 发明申请

US20150255402A1 PACKAGED RADIO-FREQUENCY MODULE HAVING WIREBOND SHIELDING 审中-公开
标题翻译：包装无线电频率模块具有电线屏蔽
公开(公告)号：US20150255402A1
公开(公告)日：2015-09-10
申请号：US14720872
申请日：2015-05-25
申请人： SKYWORKS SOLUTIONS, INC.
发明人： Dinhphuoc V. HOANG , Thomas E. NOLL , Anil K. AGARWAL , Robert W. WARREN , Matthew S. READ , Anthony LOBIANCO
IPC分类号： H01L23/552 , H01L23/498
CPC分类号： H01L23/552 , H01L21/4853 , H01L21/52 , H01L21/56 , H01L23/3121 , H01L23/49811 , H01L24/48 , H01L24/97 , H01L2224/48091 , H01L2924/00014 , H01L2924/01005 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01051 , H01L2924/01078 , H01L2924/01079 , H01L2924/12042 , H01L2924/181 , H01L2924/19042 , H01L2924/19105 , H01L2924/19107 , H01L2924/3025 , Y10T29/49126 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： According to one exemplary embodiment, an overmolded package includes a component situated on a substrate. The overmolded package further includes an overmold situated over the component and the substrate. The overmolded package further includes a wirebond cage situated over the substrate and in the overmold, where the wirebond cage surrounds the component, and where the wirebond cage includes a number of wirebonds. The wirebond cage forms an EMI shield around the component. According to this exemplary embodiment, the overmolded package further includes a conductive layer situated on a top surface of the overmold and connected to the wirebond cage, where the conductive layer forms an EMI shield over the component.
摘要翻译：根据一个示例性实施例，包覆成型的包装包括位于基底上的部件。包覆成型的包装进一步包括位于组件和衬底之上的包覆成型。包覆成型的包装还包括位于衬底上方和覆盖模制件中的引线键合框架，其中引线键合框架围绕组件，并且其中引线键合框架包括多个引线键。引线键盘在组件周围形成EMI屏蔽。根据该示例性实施例，包覆成型的封装还包括位于包覆模制体的顶表面上并连接到引线键合框架的导电层，其中导电层在部件上形成EMI屏蔽。

109. 发明申请

US20150249133A1 SEMICONDUCTOR ELEMENT, SEMICONDUCTOR ELEMENT MANUFACTURING METHOD, SEMICONDUCTOR MODULE, SEMICONDUCTOR MODULE MANUFACTURING METHOD, AND SEMICONDUCTOR PACKAGE 有权
标题翻译：半导体元件，半导体元件制造方法，半导体器件，半导体器件制造方法和半导体封装
公开(公告)号：US20150249133A1
公开(公告)日：2015-09-03
申请号：US14428289
申请日：2014-04-21
申请人： PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
发明人： Yasuyuki Yanase , Tsutomu Kiyosawa
IPC分类号： H01L29/16 , H01L29/66 , H01L21/04 , H01L23/00 , H01L21/78 , H01L21/306 , H01L23/495 , H01L21/52 , H01L29/872 , H01L29/06
CPC分类号： H01L29/1608 , H01L21/0475 , H01L21/0485 , H01L21/3043 , H01L21/30604 , H01L21/3065 , H01L21/48 , H01L21/52 , H01L21/6836 , H01L21/78 , H01L23/3735 , H01L23/49513 , H01L23/49562 , H01L24/32 , H01L24/48 , H01L24/73 , H01L24/83 , H01L24/85 , H01L24/91 , H01L29/0657 , H01L29/45 , H01L29/6606 , H01L29/66068 , H01L29/861 , H01L29/872 , H01L2221/68327 , H01L2224/04026 , H01L2224/05017 , H01L2224/05018 , H01L2224/0508 , H01L2224/05155 , H01L2224/05166 , H01L2224/05557 , H01L2224/05558 , H01L2224/05564 , H01L2224/0558 , H01L2224/05624 , H01L2224/05639 , H01L2224/26145 , H01L2224/291 , H01L2224/2929 , H01L2224/293 , H01L2224/32013 , H01L2224/32058 , H01L2224/32227 , H01L2224/32245 , H01L2224/48091 , H01L2224/48247 , H01L2224/73265 , H01L2224/83192 , H01L2224/83365 , H01L2224/85399 , H01L2224/92247 , H01L2224/94 , H01L2924/00014 , H01L2924/10155 , H01L2924/10158 , H01L2924/12032 , H01L2924/13063 , H01L2924/13091 , H01L2924/351 , H01L2924/35121 , H01L2924/00 , H01L2924/00012 , H01L2224/03 , H01L2924/014 , H01L2224/45015 , H01L2924/207 , H01L2224/45099
摘要： An ohmic electrode layer is disposed on a second main surface of a silicon carbide substrate, and a metal electrode layer is disposed on the ohmic electrode layer. A notch is formed along at least one pair of sides, facing each other, of a periphery of the second main surface of the silicon carbide substrate. The cross-section of the notch orthogonal to a side of the second main surface has a corner. In the cross-section, a thickness of the silicon carbide substrate at an edge thereof under which the notch is formed is smaller than a thickness of the silicon carbide substrate in a region under which the notch is not formed, and larger than a thickness of the silicon carbide substrate in a region under which a bottom of the corner is formed.
摘要翻译：欧姆电极层设置在碳化硅衬底的第二主表面上，金属电极层设置在欧姆电极层上。沿着碳化硅衬底的第二主表面的周边的彼此面对的至少一对侧形成凹口。与第二主表面的正交的切口的横截面具有拐角。在横截面中，形成凹口的边缘处的碳化硅衬底的厚度小于在未形成缺口的区域中的碳化硅衬底的厚度，并且大于厚度在形成角部的底部的区域内的碳化硅衬底。

110. 发明授权

US09105597B2 Electric power converter and method of manufacturing the same 有权
标题翻译：电力转换器及其制造方法
公开(公告)号：US09105597B2
公开(公告)日：2015-08-11
申请号：US14367868
申请日：2012-01-23
申请人： Ryouji Hironaka , Hitoshi Imura
发明人： Ryouji Hironaka , Hitoshi Imura
IPC分类号： H01L23/367 , H01L21/52 , H01L23/40
CPC分类号： H01L23/367 , H01L21/52 , H01L23/3675 , H01L23/40 , H01L2924/0002 , H02M7/003 , H01L2924/00
摘要： An electric power converter that can easily be assembled is provided. An electric power converter includes a semiconductor stacking unit, a frame and a spring unit. The semiconductor stacking unit has a configuration in which the semiconductor modules and coolers are stacked. The spring unit is inserted between one end of the semiconductor stacking unit in a stacking direction, and a support provided on the frame, and fixes the semiconductor stacking unit while applying pressure thereto. The spring unit is provided with a first plate, a second plate, and a coil spring sandwiched between the first and second plates. A recess is provided in the first plate so as to have a gap between the first plate and the end surface of the semiconductor stacking unit. A penetrating passage through which the entire spring unit passes along a bottom of the recess is provided in the spring unit.
摘要翻译：提供了一种易于组装的电力转换器。电力转换器包括半导体堆叠单元，框架和弹簧单元。半导体堆叠单元具有半导体模块和冷却器堆叠的结构。弹簧单元沿层叠方向插入在半导体积层单元的一端和设置在框架上的支撑件之间，并且在施加压力的同时固定半导体堆叠单元。弹簧单元设置有夹在第一和第二板之间的第一板，第二板和螺旋弹簧。在第一板中设置有在第一板和半导体堆叠单元的端面之间具有间隙的凹部。整个弹簧单元沿着凹部的底部通过的穿透通道设置在弹簧单元中。

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