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101. 发明申请

US20100323501A1 PLASMA TREATMENT APPARATUS, METHOD FOR FORMING FILM, AND METHOD FOR MANUFACTURING THIN FILM TRANSISTOR 审中-公开
标题翻译：等离子体处理装置，形成膜的方法和制造薄膜晶体管的方法
公开(公告)号：US20100323501A1
公开(公告)日：2010-12-23
申请号：US12817224
申请日：2010-06-17
申请人： Shunpei YAMAZAKI , Takayuki INOUE , Erumu KIKUCHI , Hiroto INOUE
发明人： Shunpei YAMAZAKI , Takayuki INOUE , Erumu KIKUCHI , Hiroto INOUE
IPC分类号： H01L21/20 , C23C16/453 , H01L21/28
CPC分类号： H01J37/32449 , H01J37/3244 , H01J37/32541 , H01L29/66765
摘要： A structure of the plasma treatment apparatus is employed in which an upper electrode has projected portions provided with first introduction holes and recessed portions provided with second introduction holes, the first introduction hole of the upper electrode is connected to a first cylinder filled with a gas which is not likely to be dissociated, the second introduction hole is connected to a second cylinder filled with a gas which is likely to be dissociated, the gas which is not likely to be dissociated is introduced into a reaction chamber from an introduction port of the first introduction hole provided on a surface of the projected portion of the upper electrode, and the gas which is likely to be dissociated is introduced into the reaction chamber from an introduction port of the second introduction hole provided on a surface of the recessed portion.
摘要翻译：采用等离子体处理装置的结构，其中上电极具有设置有第一导入孔的突出部分和设置有第二导入孔的凹部，上电极的第一导入孔与填充有气体的第一圆筒连接，不可能解离，第二引入孔连接到填充有可能解离的气体的第二气缸，不可能解离的气体从第一引入孔的引入口引入反应室设置在上部电极的突出部分的表面上的引入孔和可能被解离的气体从设置在凹部的表面上的第二引入孔的引入口引入到反应室中。

102. 发明申请

US20100317161A1 METHOD FOR MANUFACTURING SEMICONDUCTOR WAFER 有权
标题翻译：制造半导体波形的方法
公开(公告)号：US20100317161A1
公开(公告)日：2010-12-16
申请号：US12862197
申请日：2010-08-24
申请人： Shunpei YAMAZAKI , Akiharu MIYANAGA , Ko INADA , Yuji IWAKI
发明人： Shunpei YAMAZAKI , Akiharu MIYANAGA , Ko INADA , Yuji IWAKI
IPC分类号： H01L21/336 , H01L21/762
CPC分类号： H01L21/76254 , H01L21/2236 , H01L21/26506
摘要： To provide a method for manufacturing an SOI substrate having a single crystal semiconductor layer having a small and uniform thickness over an insulating film. Further, time of adding hydrogen ions is reduced and time of manufacture per SOI substrate is reduced. A bond layer is formed over a surface of a first semiconductor wafer and a separation layer is formed below the bond layer by irradiating the first semiconductor wafer with H3+ ions by an ion doping apparatus. H3+ ions accelerated by high voltage are separated to be three H+ ions at a semiconductor wafer surface, and the H+ ions cannot enter deeply. Therefore, H+ ions are added into a shallower region in the semiconductor wafer at a higher concentration than the case of using a conventional ion implantation method.
摘要翻译：提供一种制造具有在绝缘膜上具有小而均匀厚度的单晶半导体层的SOI衬底的方法。此外，加入氢离子的时间减少，并且每个SOI衬底的制造时间减少。在第一半导体晶片的表面上形成接合层，并且通过用离子掺杂装置用H3 +离子照射第一半导体晶片，在接合层的下方形成分离层。通过高压加速的H3 +离子在半导体晶片表面被分离为三个H +离子，并且H +离子不能深入。因此，与使用常规的离子注入方法的情况相比，将H +离子加入到半导体晶片的较浅的区域中。

103. 发明申请

US20100301328A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20100301328A1
公开(公告)日：2010-12-02
申请号：US12785664
申请日：2010-05-24
申请人： Shunpei YAMAZAKI , Kengo AKIMOTO
发明人： Shunpei YAMAZAKI , Kengo AKIMOTO
IPC分类号： H01L29/786 , H01L29/02 , H01L21/04 , H01L21/34
CPC分类号： H01L29/7869 , H01L27/1225 , H01L27/1248 , H01L29/24 , H01L29/247 , H01L29/4908 , H01L29/513 , H01L29/78609 , H01L29/78693 , H01L29/78696
摘要： Homogeneity and stability of electric characteristics of a thin film transistor included in a circuit are critical for the performance of a display device including said circuit. An object of the invention is to provide an oxide semiconductor film with low hydrogen content and which is used in an inverted staggered thin film transistor having well defined electric characteristics. In order to achieve the object, a gate insulating film, an oxide semiconductor layer, and a channel protective film are successively formed with a sputtering method without being exposed to air. The oxide semiconductor layer is formed so as to limit hydrogen contamination, in an atmosphere including a proportion of oxygen. In addition, layers provided over and under a channel formation region of the oxide semiconductor layer are formed using compounds of silicon, oxygen and/or nitrogen.
摘要翻译：包括在电路中的薄膜晶体管的电特性的均匀性和稳定性对于包括所述电路的显示装置的性能至关重要。本发明的目的是提供一种具有低氢含量的氧化物半导体膜，并且其用于具有良好限定的电特性的反交错薄膜晶体管中。为了达到上述目的，栅极绝缘膜，氧化物半导体层和沟道保护膜依次用溅射法形成，而不暴露在空气中。氧化物半导体层形成为在包含一定比例氧气的气氛中限制氢污染。此外，使用硅，氧和/或氮的化合物形成在氧化物半导体层的沟道形成区之上和之下设置的层。

104. 发明申请

US20100248402A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF, DELAMINATION METHOD, AND TRANSFERRING METHOD 有权
标题翻译：半导体器件及其制造方法，分层方法和传输方法
公开(公告)号：US20100248402A1
公开(公告)日：2010-09-30
申请号：US12766318
申请日：2010-04-23
申请人： Junya MARUYAMA , Toru TAKAYAMA , Yumiko OHNO , Shunpei YAMAZAKI
发明人： Junya MARUYAMA , Toru TAKAYAMA , Yumiko OHNO , Shunpei YAMAZAKI
IPC分类号： H01L21/30 , H01L31/18 , H01L33/00
CPC分类号： H01L27/1218 , H01L21/76251 , H01L27/1214 , H01L27/1248 , H01L27/1266 , H01L29/78603 , H01L33/24 , H01L33/44 , H01L33/56 , H01L33/62 , H01L2221/68368
摘要： A technique for forming a TFT element over a substrate having flexibility typified by a flexible plastic film is tested. When a structure in which a light-resistant layer or a reflective layer is employed to prevent the damage to the delamination layer, it is difficult to fabricate a transmissive liquid crystal display device or a light emitting device which emits light downward.A substrate and a delamination film are separated by a physical means, or a mechanical means in a state where a metal film formed over a substrate, and a delamination layer comprising an oxide film including the metal and a film comprising silicon, which is formed over the metal film, are provided. Specifically, a TFT obtained by forming an oxide layer including the metal over a metal film; crystallizing the oxide layer by heat treatment; and performing delamination in a layer of the oxide layer or at both of the interface of the oxide layer is formed.
摘要翻译：测试了以柔性塑料膜为代表的柔性基板上形成TFT元件的技术。当采用耐光层或反射层来防止对分层的损害的结构时，难以制造向下发光的透射型液晶显示装置或发光装置。在基板上形成金属膜的状态下，通过物理手段或机械装置分离基板和分层膜，以及包含包含金属的氧化物膜和包含硅的膜的分层，其形成在提供金属膜。具体地说，通过在金属膜上形成包含金属的氧化物层而获得的TFT; 通过热处理使氧化层结晶; 并且在氧化物层的一层或氧化物层的界面上形成分层。

105. 发明申请

US20100244029A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20100244029A1
公开(公告)日：2010-09-30
申请号：US12730288
申请日：2010-03-24
申请人： Shunpei YAMAZAKI , Takayuki ABE , Hideaki SHISHIDO
发明人： Shunpei YAMAZAKI , Takayuki ABE , Hideaki SHISHIDO
IPC分类号： H01L29/786
CPC分类号： H01L29/7869 , H01L27/1225 , H01L27/3248 , H01L29/42376 , H01L29/42384 , H01L29/78606 , H01L29/78645 , H01L29/78648
摘要： The threshold voltage is shifted in a negative or positive direction in some cases by an unspecified factor in a manufacturing process of the thin film transistor. If the amount of shift from 0 V is large, driving voltage is increased, which results in an increase in power consumption of a semiconductor device. Thus, a resin layer having good flatness is formed as a first protective insulating film covering the oxide semiconductor layer, and then a second protective insulating film is formed by a sputtering method or a plasma CVD method under a low power condition over the resin layer. Further, in order to adjust the threshold voltage to a desired value, gate electrodes are provided over and below an oxide semiconductor layer.
摘要翻译：在薄膜晶体管的制造过程中，阈值电压在负方向或正方向上偏移一些未指定因子。如果从0V的偏移量大，则驱动电压增加，这导致半导体器件的功耗的增加。因此，形成具有良好平坦度的树脂层作为覆盖氧化物半导体层的第一保护绝缘膜，然后通过溅射法或等离子体CVD法在低功率条件下在树脂层上形成第二保护绝缘膜。此外，为了将阈值电压调整为期望值，在氧化物半导体层的上方和下方设置栅电极。

106. 发明申请

US20100237418A1 SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：US20100237418A1
公开(公告)日：2010-09-23
申请号：US12793237
申请日：2010-06-03
申请人： Shunpei YAMAZAKI , Atsuo ISOBE , Tetsuji YAMAGUCHI , Hiromichi GODO
发明人： Shunpei YAMAZAKI , Atsuo ISOBE , Tetsuji YAMAGUCHI , Hiromichi GODO
IPC分类号： H01L29/786 , H01L21/336
CPC分类号： H01L27/127 , H01L27/1214 , H01L27/1285 , H01L27/1288 , H01L27/13 , H01L29/458 , H01L29/4908 , H01L29/78621 , H01L29/78624
摘要： It is an object of the present invention to manufacture a thin film transistor having a required property without complicating steps and devices. It is another object of the present invention to provide a technique for manufacturing a semiconductor device having high reliability and better electrical characteristics with a higher yield at lower cost. In the present invention, a lightly doped impurity region is formed in a source region side or a drain region side of a semiconductor layer covered with a gate electrode layer in a thin film transistor. The semiconductor layer is doped diagonally to the surface thereof using the gate electrode layer as a mask to form the lightly doped impurity region. Therefore, the properties of the thin film transistor can be minutely controlled.
摘要翻译：本发明的目的是制造具有所需性能的薄膜晶体管，而不会使步骤和装置复杂化。本发明的另一个目的是提供一种以更低的成本制造具有高可靠性和更好的电气特性并以较高产量获得的半导体器件的技术。在本发明中，在薄膜晶体管中由栅极电极层覆盖的半导体层的源区域侧或漏极区侧形成有轻掺杂杂质区。使用栅极电极层作为掩模将半导体层以其对面的方式对角地掺杂以形成轻掺杂杂质区域。因此，可以精细地控制薄膜晶体管的性质。

107. 发明申请

US20100219410A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20100219410A1
公开(公告)日：2010-09-02
申请号：US12706737
申请日：2010-02-17
申请人： Hiromichi GODO , Kengo AKIMOTO , Shunpei YAMAZAKI
发明人： Hiromichi GODO , Kengo AKIMOTO , Shunpei YAMAZAKI
IPC分类号： H01L29/786 , H01L29/22 , H01L21/44 , H01L21/34
CPC分类号： H01L29/78693 , H01L21/02554 , H01L21/02565 , H01L21/02573 , H01L21/02631 , H01L29/24 , H01L29/66742 , H01L29/78606 , H01L29/7869 , H01L29/78696
摘要： An object is to reduce to reduce variation in threshold voltage to stabilize electric characteristics of thin film transistors each using an oxide semiconductor layer. An object is to reduce an off current. The thin film transistor using an oxide semiconductor layer is formed by stacking an oxide semiconductor layer containing insulating oxide over the oxide semiconductor layer so that the oxide semiconductor layer and source and drain electrode layers are in contact with each other with the oxide semiconductor layer containing insulating oxide interposed therebetween; whereby, variation in threshold voltage of the thin film transistors can be reduced and thus the electric characteristics can be stabilized. Further, an off current can be reduced.
摘要翻译：目的是为了减小阈值电压的变化，以稳定每个使用氧化物半导体层的薄膜晶体管的电特性。目的是减少关断电流。使用氧化物半导体层的薄膜晶体管通过在氧化物半导体层上层叠含有绝缘氧化物的氧化物半导体层而形成，使得氧化物半导体层和源极和漏极电极层彼此接触，氧化物半导体层包含绝缘体介于其间的氧化物; 从而可以减小薄膜晶体管的阈值电压的变化，从而能够稳定电特性。此外，可以减少截止电流。

108. 发明申请

US20100213470A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20100213470A1
公开(公告)日：2010-08-26
申请号：US12700756
申请日：2010-02-05
申请人： Shunpei YAMAZAKI , Yasuyuki ARAI
发明人： Shunpei YAMAZAKI , Yasuyuki ARAI
IPC分类号： H01L29/24 , H01L21/336
CPC分类号： H01L29/66068 , H01L21/76254 , H01L29/0696 , H01L29/0882 , H01L29/1608 , H01L29/165 , H01L29/7395 , H01L29/7802 , H01L29/7809 , H01L29/7824
摘要： At least part of a semiconductor layer or a semiconductor substrate includes a semiconductor region having a large energy gap. The semiconductor region having a large energy gap is preferably formed from silicon carbide and is provided in a position at least overlapping with a gate electrode provided with an insulating layer between the semiconductor region and the gate electrode. By making a structure in which the semiconductor region is included in a channel formation region, a dielectric breakdown voltage is improved.
摘要翻译：半导体层或半导体衬底的至少一部分包括具有大能隙的半导体区域。具有大能隙的半导体区域优选由碳化硅形成，并且设置在与半导体区域和栅电极之间设置有绝缘层的栅电极至少重叠的位置。通过形成半导体区域包括在沟道形成区域中的结构，提高了介电击穿电压。

109. 发明申请

US20100187317A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20100187317A1
公开(公告)日：2010-07-29
申请号：US12753155
申请日：2010-04-02
申请人： Shunpei YAMAZAKI , Koji DAIRIKI
发明人： Shunpei YAMAZAKI , Koji DAIRIKI
IPC分类号： G06K19/07 , H01L23/538
CPC分类号： H01L21/02683 , G11C17/12 , H01L21/02691 , H01L21/2026 , H01L27/12 , H01L27/1266 , H01L27/1285 , H01L27/13 , H01L29/04
摘要： The present invention is to provide a semiconductor device that achieves high mechanical strength without reducing the circuit scale and that can prevent the data from being forged and altered illegally while suppressing the cost. The present invention discloses a semiconductor device typified by an ID chip that is formed from a semiconductor thin film including a first region with high crystallinity and a second region with the crystallinity inferior to the first region. Specifically, a TFT (thin film transistor) of a circuit requiring high-speed operation is formed by using the first region and a memory element for an identifying ROM is formed by using the second region.
摘要翻译：本发明是提供一种在不降低电路规模的情况下实现高机械强度的半导体器件，并且能够在抑制成本的同时防止数据伪造和变更。本发明公开了一种由ID芯片代表的半导体器件，该芯片由包括具有高结晶度的第一区域的半导体薄膜和具有低于第一区域的结晶度的第二区域形成。具体地，通过使用第一区域形成需要高速操作的电路的TFT（薄膜晶体管），并且通过使用第二区域形成用于识别ROM的存储元件。

110. 发明申请

US20100171895A1 SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20100171895A1
公开(公告)日：2010-07-08
申请号：US12728487
申请日：2010-03-22
申请人： Shunpei YAMAZAKI , Jun KOYAMA , Setsuo NAKAJIMA
发明人： Shunpei YAMAZAKI , Jun KOYAMA , Setsuo NAKAJIMA
IPC分类号： G02F1/1343
CPC分类号： H01L27/1288 , G02F2001/136231 , H01L27/1214
摘要： A display device includes a main body, a support stand, and a display portion. The display portion includes a pixel having a TFT and a capacitor. The capacitor includes a capacitor electrode on an insulating surface, an insulating film on the capacitor electrode, and a pixel electrode of the TFT on the insulating film.
摘要翻译：显示装置包括主体，支撑架和显示部。显示部分包括具有TFT和电容器的像素。电容器包括绝缘表面上的电容器电极，电容器电极上的绝缘膜和绝缘膜上的TFT的像素电极。

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