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    • 107. 发明授权
    • Semiconductor device and method for manufacturing the same
    • 半导体装置及其制造方法
    • US08232650B2
    • 2012-07-31
    • US13180202
    • 2011-07-11
    • Hiroyuki ChibaharaAtsushi IshiiNaoki IzumiMasahiro Matsumoto
    • Hiroyuki ChibaharaAtsushi IshiiNaoki IzumiMasahiro Matsumoto
    • H01L23/48
    • H01L23/02H01L23/522H01L23/585H01L2924/0002H01L2924/00
    • A semiconductor device wherein destruction of a sealing ring caused by cracking of an interlayer dielectric film is difficult to occur, as well as a method for manufacturing the semiconductor device, are provided. A first laminate comprises first interlayer dielectric films having a first mechanical strength. A second laminate comprises second interlayer dielectric films having a mechanical strength higher than the first mechanical strength. A first region includes first metallic layers and vias provided within the first laminate. A second region includes second metallic layers and vias provided within the second laminate. When seen in plan, the second region overlaps at least a part of the first region, is not coupled with the first region by vias, and sandwiches the second interlayer dielectric film between it and the first region.
    • 提供了难以发生由层间电介质膜的破裂引起的密封环破坏的半导体装置,以及半导体装置的制造方法。 第一层压板包括具有第一机械强度的第一层间绝缘膜。 第二层压体包括具有高于第一机械强度的机械强度的第二层间介电膜。 第一区域包括设置在第一层压体内的第一金属层和通孔。 第二区域包括设置在第二层压体内的第二金属层和通孔。 当在平面图中看到时,第二区域与第一区域的至少一部分重叠,不通过通孔与第一区域耦合,并且在其与第一区域之间夹住第二层间电介质膜。
    • 108. 发明授权
    • Semiconductor device and manufacturing method of semiconductor device
    • 半导体器件及半导体器件的制造方法
    • US08097948B2
    • 2012-01-17
    • US12880520
    • 2010-09-13
    • Takeshi FurusawaDaisuke KodamaMasahiro MatsumotoHiroshi Miyazaki
    • Takeshi FurusawaDaisuke KodamaMasahiro MatsumotoHiroshi Miyazaki
    • H01L23/48H01L21/44
    • H01L21/76843H01L21/76805H01L21/76844H01L21/76877H01L21/76886H01L23/5226H01L23/53238H01L23/53295H01L2924/0002H01L2924/00
    • To provide a semiconductor device having a structure in which a barrier metal film containing nitrogen is formed in a connection surface between a copper alloy wiring and a via, in which the electric resistance between the copper alloy wiring and the via can be prevented from rising, and the electric resistance can be prevented from varying. A semiconductor device according to the present invention comprises a first copper alloy wiring, a via and a first barrier metal film. The first copper alloy wiring is formed in an interlayer insulation film and contains a predetermined additive element in a main component Cu. The via is formed in an interlayer insulation film and electrically connected to the upper surface of the first copper alloy wiring. The first barrier metal film is formed so as to be in contact with the first copper alloy wiring in the connection part between the first copper alloy wiring and the via and contains nitrogen. The predetermined additive element reacts with nitrogen to form a high-resistance part. In addition, the concentration of the predetermined additive element is not more than 0.04 wt %.
    • 为了提供一种半导体器件,其具有在铜合金布线和通孔之间的连接面上形成含有氮的阻挡金属膜的结构,其中可以防止铜合金布线和通孔之间的电阻上升, 并且可以防止电阻变化。 根据本发明的半导体器件包括第一铜合金布线,通孔和第一阻挡金属膜。 第一铜合金布线形成在层间绝缘膜中,并且在主要成分Cu中含有预定的添加元素。 通孔形成在层间绝缘膜中并与第一铜合金布线的上表面电连接。 第一阻挡金属膜形成为与第一铜合金布线和通孔之间的连接部分中的第一铜合金布线接触并且包含氮。 预定的添加元素与氮反应形成高电阻部分。 此外,预定添加元素的浓度不大于0.04重量%。