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101. 发明申请

US20120307876A1 BASEBAND / RFIC INTERFACE FOR HIGH THROUGHPUT MIMO COMMUNICATIONS 有权
标题翻译：用于高速通信MIMO通信的基带/ RFIC接口
公开(公告)号：US20120307876A1
公开(公告)日：2012-12-06
申请号：US13589267
申请日：2012-08-20
申请人： Jason A. Trachewsky , Arya Reza Behzad
发明人： Jason A. Trachewsky , Arya Reza Behzad
IPC分类号： H04B1/38
CPC分类号： H04B1/0003
摘要： Analog signal paths are utilized between a baseband processor and a radio front end to support high throughput communications for a multiple in multiple out radio transceiver that support communications over two or more antennas. Specifically, analog differential I and Q path communication signals are exchanged between a radio front end core and a baseband processor to maximize throughput capacity for high data rate signals. Along the same lines, the impedances of traces and the interface are matched to reduce I/Q imbalance.
摘要翻译：模拟信号路径在基带处理器和无线电前端之间被利用，以支持用于支持两个或更多个天线上的通信的多输出无线电收发器中的多个通信的高吞吐量通信。具体地说，在无线电前端核心和基带处理器之间交换模拟差分I和Q路径通信信号以最大化高数据速率信号的吞吐能力。沿着相同的线路，跟踪和接口的阻抗匹配，以减少I / Q不平衡。

102. 发明申请

US20120276858A1 MULTIPLE FREQUENCY BAND MULTIPLE STANDARD TRANSCEIVER 有权
标题翻译：多频段多标准收发器
公开(公告)号：US20120276858A1
公开(公告)日：2012-11-01
申请号：US13537283
申请日：2012-06-29
申请人： John Walley , Jeyhan Karaoguz , Brima B. Ibrahim , Arya Reza Behzad , Vinko Erceg , David Rosmann
发明人： John Walley , Jeyhan Karaoguz , Brima B. Ibrahim , Arya Reza Behzad , Vinko Erceg , David Rosmann
IPC分类号： H04B1/06 , H04B1/38 , H04B7/00
CPC分类号： H04B1/1638 , H04B1/005
摘要： A transceiver includes a receiver section and a transmitter section. The receiver section converts an inbound Multiple Frequency Bands Multiple Standards (MFBMS) signal into a down converted signal, wherein the inbound MFBMS signal includes a desired signal component and an undesired signal component. In addition, the receiver section determines spectral positioning of the undesired signal component with respect to the desired signal component and adjusts at least one of the MFBMS signal and the down converted signal based on the spectral positioning to substantially reduce adverse affects of the undesired signal component on the desired signal component to produce an adjusted signal. The transmitter section converts an outbound symbol stream into an outbound MFBMS signal.
摘要翻译：收发机包括接收机部分和发射机部分。接收机部分将入站多频带多标准（MFBMS）信号转换为下变频信号，其中入站MFBMS信号包括期望的信号分量和不期望的信号分量。此外，接收机部分确定相对于期望信号分量的不期望信号分量的频谱定位，并且基于频谱定位来调整MFBMS信号和下变频信号中的至少一个，以基本上减少不期望信号分量的不利影响在所需的信号分量上产生经调整的信号。发送器部分将出站符号流转换为出站MFBMS信号。

103. 发明授权

US08266468B2 Integrated circuit with interpolation to avoid harmonic interference 有权
标题翻译：具有插补的集成电路，避免谐波干扰
公开(公告)号：US08266468B2
公开(公告)日：2012-09-11
申请号：US12899256
申请日：2010-10-06
申请人： Arya Reza Behzad , Mark Gonikberg , Ahmadreza (Reza) Rofougaran
发明人： Arya Reza Behzad , Mark Gonikberg , Ahmadreza (Reza) Rofougaran
IPC分类号： G06F1/00 , G06F1/04 , G06F3/033 , H03L7/02 , H03K3/03 , H03K19/00 , H03K5/01 , H03K9/00 , H04L7/00
CPC分类号： H04B15/02 , H04B15/06 , H04B2215/064 , H04B2215/068 , H04L27/0014 , Y02D70/122 , Y02D70/124
摘要： An integrated circuit (IC) includes a clock circuit, a processing module, and processing circuitry. The clock circuit is coupled to produce a digital clock signal. The processing module is coupled to determine whether a harmonic component of the digital clock signal having a nominal digital clock rate is within the frequency passband and to provide an indication to the clock circuit to adjust its rate from the nominal digital clock rate to an adjusted digital clock rate when the harmonic component of the digital clock signal is within the frequency passband. The processing circuitry is coupled to process, at the adjusted digital clock rate, the data to produce processed data having a rate corresponding to the nominal digital clock rate and to interpolate, at an interpolation rate, the processed data to produce interpolated processed data having a rate corresponding to the interpolation rate.
摘要翻译：集成电路（IC）包括时钟电路，处理模块和处理电路。时钟电路被耦合以产生数字时钟信号。处理模块被耦合以确定具有标称数字时钟速率的数字时钟信号的谐波分量是否在频带内，并且向时钟电路提供指示以将其速率从标称数字时钟速率调整到调整数字数字时钟信号的谐波分量在频带内的时钟频率。处理电路被耦合以以调整的数字时钟速率处理数据以产生具有对应于标称数字时钟速率的速率的处理数据，并且以插值速率内插处理后的数据，以产生经内插处理的数据，该数据具有速率对应于插补率。

104. 发明申请

US20120214543A1 MULTIPLE FREQUENCY BAND INFORMATION SIGNAL FREQUENCY BAND CONVERSION 有权
标题翻译：多频段信号信号频带转换
公开(公告)号：US20120214543A1
公开(公告)日：2012-08-23
申请号：US13463995
申请日：2012-05-04
申请人： Arya Reza Behzad , Jeyhan Karaoguz , John Walley , David Rosmann , Brima B. Ibrahim , Vinko Erceg
发明人： Arya Reza Behzad , Jeyhan Karaoguz , John Walley , David Rosmann , Brima B. Ibrahim , Vinko Erceg
IPC分类号： H04W88/06
CPC分类号： H04W88/06 , H04B1/001 , H04B1/0082 , H04B1/18
摘要： A wireless device includes processing circuitry and a Radio Frequency (RF) receiver section. The processing circuitry determines a set of information signals for receipt, the set of information signals carried by a RF Multiple Frequency Bands Multiple Standards (MFBMS) signal having a plurality of information signal frequency bands. The processing circuitry determines a shift frequency based upon the determination. the RF receiver section receives the RF MFBMS signal and down-converts the RF MFBMS signal by the shift frequency to produce a baseband/low Intermediate Frequency (BB/IF) MFBMS signal. The processing circuitry then extracts data from the set of information signals of the BB/IF MFBMS signal.
摘要翻译：无线设备包括处理电路和射频（RF）接收器部分。处理电路确定一组用于接收的信息信号，由具有多个信息信号频带的RF多频带多标准（MFBMS）信号携带的一组信息信号。处理电路基于该确定来确定移位频率。 RF接收器部分接收RF MFBMS信号并且将RF MFBMS信号下变频移位频率以产生基带/低中频（BB / IF）MFBMS信号。处理电路然后从BB / IF MFBMS信号的信息信号集中提取数据。

105. 发明授权

US08204537B2 Multiple frequency band information signal frequency band conversion 有权
标题翻译：多频段信息信号频带转换
公开(公告)号：US08204537B2
公开(公告)日：2012-06-19
申请号：US12506752
申请日：2009-07-21
申请人： Arya Reza Behzad , Jeyhan Karaoguz , John Walley , David Rosmann , Brima B. Ibrahim , Vinko Erceg
发明人： Arya Reza Behzad , Jeyhan Karaoguz , John Walley , David Rosmann , Brima B. Ibrahim , Vinko Erceg
IPC分类号： H04M1/00 , H04B17/02
CPC分类号： H04W88/06 , H04B1/001 , H04B1/0082 , H04B1/18
摘要： A wireless device includes processing circuitry and a Radio Frequency (RF) receiver section. The processing circuitry determines a set of information signals for receipt, the set of information signals carried by a RF Multiple Frequency Bands Multiple Standards (MFBMS) signal having a plurality of information signal frequency bands. The processing circuitry determines a shift frequency based upon the determination. the RF receiver section receives the RF MFBMS signal and down-converts the RF MFBMS signal by the shift frequency to produce a baseband/low Intermediate Frequency (BB/IF) MFBMS signal. The processing circuitry then extracts data from the set of information signals of the BB/IF MFBMS signal.
摘要翻译：无线设备包括处理电路和射频（RF）接收器部分。处理电路确定一组用于接收的信息信号，由具有多个信息信号频带的RF多频带多标准（MFBMS）信号携带的一组信息信号。处理电路基于该确定来确定移位频率。 RF接收器部分接收RF MFBMS信号并且将RF MFBMS信号下变频移位频率以产生基带/低中频（BB / IF）MFBMS信号。处理电路然后从BB / IF MFBMS信号的信息信号集中提取数据。

106. 发明授权

US08107442B2 Master/slave oscillation production and distribution in a multiple RF transceiver system supporting MIMO operations 有权
标题翻译：支持MIMO操作的多RF收发器系统中的主/从振荡生产和分配
公开(公告)号：US08107442B2
公开(公告)日：2012-01-31
申请号：US11168733
申请日：2005-06-28
申请人： Arya Reza Behzad , Jason A. Trachewsky , R. Tushar Moorti
发明人： Arya Reza Behzad , Jason A. Trachewsky , R. Tushar Moorti
IPC分类号： H04B7/216
CPC分类号： H04B1/40
摘要： A multiple input multiple output (MIMO) RF transceiver system includes a plurality of RF transceiver ICs, a crystal, and master oscillation coupling. Each of the plurality of RF transceiver ICs includes crystal oscillator circuitry. Crystal oscillator circuitry of the first RF transceiver IC and a crystal are operable to produce a master oscillation. Master oscillation coupling couples the master oscillation produced by the first RF transceiver IC to the at least one other RF transceiver IC. In one embodiment, the master oscillation is passed from the first RF transceiver IC to each other transceiver RF ICs. In another embodiment, the master oscillation is used to produce a slave oscillation at a second RF transceiver IC and subsequent RF transceiver ICs produce there own slave oscillation based upon a slave oscillation received from a prior RF transceiver IC.
摘要翻译：多输入多输出（MIMO）RF收发器系统包括多个RF收发器IC，晶体和主振荡耦合。多个RF收发器IC中的每一个包括晶体振荡器电路。第一RF收发器IC和晶体的晶体振荡器电路可操作以产生主振荡。主振荡耦合将由第一RF收发器IC产生的主振荡耦合到至少一个其它RF收发器IC。在一个实施例中，主振荡从第一RF收发器IC传递到彼此的收发器RF IC。在另一个实施例中，主振荡用于在第二RF收发器IC产生从动振荡，并且随后的RF收发器IC基于从先前RF收发器IC接收的从动振荡而产生自身的从动振荡。

107. 发明授权

US08064859B2 Gain insensitive high-pass VGA 失效
标题翻译：增益不高的高通VGA
公开(公告)号：US08064859B2
公开(公告)日：2011-11-22
申请号：US12136732
申请日：2008-06-10
申请人： Michael S. Kappes , Arya Reza Behzad
发明人： Michael S. Kappes , Arya Reza Behzad
IPC分类号： H04B1/06 , H04B7/00 , H04B1/28
CPC分类号： H03G9/02 , H03F3/211 , H03F3/24 , H03F3/45475 , H03F2200/372 , H03F2203/45522 , H03G9/005
摘要： An integrated circuit radio transceiver and method therefor includes a high-pass variable gain amplifier (HPVGA) operably disposed within one of the transmitter and the receiver front ends operable to provide a linear variable gain and a substantially constant high-pass frequency corner that does not vary with changes in gain level settings. The HPVGA includes an amplifier operably disposed to receive an input signal and to produce an amplified output based upon the input signal, an adjustable resistance block operable to adjust resistance based upon a gain control input and corner drift compensation block operably disposed to provide corner frequency compensation at the input terminal of the amplifier that is further coupled to receive the input signal from the adjustable resistance block.
摘要翻译：集成电路无线电收发器及其方法包括可操作地设置在发射机和接收机前端之一内的高通可变增益放大器（HPVGA），其可操作以提供线性可变增益和基本上恒定的高通频率角随着增益级别设置的变化而变化。 HPVGA包括可操作地布置成接收输入信号并基于输入信号产生放大输出的放大器，可调电阻块，其可操作以基于增益控制输入和拐角漂移补偿块来调整电阻，所述增益控制输入和拐角漂移补偿块可操作地设置以提供拐角频率补偿在放大器的输入端处，其进一步耦合以从可调电阻块接收输入信号。

108. 发明授权

US08063706B2 Cascode CMOS RF power amplifier with programmable feedback cascode bias under multiple supply voltages 有权
标题翻译： Cascode CMOS射频功率放大器，具有可编程的反馈共源共栅偏置电压
公开(公告)号：US08063706B2
公开(公告)日：2011-11-22
申请号：US12860905
申请日：2010-08-22
申请人： Mingyuan Li , Ali Afsahi , Arya Reza Behzad
发明人： Mingyuan Li , Ali Afsahi , Arya Reza Behzad
IPC分类号： H03F3/04
CPC分类号： H03F1/0261 , H03F1/0244 , H03F1/0272 , H03F1/223 , H03F3/193 , H03F2200/61
摘要： A Radio Frequency (RF) cascode power amplifier operates with differing battery supply voltages. A transconductance stage has a transistor with an RF signal input at its gate. A cascode stage has at least one cascode transistor, the cascode stage coupled in series with the transconductance stage between a battery voltage node and ground, the cascode stage having an RF signal output at the battery voltage node and at least one bias input to the at least one cascode transistor. Cascode bias feedback circuitry applies fixed bias voltage(s) to the at least one two bias inputs for a low battery voltage and applies feedback bias voltage(s) to the at least two bias inputs for a high battery voltage, the feedback bias voltage(s) based upon a voltage of the battery voltage node. More than two differing battery supply voltages are supported.
摘要翻译：射频（RF）共源共栅功率放大器以不同的电池电压工作。跨导级具有在其栅极处输入RF信号的晶体管。共源共栅级具有至少一个共源共栅晶体管，所述共源共栅级与电池电压节点和地之间的跨导级串联耦合，所述共源共栅级在电池电压节点处具有RF信号输出和至少一个偏置输入到至少一个共源共栅晶体管。串联偏压反馈电路为低电池电压向至少一个两个偏置输入端施加固定偏置电压，并且对于高电池电压将反馈偏置电压施加到至少两个偏置输入端，反馈偏置电压（ s）基于电池电压节点的电压。支持两种不同的电池电源电压。

109. 发明授权

US08014820B2 Baseband / RFIC interface for high throughput MIMO communications 有权
标题翻译：用于高吞吐量MIMO通信的基带/ RFIC接口
公开(公告)号：US08014820B2
公开(公告)日：2011-09-06
申请号：US12554956
申请日：2009-09-07
申请人： Jason A. Trachewsky , Arya Reza Behzad
发明人： Jason A. Trachewsky , Arya Reza Behzad
IPC分类号： H04M1/00
CPC分类号： H04B1/0003
摘要： Analog signal paths are utilized between a baseband processor and a radio front end to support high throughput communications for a multiple in multiple out radio transceiver that support communications over two or more antennas. Specifically, analog differential I and Q path communication signals are exchanged between a radio front end core and a baseband processor to maximize throughput capacity for high data rate signals. Along the same lines, the impedances of traces and the interface are matched to reduce I/Q imbalance.
摘要翻译：模拟信号路径在基带处理器和无线电前端之间被利用，以支持用于支持两个或更多个天线上的通信的多输出无线电收发器中的多个通信的高吞吐量通信。具体地说，在无线电前端核心和基带处理器之间交换模拟差分I和Q路径通信信号以最大化高数据速率信号的吞吐能力。沿着相同的线路，跟踪和接口的阻抗匹配，以减少I / Q不平衡。

110. 发明申请

US20110185091A1 Wireless Bus for Intra-Chip and Inter-Chip Communication, Including Data Center/Server Embodiments 有权
标题翻译：无线总线用于芯片内和片间通信，包括数据中心/服务器实现
公开(公告)号：US20110185091A1
公开(公告)日：2011-07-28
申请号：US12877736
申请日：2010-09-08
申请人： Ahmadreza (Reza) ROFOUGARAN , Arya Reza BEHZAD , Sam Ziqun ZHAO , Jesus Alfonso CASTANEDA , Michael BOERS
发明人： Ahmadreza (Reza) ROFOUGARAN , Arya Reza BEHZAD , Sam Ziqun ZHAO , Jesus Alfonso CASTANEDA , Michael BOERS
IPC分类号： G06F13/42
CPC分类号： G06F9/50 , H04B5/0037 , H04B7/10 , H04B7/26 , H04W4/80 , H04W84/18 , Y10T307/492
摘要： Embodiments of the present invention are directed to a wire-free data center/server. The data center/server is wire-free in the sense that communication within a data unit of the data center/server (i.e., intra-data unit), between data units of the data center/server (inter-data unit), and between the data units and the backplane of the data center/server is performed wirelessly.
摘要翻译：本发明的实施例涉及一种无线数据中心/服务器。在数据中心/服务器（数据单元）的数据单元之间，数据中心/服务器（数据间单元）的数据单元和数据中心/服务器的数据单元（即，数据内单元）内的通信和数据中心/服务器在数据单元和数据中心/服务器的背板之间进行无线通信。

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