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101. 发明申请

US20210327745A1 PICKUP AND CONTACT DEVICE 有权
公开(公告)号：US20210327745A1
公开(公告)日：2021-10-21
申请号：US16921962
申请日：2020-07-07
申请人： Powertech Technology Inc.
发明人： Yi Chi Wang , Yu Kai Chuang
IPC分类号： H01L21/683 , H01L21/66 , H01L21/67
摘要： A pickup and contact device is adapted to be connected to a moving device to move a picked-up electronic element to an electrical testing zone. The moving device pressurizes the electronic element through the pickup and contact device, so that a contact point of the electronic element stably contacts a contact pad of the electrical testing zone. The pickup and contact device includes a main body including a base and a contact portion and a plurality of heat dissipation fins disposed at two opposite sides of the base. The contact portion is adapted to pick up the electronic element and to move the electronic element to the electrical testing zone along with the moving device. When the electronic element is tested in the electrical testing zone, heat emitted from the electronic element is adapted to be transmitted out through the heat dissipation fins of the main body.

102. 发明申请

US20210272907A1 REDISTRIBUTION LAYER OF FAN-OUT PACKAGE AND MANUFACTURING METHOD THEREOF 有权
公开(公告)号：US20210272907A1
公开(公告)日：2021-09-02
申请号：US16879028
申请日：2020-05-20
申请人： Powertech Technology Inc.
发明人： Ming-Yi WANG , Yu-Ping WANG
IPC分类号： H01L23/538 , H01L21/48
摘要： A redistribution layer of fan-out package and manufacturing method thereof is disclosed. Before forming a pattern wiring layer on each dielectric insulation layer, a thin metal ion layer is formed firstly. A connection between the metal ion layer and the corresponding dielectric insulation layer is weaker than that between the patterned wiring layer and the corresponding dielectric insulation layer. When the redistribution layer is placed in a high temperature and high humidity environment, the stress generated by the patterned circuit layer causes that multiple gaps to form between the metal ion layers and the corresponding dielectric insulating layer. Therefore, a distance between the adjacent dielectric insulating layer and the patterned wiring layer is increased to reduce the capacitive effect and the power consumption of the thinner redistribution layer.

103. 发明申请

US20210202390A1 PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF 有权
公开(公告)号：US20210202390A1
公开(公告)日：2021-07-01
申请号：US17080853
申请日：2020-10-27
申请人： Powertech Technology Inc.
发明人： Hung-Hsin Hsu , Nan-Chun Lin
IPC分类号： H01L23/538 , H01L23/24 , H01L21/48 , H01L23/498
摘要： A package structure including a redistribution circuit structure, a first chip, a second chip, a first circuit board, a second circuit board, and a plurality of conductive terminals is provided. The redistribution circuit structure has a first connection surface and a second connection surface opposite to the first connection surface. The first chip and the second chip are disposed on the first connection surface and are electrically connected to the redistribution circuit structure. The first circuit board and the second circuit board are disposed on the second connection surface and are electrically connected to the redistribution circuit structure. The conductive terminals are disposed on the first circuit board or the second circuit board. The conductive terminals are electrically connected to the first circuit board or the second circuit board. A manufacturing method of a package structure is also provided.

104. 发明授权

US10892250B2 Stacked package structure with encapsulation and redistribution layer and fabricating method thereof 有权
公开(公告)号：US10892250B2
公开(公告)日：2021-01-12
申请号：US16229562
申请日：2018-12-21
申请人： Powertech Technology Inc.
发明人： Ming-Chih Chen , Hung-Hsin Hsu , Yuan-Fu Lan , Hsien-Wen Hsu
IPC分类号： H01L25/065 , H01L23/31 , H01L23/552 , H01L23/373 , H01L23/00 , H01L21/56
摘要： A stacked package structure has a metal casing, a stacked chipset, an encapsulation and a redistribution layer. The stacked chipset is adhered in the metal casing. The encapsulation is formed in the metal casing to encapsulate the stacked chip set, but a plurality of surfaces of the metal pads are exposed through the encapsulation. The redistribution layer is further formed on the encapsulation and electrically connects to the metal pads of the stacked chipset. Therefore, the stacked package structure includes the metal casing, so an efficiency of heat dissipation and structural strength are increased.

105. 发明申请

US20200381812A1 INTEGRATED ANTENNA PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF 审中-公开
公开(公告)号：US20200381812A1
公开(公告)日：2020-12-03
申请号：US16554644
申请日：2019-08-29
申请人： Powertech Technology Inc.
发明人： Yun-Hsin Yeh , Hung-Hsin Hsu
IPC分类号： H01Q1/38 , H01L21/56 , H01L23/31 , H01L23/66 , H01Q1/40
摘要： An integrated antenna package structure including a circuit board, a chip, an encapsulant and an antenna is provided. The chip is disposed on and electrically connected to the circuit board. The encapsulant encapsulates the chip. The encapsulant has a first surface and a second surface, wherein the normal vector of the first surface is different from the normal vector of the second surface. The antenna is disposed on the first surface and the second surface of the encapsulant. A manufacturing method of an integrated antenna package structure is also provided.

106. 发明申请

US20200335456A1 SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF 审中-公开
公开(公告)号：US20200335456A1
公开(公告)日：2020-10-22
申请号：US16384940
申请日：2019-04-16
申请人： Powertech Technology Inc.
发明人： Wen-Jeng Fan
IPC分类号： H01L23/00 , H01L23/31 , H01L23/538 , H01L25/10 , H01L21/48 , H01L21/56 , H01L25/00
摘要： A semiconductor package including a semiconductor chip, a conductive element disposed adjacent to the semiconductor chip, an insulating encapsulation covering the semiconductor chip and the conductive element, a redistribution structure disposed on the semiconductor chip and the conductive element, and a first buffer layer disposed between the redistribution structure and the insulating encapsulation is provided. The semiconductor chip is electrically coupled to the conductive element through the redistribution structure. The first buffer layer covers the semiconductor chip and the conductive element. A manufacturing method of a semiconductor package is also provided.

107. 发明申请

US20200273829A1 SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF 审中-公开
公开(公告)号：US20200273829A1
公开(公告)日：2020-08-27
申请号：US16521596
申请日：2019-07-25
申请人： Powertech Technology Inc.
发明人： Hung-Hsin Hsu , Shang-Yu Chang Chien , Nan-Chun Lin
IPC分类号： H01L23/00 , H01L23/29 , H01L23/31 , H01L23/522 , H01L21/56 , H01L21/768
摘要： A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes first dies, an insulating encapsulation laterally encapsulating the first dies, a second die disposed over the portion of the insulating encapsulation and at least partially overlapping the first dies, and a redistribution structure disposed on the insulating encapsulation and electrically connected to the first dies and the second die. A second active surface of the second die faces toward first active surfaces of the first dies. The redistribution structure includes a first conductive via disposed proximal to the first dies, and a second conductive via disposed proximal to the second die. The first and second conductive vias are electrically coupled and disposed in a region of the redistribution structure between the second die and one of the first dies. The first conductive via is staggered from the second conductive via by a lateral offset.

108. 发明授权

US10756065B2 Method thereof of package structure 有权
公开(公告)号：US10756065B2
公开(公告)日：2020-08-25
申请号：US16741749
申请日：2020-01-14
申请人： Powertech Technology Inc.
发明人： Shang-Yu Chang Chien , Hung-Hsin Hsu , Nan-Chun Lin
IPC分类号： H01L23/48 , H01L25/065 , H01L23/498 , H01L23/00 , H01L21/48 , H01L25/00 , H01L23/31
摘要： A method of fabricating a package structure including at least the following steps is provided. A carrier is provided. A first package is formed on the carrier. The first package is formed by at least the following steps. A first redistribution layer is formed on the carrier, wherein the first redistribution layer has a first surface and a second surface opposite to the first surface. A semiconductor die is bonded on the first surface of the first redistribution layer. The semiconductor die is electrically connected to the first redistribution layer through a plurality of conductive wires. An insulating material is formed to encapsulate the semiconductor die and the plurality of conductive wires. A thinning process is performed to obtain an insulating encapsulant by reducing a thickness of the insulating material until a portion of each of the conductive wires is removed to form a plurality of conductive wire segments, wherein the semiconductor die is electrically insulated from the first redistribution layer after the thinning process. A second redistribution layer is formed on a top surface of the insulating encapsulant, and over the semiconductor die. The second redistribution layer is electrically connected to the first redistribution layer and to the semiconductor die by the plurality of conductive wire segments.

109. 发明申请

US20200243449A1 PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF 审中-公开
公开(公告)号：US20200243449A1
公开(公告)日：2020-07-30
申请号：US16261566
申请日：2019-01-30
申请人： Powertech Technology Inc.
发明人： Chia-Wei Chiang , Li-Chih Fang , Wen-Jeng Fan
IPC分类号： H01L23/538 , H01L23/31 , H01L23/00 , H01L25/10 , H01L21/48 , H01L21/56 , H01L25/00
摘要： A package structure includes a redistribution structure, a bridge die, a plurality of conductive pillars, at least two dies, and an insulating encapsulant. The bridge die provides an electrical connection between the at least two dies. The conductive pillars provide an electrical connection between the at least two dies and the redistribution structure. The insulating encapsulant is disposed on the redistribution structure, encapsulates the bridge die and the conductive pillars, and covers each of the at least two dies. The bridge die of the package structure may be used to route signals between the at least two dies, allowing for a higher density of interconnecting routes between the at least two dies.

110. 发明授权

US10629554B2 Package structure and manufacturing method thereof 有权
公开(公告)号：US10629554B2
公开(公告)日：2020-04-21
申请号：US15952261
申请日：2018-04-13
申请人： Powertech Technology Inc.
发明人： Nan-Chun Lin , Hung-Hsin Hsu
IPC分类号： H01L23/00 , H01L21/56 , H01L23/31 , H01L21/78
CPC分类号： H01L24/02 , H01L21/565 , H01L21/568 , H01L23/3185 , H01L24/13 , H01L21/78 , H01L2224/0226 , H01L2224/0231 , H01L2224/02245 , H01L2224/02255 , H01L2224/02379 , H01L2224/02381 , H01L2224/13024 , H01L2924/1816
摘要： A package structure includes a die, an encapsulant, a dam structure, and a redistribution structure. The die has an active surface and a rear surface opposite to the active surface. The encapsulant encapsulates sidewalls of the die. The encapsulant has a first surface and a second surface opposite to the first surface. The first surface is coplanar with the rear surface of the die. The second surface is located at a level height different from the active surface of the die. The dam structure is disposed on the active surface of the die. A top surface of the dam structure is substantially coplanar with the second surface of the encapsulant. The redistribution structure is over the encapsulant, the dam structure, and the die. The redistribution structure is electrically connected to the die.

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