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91. 发明授权

US10256186B2 Interconnect structure having subtractive etch feature and damascene feature 有权
公开(公告)号：US10256186B2
公开(公告)日：2019-04-09
申请号：US15816508
申请日：2017-11-17
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION
发明人： Griselda Bonilla , Samuel S. Choi , Ronald G. Filippi , Elbert E. Huang , Naftali E. Lustig , Andrew H. Simon
IPC分类号： H01L23/522 , H01L21/786 , H01L23/528 , H01L21/768 , H01L21/321 , H01L21/3213 , H01L21/4763 , H01L23/532
摘要： Methods of forming an interconnect structure include depositing a first conductive material on a substrate. Aspects include subtractively etching the conductive material to form a patterned first conductive layer, and depositing a dielectric layer on interconnect structure. Aspects also include depositing a second conductive material on the dielectric layer and removing the second conductive material through the top of the second metal liner.

92. 发明申请

US20180088365A1 BROKEN LINE REPAIR METHOD OF TFT SUBSTRATE 审中-公开
公开(公告)号：US20180088365A1
公开(公告)日：2018-03-29
申请号：US15117453
申请日：2016-06-20
申请人： Shenzhen China Star Optoelectronics Technology Co., Ltd.
发明人： He Zhao , Kecheng Xie
IPC分类号： G02F1/13 , G02F1/1368 , H01L21/768 , H01L21/786 , H01L21/82 , H01L27/12
CPC分类号： G02F1/1309 , G02F1/136259 , G02F1/1368 , G02F2001/136263 , H01L21/768 , H01L21/786 , H01L21/82 , H01L27/12
摘要： The present invention provides a broken line repair method of a TFT substrate. The method first finds out a broken line in the TFT substrate and a position of a broken point on the broken line. Then, positions of the passivation layer intersecting with the broken line at two ends of the broken point are processed, respectively to expose a metal layer, where the broken line is. Then, a temporary material layer is covered on the passivation layer and the metal layer which is exposed at the two ends of the broken point. Finally, a metal growing film is formed on the temporary material layer to connect the broken line of the two ends of the broken point. With the temporary material layer, the issue of bad repair result due to the remain of the color resist layer and the folding of the passivation layer can be solved.

93. 发明申请

US20180069149A1 TRANSFERRING METHOD, MANUFACTURING METHOD, DEVICE AND ELECTRONIC APPARATUS OF MICRO-LED 审中-公开
公开(公告)号：US20180069149A1
公开(公告)日：2018-03-08
申请号：US15559801
申请日：2015-11-04
申请人： Goertek.Inc
发明人： Quanbo ZOU , Manen LU , Zhe WANG
IPC分类号： H01L33/00 , H01L27/15 , H01L25/075 , H01L33/20 , H01L21/68 , H01L21/786
CPC分类号： H01L33/0095 , H01L21/68 , H01L21/786 , H01L25/0753 , H01L27/15 , H01L33/0079 , H01L33/20
摘要： The present invention discloses a transferring method, a manufacturing method, a device and an electronics apparatus of micro-LED. The method for transferring micro-LEDs comprises: forming a mask layer on the backside of a laser-transparent original substrate, wherein micro-LEDs are formed on the front-side of the original substrate; bringing the micro-LEDs on the original substrate in contact with preset pads on a receiving substrate; and irradiating the original substrate from the original substrate side with laser through the mask layer, to lift-off micro-LEDs from the original substrate.

94. 发明授权

US09764949B2 Anodic oxide film structure cutting method and unit anodic oxide film structure 有权
公开(公告)号：US09764949B2
公开(公告)日：2017-09-19
申请号：US15259478
申请日：2016-09-08
申请人： Point Engineering Co., Ltd.
发明人： Bum Mo Ahn , Seung Ho Park , Sung Hyun Byun
IPC分类号： B81C1/00 , H01L21/786 , H01L21/78
CPC分类号： B81C1/00825 , B81C1/00888 , B81C2201/0114 , H01L21/78
摘要： An anodic oxide film structure cutting method is provided. The method includes: an etching step of forming an etched groove by etching one surface of an anodic oxide film having a plurality of anodizing pores along a predetermined cutting line and forming increased-diameter pores by enlarging entrances of the anodizing pores positioned on an inner bottom surface of the etched groove; and a cutting step of cutting the anodic oxide film along the etched groove. Also provided is a unit anodic oxide film structure produced by the cutting method.

95. 发明申请

US20170194225A1 LOW COST HERMETIC MICRO-ELECTRONICS 有权
公开(公告)号：US20170194225A1
公开(公告)日：2017-07-06
申请号：US14984227
申请日：2015-12-30
申请人： International Business Machines Corporation
发明人： Bing Dang , John U. Knickerbocker , Minhua Lu , Jae-Woong Nah , Robert John Polastre
IPC分类号： H01L23/31 , H01L21/786 , H01L23/15
CPC分类号： H05K5/0095 , H01L21/486 , H01L23/15 , H01L23/3121 , H05K5/0247 , H05K5/04
摘要： A hermetically sealed electronic device and method of fabrication are provided. A base layer of a wafer is created using a substrate formed from ultra-thin glass or ceramic using panel or roll to roll processing. One or more layers are bonded to the base layer. The wafer is singulated into a plurality of electronic devices having a top surface and a plurality of sides. A hermetic sealant is applied to each electronic device to completely encase the top surface and the sides while bonding to the base layer. At least one of the layers is a metallization layer formed by metal deposition. Full metallization may be applied over the entire wafer and a pattern subsequently transferred to the full metallization by one of laser and chemical etching. The electronic device may further include at least one electronic component attached to one of the layers and encased by the hermetic sealant.

96. 发明授权

US09666572B2 Process for forming package-on-package structures 有权
公开(公告)号：US09666572B2
公开(公告)日：2017-05-30
申请号：US15186757
申请日：2016-06-20
申请人： Taiwan Semiconductor Manufacturing Company, Ltd.
发明人： Chih-Wei Lin , Ming-Da Cheng , Meng-Tse Chen , Wen-Hsiung Lu , Kuei-Wei Huang , Chung-Shi Liu
IPC分类号： H01L21/00 , H01L25/00 , H01L21/56 , H01L25/065 , H01L21/786 , H01L21/311 , H01L23/00 , H01L21/3105 , H01L25/10 , H01L23/498 , H01L23/538 , H01L23/522 , H01L21/768 , H01L23/31
CPC分类号： H01L25/50 , H01L21/31051 , H01L21/31127 , H01L21/565 , H01L21/568 , H01L21/76885 , H01L21/786 , H01L23/3128 , H01L23/49805 , H01L23/49816 , H01L23/5226 , H01L23/5389 , H01L24/03 , H01L24/13 , H01L24/16 , H01L24/24 , H01L24/32 , H01L24/73 , H01L24/81 , H01L24/82 , H01L24/83 , H01L24/92 , H01L25/0657 , H01L25/105 , H01L2224/02371 , H01L2224/02381 , H01L2224/03618 , H01L2224/0401 , H01L2224/04105 , H01L2224/12105 , H01L2224/13024 , H01L2224/13144 , H01L2224/13147 , H01L2224/13164 , H01L2224/16225 , H01L2224/19 , H01L2224/27019 , H01L2224/32145 , H01L2224/32225 , H01L2224/73204 , H01L2224/73267 , H01L2224/81005 , H01L2224/82005 , H01L2224/83005 , H01L2224/92125 , H01L2224/92244 , H01L2225/06513 , H01L2225/0652 , H01L2225/1035 , H01L2225/1041 , H01L2225/1047 , H01L2225/1058 , H01L2924/01029 , H01L2924/12042 , H01L2924/15311 , H01L2924/15321 , H01L2924/15331 , H01L2924/181 , H01L2924/00
摘要： A device includes an inter-layer dielectric, a device die under the inter-layer dielectric; and a die-attach film under the inter-layer dielectric and over the device die, wherein the die-attach film is attached to the device die. A plurality of redistribution lines includes portions level with the die-attach film. A plurality of Z-interconnects is electronically coupled to the device die and the plurality of redistribution lines. A polymer-comprising material is under the inter-layer dielectric. The device die, the die-attach film, and the plurality of Z-interconnects are disposed in the polymer-comprising material.

97. 发明授权

US08823155B2 Semiconductor device and method of manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08823155B2
公开(公告)日：2014-09-02
申请号：US13275430
申请日：2011-10-18
申请人： Toshio Nakasaki
发明人： Toshio Nakasaki
IPC分类号： H01L27/00 , H01L21/76 , H01L21/683 , H01L21/764 , H01L21/786 , H01L21/762 , H01L23/48 , H01L21/768 , H01L25/18 , H01L21/304 , H01L23/00
CPC分类号： H01L24/97 , H01L21/3043 , H01L21/6836 , H01L21/76224 , H01L21/764 , H01L21/76898 , H01L21/78 , H01L21/786 , H01L23/481 , H01L24/02 , H01L24/05 , H01L24/06 , H01L24/13 , H01L24/14 , H01L24/16 , H01L24/27 , H01L24/29 , H01L24/32 , H01L24/81 , H01L25/18 , H01L2221/68327 , H01L2224/02313 , H01L2224/02371 , H01L2224/02372 , H01L2224/0239 , H01L2224/0401 , H01L2224/05008 , H01L2224/056 , H01L2224/06131 , H01L2224/13022 , H01L2224/13024 , H01L2224/13025 , H01L2224/1412 , H01L2224/16225 , H01L2224/16227 , H01L2224/32225 , H01L2224/81191 , H01L2224/81815 , H01L2224/83191 , H01L2224/83201 , H01L2224/8385 , H01L2924/01019 , H01L2924/1306 , H01L2924/13091 , H01L2924/00
摘要： A semiconductor device includes a first semiconductor chip including a first surface, a second surface and a first terminal arranged on the first surface, a second semiconductor chip including a first surface, a second surface and a second terminal arranged on the first surface of the second semiconductor chip, a support substrate including a first surface bonded to the second surfaces of the first semiconductor chip and the second semiconductor chip, and an isolation groove formed on the first surface of the support substrate. The isolation includes a pair of side surfaces continuously extending from opposing side surfaces of the first semiconductor chip and the second semiconductor chip, respectively, and the isolation groove is formed into the support substrate to extend from the first surface of the support substrate. The isolation groove has a depth less than a thickness of the support substrate.
摘要翻译：半导体器件包括：第一半导体芯片，包括第一表面，第二表面和布置在第一表面上的第一端子;第二半导体芯片，包括第一表面，第二表面和第二端子，所述第二表面布置在第二表面的第二表面上半导体芯片，包括结合到第一半导体芯片和第二半导体芯片的第二表面的第一表面的支撑基板，以及形成在支撑基板的第一表面上的隔离槽。隔离包括分别从第一半导体芯片和第二半导体芯片的相对侧表面连续延伸的一对侧表面，并且隔离槽形成为支撑基板，以从支撑基板的第一表面延伸。隔离槽的深度小于支撑基板的厚度。

98. 发明授权

US08796078B2 Semiconductor device and manufacturing method thereof 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08796078B2
公开(公告)日：2014-08-05
申请号：US12787757
申请日：2010-05-26
申请人： Toshinari Sasaki , Hiroki Ohara , Junichiro Sakata
发明人： Toshinari Sasaki , Hiroki Ohara , Junichiro Sakata
IPC分类号： H01L21/336 , H01L21/786
CPC分类号： H01L29/66969 , H01L21/02164 , H01L21/02565 , H01L21/30604 , H01L29/45 , H01L29/78618 , H01L29/7869 , H01L29/78696
摘要： An object is to provide a highly reliable semiconductor device including a thin film transistor having stable electric characteristics. In addition, another object is to manufacture a highly reliable semiconductor device at low cost with high productivity. In a method for manufacturing a semiconductor device including a thin film transistor including an oxide semiconductor layer as a channel formation region, the oxide semiconductor layer is heated under a nitrogen atmosphere to lower its resistance, thereby forming a low-resistance oxide semiconductor layer. Further, resistance of a region of the low-resistance oxide semiconductor layer, which is overlapped with a gate electrode layer, is selectively increased, thereby forming a high-resistance oxide semiconductor layer. Resistance of the oxide semiconductor layer is increased by forming a silicon oxide film in contact with the oxide semiconductor layer by a sputtering method.
摘要翻译：目的在于提供一种具有稳定电特性的薄膜晶体管的高度可靠的半导体装置。此外，另一个目的是以高生产率以低成本制造高度可靠的半导体器件。在包括具有作为沟道形成区域的氧化物半导体层的薄膜晶体管的半导体器件的制造方法中，在氮气气氛下加热氧化物半导体层以降低其电阻，从而形成低电阻氧化物半导体层。此外，选择性地增加与栅电极层重叠的低电阻氧化物半导体层的区域的电阻，从而形成高电阻氧化物半导体层。通过溅射法形成与氧化物半导体层接触的氧化硅膜，可提高氧化物半导体层的电阻。

99. 发明授权

US08748243B2 Display device, method for manufacturing display device, and SOI substrate 失效
标题翻译：显示装置，显示装置的制造方法以及SOI基板
公开(公告)号：US08748243B2
公开(公告)日：2014-06-10
申请号：US13249308
申请日：2011-09-30
申请人： Shunpei Yamazaki
发明人： Shunpei Yamazaki
IPC分类号： H01L21/786 , H01L21/84
CPC分类号： H01L27/1266 , H01L27/1214 , H01L29/66772
摘要： A manufacturing method is provided which achieves an SOI substrate with a large area and can improve productivity of manufacture of a display device using the SOI substrate. A plurality of single-crystalline semiconductor layers are bonded to a substrate having an insulating surface, and a circuit including a transistor is formed using the single-crystalline semiconductor layers, so that a display device is manufactured. Single-crystalline semiconductor layers separated from a single-crystalline semiconductor substrate are applied to the plurality of single-crystalline semiconductor layers. Each of the single-crystalline semiconductor layers has a size corresponding to one display panel (panel size).
摘要翻译：提供了一种制造方法，其实现了具有大面积的SOI衬底，并且可以提高使用SOI衬底的显示装置的制造的生产率。将多个单晶半导体层接合到具有绝缘表面的基板上，并且使用单晶半导体层形成包括晶体管的电路，从而制造显示装置。与单晶半导体衬底分离的单晶半导体层被施加到多个单晶半导体层。每个单晶半导体层具有对应于一个显示面板（面板尺寸）的尺寸。

100. 发明授权

US08334172B2 Manufacturing method of semiconductor device 有权
标题翻译：半导体器件的制造方法
公开(公告)号：US08334172B2
公开(公告)日：2012-12-18
申请号：US13023976
申请日：2011-02-09
申请人： Soshi Kuroda , Masatoshi Yasunaga , Hironori Matsushima , Kenya Hironaga
发明人： Soshi Kuroda , Masatoshi Yasunaga , Hironori Matsushima , Kenya Hironaga
IPC分类号： H01L21/786 , H01L21/60 , H01L21/56 , H01L21/58 , H01L21/00
CPC分类号： H01L24/48 , H01L21/4853 , H01L23/295 , H01L23/296 , H01L23/3128 , H01L23/49816 , H01L23/49827 , H01L23/544 , H01L24/45 , H01L24/73 , H01L24/83 , H01L24/85 , H01L24/97 , H01L2223/54406 , H01L2223/54486 , H01L2224/29111 , H01L2224/2919 , H01L2224/32013 , H01L2224/32225 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/48465 , H01L2224/48599 , H01L2224/48644 , H01L2224/73265 , H01L2224/83101 , H01L2224/83192 , H01L2224/838 , H01L2224/85203 , H01L2224/85205 , H01L2224/85444 , H01L2224/92 , H01L2224/97 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0133 , H01L2924/014 , H01L2924/0665 , H01L2924/12042 , H01L2924/12044 , H01L2924/15311 , H01L2924/1579 , H01L2924/181 , H01L2224/83 , H01L2224/85 , H01L2224/92247 , H01L2924/00 , H01L2224/78 , H01L2924/00012
摘要： Technology capable of preventing the deterioration of the reliability of semiconductor devices caused by the gasification of a part of the material constituting a wiring substrate is provided. A wiring layer constituting a circuit pattern is formed over each of the front and rear surfaces of a glass epoxy substrate, and after the formation of a solder resist covering the wiring layer while exposing a part of the wiring layer and prior to a heat treatment (first heat treatment) at 100° C. to 150° C. for dehumidification, a heat treatment (second heat treatment) at 160° C. to 230° C. for gasifying and discharging an organic solvent contained in the material constituting a wiring substrate is performed for the wiring substrate.
摘要翻译：提供了能够防止由构成布线基板的材料的一部分的气化引起的半导体器件的可靠性劣化的技术。构成电路图案的布线层形成在玻璃环氧树脂基板的前表面和后表面之上，并且在暴露一部分布线层并且在热处理之前形成覆盖布线层的阻焊剂之后第一热处理）在100℃至150℃下进行除湿，在160℃至230℃下进行热处理（第二热处理），用于气化和排出构成布线基板的材料中所含的有机溶剂对布线基板进行。

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