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91. 发明申请

US20050229837A1 Method of altering the properties of a thin film and substrate implementing said method 有权
标题翻译：实施所述方法的改变薄膜和基材的性质的方法
公开(公告)号：US20050229837A1
公开(公告)日：2005-10-20
申请号：US10512077
申请日：2003-05-07
申请人： Olivier Marty , Volodymyr Lysenko
发明人： Olivier Marty , Volodymyr Lysenko
IPC分类号： B05D3/00 , B32B15/00 , B81C1/00 , B82B3/00 , C30B25/02 , H01L21/20 , H01L21/205 , H01L39/24 , H01L41/22 , H01L41/332 , C30B33/06 , C30B1/00 , C30B23/00 , C30B25/00
CPC分类号： B81C1/0038 , B81C1/00714 , C30B25/02 , H01L21/0237 , H01L21/02381 , H01L21/02439 , H01L21/02463 , H01L21/02513 , H01L21/02521 , H01L21/02543 , H01L21/02546 , H01L21/0259 , H01L21/02658 , H01L39/2454 , H01L41/332 , Y10S977/72 , Y10S977/811 , Y10S977/825 , Y10S977/832 , Y10T428/24802
摘要： The invention relates to a process for modifying the properties of a thin layer (1) formed on the surface of a support (2) forming a substrate (3) utilised in the field of microelectronics, nanoelectronics or microtechnology, nanotechnology, characterised in that it consists of: forming at least one thin layer (1) on a nanostructured support with specific upper surface (2), and treating the nanostructured support with specific upper surface (2) to generate internal strains in the support causing its deformation at least in the plane of the thin layer so as to ensure corresponding deformation of the thin layer to modify its properties.
摘要翻译：本发明涉及一种用于改变在微电子学，纳米电子学或微技术领域中使用的形成衬底（3）的支撑体（2）的表面上形成的薄层（1）的性质的方法，其特征在于它包括：在具有特定上表面（2）的纳米结构支撑件上形成至少一个薄层（1），以及用特定上表面（2）处理纳米结构支撑件以在支撑件中产生内部应变，使其至少在平面，以确保薄层的相应变形，以改变其性能。

92. 发明授权

US06916674B2 Method for fabricating multiple thickness insulator layers 失效
标题翻译：多层厚度绝缘体层的制造方法
公开(公告)号：US06916674B2
公开(公告)日：2005-07-12
申请号：US10704632
申请日：2003-11-12
申请人： Pang-Shiu Chen , Buo-Chin Hsu , Chee-Wee Liu
发明人： Pang-Shiu Chen , Buo-Chin Hsu , Chee-Wee Liu
IPC分类号： H01L21/20 , H01L21/31 , H01L31/0352 , H01L33/00 , H01L21/00
CPC分类号： B82Y10/00 , B82Y20/00 , H01L21/02373 , H01L21/0245 , H01L21/02505 , H01L21/02513 , H01L21/02532 , H01L21/0259 , H01L31/0352
摘要： The present invention discloses a method for fabricating multiple-thickness insulator layers via strain field generated by stress. The strain field is used for alternating a develop mechanism of insulator layers on the quantum dots. By forming the multiple-thickness insulator layers at various developing rates, not only leakage current is prevented, but also components are kept isolated in the nano-electronics components. In nano-electronics manufacturing, the method for fabricating multiple-thickness insulator layers results in both better product reliability and the yield rate. It is potential for integral circuit manufacturing.
摘要翻译：本发明公开了一种通过应力产生的应变场来制造多层绝缘体层的方法。应变场用于交替量子点上的绝缘体层的显影机制。通过以各种显影速率形成多层绝缘体层，不仅可以防止泄漏电流，还可以在纳米电子部件中保持隔离。在纳米电子制造中，制造多层绝缘体层的方法产生更好的产品可靠性和产率。它是集成电路制造的潜力。

93. 发明申请

US20040168626A1 Process for forming semiconductor quantum dots with superior structural and phological stability 审中-公开
标题翻译：用于形成具有优异的结构和光稳定性的半导体量子点的方法
公开(公告)号：US20040168626A1
公开(公告)日：2004-09-02
申请号：US10484287
申请日：2004-01-20
发明人： Peter Moeck , Nigel David Browning
IPC分类号： C30B023/00 , C30B025/00 , C30B028/12 , C30B028/14
CPC分类号： B82Y30/00 , B82Y10/00 , H01L21/02381 , H01L21/02384 , H01L21/02395 , H01L21/02398 , H01L21/02409 , H01L21/02463 , H01L21/02466 , H01L21/02477 , H01L21/02532 , H01L21/02535 , H01L21/02546 , H01L21/02549 , H01L21/0256 , H01L21/02568 , H01L21/0259 , H01L21/0262 , H01L21/02667
摘要： A process for forming thermodynamically stable, epitaxially grown semiconductor quantum dots with varying degree of atomic long-range order is described. This procedure encompasses heteroepitaxial growth, external lattice mismatch strain and point defect engineering, and the conversion of a thermodynamically metastable semiconductor alloy predecessor structure into a structure of compositionally modulated/structurally transformed semiconductor quantum dots with varying degree of atomic long-range order by specific thermal treatments. These quantum dots are structurally stable at room temperature and reasonable device operation temperatures. The key structural transformation is achieved through thermodynamically driven atomic ordering. The resulting thermodynamically stable quantum dots have extensive applications in opto- and micro-electronic devices where the performance depends on both the structural and chemical homogeneity and long-term structural stability of these so called zero-dimensional entities.
摘要翻译：描述了具有不同程度的原子长程顺序形成热力学稳定的外延生长的半导体量子点的方法。该方法包括异质外延生长，外部晶格失配应变和点缺陷工程，以及将热力学亚稳半导体合金前驱体结构转变成具有不同程度的原子长距离顺序的成分调制/结构转换的半导体量子点的结构治疗。这些量子点在室温和合理的器件工作温度下在结构上是稳定的。关键的结构转换是通过热力学驱动的原子排序实现的。所得的热力学稳定量子点在光电和微电子器件中具有广泛的应用，其中性能取决于这些所谓的零维实体的结构和化学均匀性以及长期的结构稳定性。

94. 发明授权

US06696372B2 Method of fabricating a semiconductor structure having quantum wires and a semiconductor device including such structure 失效
标题翻译：制造具有量子线的半导体结构的方法和包括这种结构的半导体器件
公开(公告)号：US06696372B2
公开(公告)日：2004-02-24
申请号：US10014257
申请日：2001-12-07
申请人： Benzhong Wang , Soo Jin Chua
发明人： Benzhong Wang , Soo Jin Chua
IPC分类号： H01L2100
CPC分类号： B82Y20/00 , B82Y10/00 , C30B23/002 , C30B23/02 , C30B25/02 , C30B29/605 , H01L21/02395 , H01L21/0243 , H01L21/02433 , H01L21/02463 , H01L21/02507 , H01L21/02513 , H01L21/02546 , H01L21/0259 , H01L21/0262 , H01L29/125 , H01L33/06 , H01S5/3203 , H01S5/3403 , H01S5/341
摘要： A method for the production of a semiconductor structure having self-organized quantum wires is described. The process includes the formation of multi-atomic steps on a (001) oriented semiconductor substrate inclined at an angle toward the [110] direction. Quantum wires are then spontaneously formed in situ along edges of the multi-atomic steps during epitaxial growth of a semiconductor with a larger or smaller lattice constant than the substrate but with a band gap narrower than that of the underlying material. Further deposition of a layer of semiconductor with a lattice constant within 1% of the substrate but with a band gap wider than that of the wire material then buries the quantum wires between this layer and the substrate layers. These layers are free of defects. Crystal and energy level structures of the quantum wire such as linear density, lateral and vertical dimension, and emission wavelength of photoluminescence can be easily controlled by selecting the angle of inclination of the substrate, lattice mismatch and different combinations of materials. A semiconductor laser with the active layer comprising quantum wires made by this method is also disclosed.
摘要翻译：描述了一种制造具有自组织量子线的半导体结构的方法。该方法包括在朝向[110]方向倾斜的（001）取向的半导体衬底上形成多原子台阶。然后，在具有比衬底更大或更小的晶格常数的半导体的外延生长中，但是具有比下面的材料窄的带隙的带隙，在多原子步骤的边缘上原位自发形成量子线。晶格常数在衬底的1％内但具有比线材宽的带隙的半导体层的进一步沉积然后将量子线埋在该层和衬底层之间。这些层没有缺陷。量子线的晶体和能级结构如线密度，横向和垂直尺寸以及光致发光的发射波长可以通过选择衬底的倾斜角度，晶格失配和材料的不同组合来容易地控制。还公开了一种具有由该方法制成的量子线的有源层的半导体激光器。

95. 发明授权

US06559038B2 Method for growing p-n heterojunction-based structures utilizing HVPE techniques 有权
公开(公告)号：US06559038B2
公开(公告)日：2003-05-06
申请号：US09860651
申请日：2001-05-18
申请人： Audrey E. Nikolaev , Yuri V. Melnik , Konstantin V. Vassilevski , Vladimir A. Dmitriev
发明人： Audrey E. Nikolaev , Yuri V. Melnik , Konstantin V. Vassilevski , Vladimir A. Dmitriev
IPC分类号： H01L21265
CPC分类号： C30B25/02 , B82Y10/00 , B82Y30/00 , C30B29/40 , C30B29/403 , C30B29/406 , H01L21/0237 , H01L21/02378 , H01L21/02458 , H01L21/02505 , H01L21/0254 , H01L21/02543 , H01L21/02546 , H01L21/02579 , H01L21/0259 , H01L21/0262 , H01L31/0304 , H01L31/105 , H01L33/007 , Y02E10/544
摘要： A method for fabricating p-type, i-type, and n-type III-V compound materials using HVPE techniques is provided. If desired, these materials can be grown directly onto the surface of a substrate without the inclusion of a low temperature buffer layer. By growing multiple layers of differing conductivity, a variety of different device structures can be fabricated including simple p-n homojunction and heterojunction structures as well as more complex structures in which the p-n junction, either homojunction or heterojunction, is interposed between a pair of wide band gap material layers. The provided method can also be used to fabricate a device in which a non-continuous quantum dot layer is grown within the p-n junction. The quantum dot layer is comprised of a plurality of quantum dot regions, each of which is typically between approximately 20 and 30 Angstroms per axis. The quantum dot layer is preferably comprised of AlxByInzGa1−x−y−zN, InGaN1−a−bPaAsb, or AlxByInzGa1−x−y−zN1−a−bPaAsb.

96. 发明授权

US06479839B2 III-V compounds semiconductor device with an AlxByInzGa1-x-y-zN non continuous quantum dot layer 有权
标题翻译： III-V族化合物具有Al x B y In z Ga 1-x-y-z N非连续量子点层的半导体器件
公开(公告)号：US06479839B2
公开(公告)日：2002-11-12
申请号：US09861180
申请日：2001-05-18
申请人： Audrey E. Nikolaev , Yuri V. Melnik , Konstantin V. Vassilevski , Vladimir A. Dmitriev
发明人： Audrey E. Nikolaev , Yuri V. Melnik , Konstantin V. Vassilevski , Vladimir A. Dmitriev
IPC分类号： H01L2715
CPC分类号： C30B25/02 , B82Y10/00 , B82Y30/00 , C30B29/40 , C30B29/403 , C30B29/406 , H01L21/0237 , H01L21/02378 , H01L21/02458 , H01L21/02505 , H01L21/0254 , H01L21/02543 , H01L21/02546 , H01L21/02579 , H01L21/0259 , H01L21/0262 , H01L31/0304 , H01L31/105 , H01L33/007 , Y02E10/544
摘要： A method for fabricating p-type, i-type, and n-type III-V compound materials using HVPE techniques is provided. If desired, these materials can be grown directly onto the surface of a substrate without the inclusion of a low temperature buffer layer. By growing multiple layers of differing conductivity, a variety of different device structures can be fabricated including simple p-n homojunction and heterojunction structures as well as more complex structures in which the p-n junction, either homojunction or heterojunction, is interposed between a pair of wide band gap material layers. The provided method can also be used to fabricate a device in which a non-continuous quantum dot layer is grown within the p-n junction. The quantum dot layer is comprised of a plurality of quantum dot regions, each of which is typically between approximately 20 and 30 Angstroms per axis. The quantum dot layer is preferably comprised of AlxByInzGa1−x−y−zN, InGaN1−a−bPaAsb, or AlxByInzGa1−x−y−zN1−a−bPaAsb.
摘要翻译：提供了使用HVPE技术制造p型，i型和n型III-V复合材料的方法。如果需要，这些材料可以直接生长到基材的表面上而不包含低温缓冲层。通过生长具有不同导电性的多层，可以制造各种不同的器件结构，包括简单的pn均聚结和异质结结构以及更复杂的结构，其中pn结，或者是同相结合或异质结，介于一对宽带隙材料层。所提供的方法还可以用于制造其中非连续量子点层在p-n结内生长的装置。量子点层由多个量子点区域组成，每个量子点区域通常在每轴约20至30埃之间。量子点层优选由Al x B y In z Ga 1-x-y-z N，InGaN 1-a-b PaAsb或Al x B y In z Ga 1-x-y-z N 1-a-b Pa Asb组成。

97. 发明授权

US06476420B2 P-N homojunction-based structures utilizing HVPE growth III-V compound layers 有权
标题翻译：使用HVPE生长III-V复合层的基于P-N同质结的结构
公开(公告)号：US06476420B2
公开(公告)日：2002-11-05
申请号：US09860623
申请日：2001-05-17
申请人： Audrey E. Nikolaev , Yuri V. Melnik , Konstantin V. Vassilevski , Vladimir A. Dmitriev
发明人： Audrey E. Nikolaev , Yuri V. Melnik , Konstantin V. Vassilevski , Vladimir A. Dmitriev
IPC分类号： H01L2715
CPC分类号： C30B25/02 , B82Y10/00 , B82Y30/00 , C30B29/40 , C30B29/403 , C30B29/406 , H01L21/0237 , H01L21/02378 , H01L21/02458 , H01L21/02505 , H01L21/0254 , H01L21/02543 , H01L21/02546 , H01L21/02579 , H01L21/0259 , H01L21/0262 , H01L31/0304 , H01L31/105 , H01L33/007 , Y02E10/544
摘要： A method for fabricating p-type, i-type, and n-type III-V compound materials using HVPE techniques is provided. If desired, these materials can be grown directly onto the surface of a substrate without the inclusion of a low temperature buffer layer. By growing multiple layers of differing conductivity, a variety of different device structures can be fabricated including simple p-n homojunction and heterojunction structures as well as more complex structures in which the p-n junction, either homojunction or heterojunction, is interposed between a pair of wide band gap material layers. The provided method can also be used to fabricate a device in which a non-continuous quantum dot layer is grown within the p-n junction. The quantum dot layer is comprised of a plurality of quantum dot regions, each of which is typically between approximately 20 and 30 Angstroms per axis. The quantum dot layer is preferably comprised of AlxByInzGa1−x−y−zN, InGaN1−a−bPaAsb, or AlxByInzGa1−x−y−zN1−a−bPaAsb.
摘要翻译：提供了使用HVPE技术制造p型，i型和n型III-V复合材料的方法。如果需要，这些材料可以直接生长到基材的表面上而不包含低温缓冲层。通过生长具有不同导电性的多层，可以制造各种不同的器件结构，包括简单的pn均聚结和异质结结构以及更复杂的结构，其中pn结，或者是同相结合或异质结，介于一对宽带隙材料层。所提供的方法还可以用于制造其中非连续量子点层在p-n结内生长的装置。量子点层由多个量子点区域组成，每个量子点区域通常在每轴约20至30埃之间。量子点层优选由Al x B y In z Ga 1-x-y-z N，InGaN 1-a-b PaAsb或Al x B y In z Ga 1-x-y-z N 1-a-b Pa Asb组成。

98. 发明申请

US20020119680A1 Method of fabricating a semiconductor structure having quantum wires and a seminconductor device including such structure 失效
标题翻译：制造具有量子线的半导体结构的方法和包括这种结构的半导体器件
公开(公告)号：US20020119680A1
公开(公告)日：2002-08-29
申请号：US10014257
申请日：2001-12-07
发明人： Benzhong Wang , Soo Jin Chua
IPC分类号： H01L023/58
CPC分类号： B82Y20/00 , B82Y10/00 , C30B23/002 , C30B23/02 , C30B25/02 , C30B29/605 , H01L21/02395 , H01L21/0243 , H01L21/02433 , H01L21/02463 , H01L21/02507 , H01L21/02513 , H01L21/02546 , H01L21/0259 , H01L21/0262 , H01L29/125 , H01L33/06 , H01S5/3203 , H01S5/3403 , H01S5/341
摘要： A method for the production of a semiconductor structure having self-organized quantum wires is described. The process includes the formation of multi-atomic steps on a (001) oriented semiconductor substrate inclined at an angle toward the null110null direction. Quantum wires are then spontaneously formed in situ along edges of the multi-atomic steps during epitaxial growth of a semiconductor with a larger or smaller lattice constant than the substrate but with a band gap narrower than that of the underlying material. Further deposition of a layer of semiconductor with a lattice constant within 1% of the substrate but with a band gap wider than that of the wire material then buries the quantum wires between this layer and the substrate layers. These layers are free of defects. Crystal and energy level structures of the quantum wire such as linear density, lateral and vertical dimension, and emission wavelength of photoluminescence can be easily controlled by selecting the angle of inclination of the substrate, lattice mismatch and different combinations of materials. A semiconductor laser with the active layer comprising quantum wires made by this method is also disclosed.
摘要翻译：描述了一种制造具有自组织量子线的半导体结构的方法。该方法包括在朝向[110]方向倾斜的（001）取向的半导体衬底上形成多原子台阶。然后，在具有比衬底更大或更小的晶格常数的半导体的外延生长中，但是具有比下面的材料窄的带隙的带隙，在多原子步骤的边缘上原位自发形成量子线。晶格常数在衬底的1％内但具有比线材宽的带隙的半导体层的进一步沉积然后将量子线埋在该层和衬底层之间。这些层没有缺陷。量子线的晶体和能级结构如线密度，横向和垂直尺寸以及光致发光的发射波长可以通过选择衬底的倾斜角度，晶格失配和材料的不同组合来容易地控制。还公开了一种具有由该方法制成的量子线的有源层的半导体激光器。

99. 发明申请

US20020047135A1 P-N junction-based structures utilizing HVPE grown III-V compound layers 审中-公开
标题翻译：使用HVPE生长的III-V化合物层的P-N结的结构
公开(公告)号：US20020047135A1
公开(公告)日：2002-04-25
申请号：US09861022
申请日：2001-05-17
发明人： Audrey E. Nikolaev , Yuri V. Melnik , Konstantin V. Vassilevski , Vladimir A. Dmitriev
IPC分类号： H01L031/0328
CPC分类号： C30B25/02 , B82Y10/00 , B82Y30/00 , C30B29/40 , C30B29/403 , C30B29/406 , H01L21/0237 , H01L21/02378 , H01L21/02458 , H01L21/02505 , H01L21/0254 , H01L21/02543 , H01L21/02546 , H01L21/02579 , H01L21/0259 , H01L21/0262 , H01L31/0304 , H01L31/105 , H01L33/007 , Y02E10/544
摘要： A method for fabricating p-type, i-type, and n-type III-V compound materials using HVPE techniques is provided. If desired, these materials can be grown directly onto the surface of a substrate without the inclusion of a low temperature buffer layer. By growing multiple layers of differing conductivity, a variety of different device structures can be fabricated including simple p-n homojunction and heterojunction structures as well as more complex structures in which the p-n junction, either homojunction or heterojunction, is interposed between a pair of wide band gap material layers. The provided method can also be used to fabricate a device in which a non-continuous quantum dot layer is grown within the p-n junction. The quantum dot layer is comprised of a plurality of quantum dot regions, each of which is typically between approximately 20 and 30 Angstroms per axis. The quantum dot layer is preferably comprised of AlxByInzGa1-x-y-zN, InGaN1-a-bPaAsb, or AlxByInzGa1-x-y-zN1-a-bPaAsb.
摘要翻译：提供了使用HVPE技术制造p型，i型和n型III-V复合材料的方法。如果需要，这些材料可以直接生长到基材的表面上而不包含低温缓冲层。通过生长具有不同导电性的多层，可以制造各种不同的器件结构，包括简单的pn均聚结和异质结结构以及更复杂的结构，其中pn结，或者是同相结合或异质结，介于一对宽带隙材料层。所提供的方法还可以用于制造其中非连续量子点层在p-n结内生长的装置。量子点层由多个量子点区域组成，每个量子点区域通常在每轴约20至30埃之间。量子点层优选由Al x B y In z Ga 1-x-y-z N，InGaN 1-a-b PaAsb或Al x B y In z Ga 1-x-y-z N 1-a-b Pa Asb组成。

100. 发明授权

US5427055A Method for controlling roughness on surface of monocrystal 失效
标题翻译：控制单晶表面粗糙度的方法
公开(公告)号：US5427055A
公开(公告)日：1995-06-27
申请号：US9733
申请日：1993-01-27
申请人： Takeshi Ichikawa
发明人： Takeshi Ichikawa
IPC分类号： C30B23/06 , C23C14/34 , C23C14/54 , C30B33/00 , H01L21/02 , H01L21/20 , H01L21/203 , H01L21/205 , H01L21/306 , H01L27/12 , C30B23/08
CPC分类号： H01L21/02381 , C23C14/54 , C30B29/06 , C30B33/00 , H01L21/0203 , H01L21/02422 , H01L21/02532 , H01L21/0259 , H01L21/02631 , H01L21/02658 , H01L21/02661 , Y10S117/913
摘要： A method for controlling roughness on a surface of a monocrystal comprises supplying atomes for deposition on the surface of the monocrystal having the roughness under irradiation with ions having controlled energy to carry out epitaxial growth, thereby reducing the roughness.
摘要翻译：用于控制单晶表面粗糙度的方法包括：在具有受控能量的离子照射下具有粗糙度的单晶表面上沉积原子以进行外延生长，从而降低粗糙度。

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