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    • 95. 发明授权
    • Semiconductor memory device capable of repairing defective bits
    • 能够修复有缺陷的位的半导体存储器件
    • US5299160A
    • 1994-03-29
    • US45149
    • 1993-04-12
    • Shigeru Mori
    • Shigeru Mori
    • G11C11/401G11C29/00G11C29/04G11C29/42G11C13/00
    • G11C29/78
    • An input/output switching circuit is provided between I/O blocks and I/O pads. The input/output switching circuit includes fusable elements connected in series, and a switching elements for defining connection path of I/O blocks and I/O pads in response to a potential of each one end of the fusable elements. The switching element connects an I/O block to an I/O pad in a one-to-one correspondence when all the fusable elements are conductive. When one fusable element is disconnected, the switching element isolates a corresponding defective I/O block from an I/O pad, and switches the connection path of each I/O block towards the pad corresponding to the defective I/O block. In a semiconductor memory device having an error checking bit, the manufacturing yield of a semiconductor memory device can be improved by isolating a defective I/O block that cannot be repaired by a normal redundant circuit scheme, and operating the same as a semiconductor memory device without an error checking bit.
    • 在I / O块和I / O焊盘之间提供输入/输出切换电路。 输入/输出切换电路包括串联连接的可熔元件和用于响应于可熔元件的每一端的电位来定义I / O块和I / O焊盘的连接路径的开关元件。 当所有可熔元件都导通时,开关元件以一一对应的方式将I / O块连接到I / O焊盘。 当一个可熔断元件断开时,开关元件将相应的有缺陷的I / O块与I / O焊盘隔离,并将每个I / O块的连接路径切换到与故障I / O块对应的焊盘。 在具有错误检查位的半导体存储器件中,可以通过隔离通过常规冗余电路方案不能修复的缺陷I / O块并且将其作为半导体存储器件进行操作来提高半导体存储器件的制造成品率 没有错误检查位。