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91. 发明申请

US20060190652A1 Mobile device expansion system 失效
标题翻译：移动设备扩展系统
公开(公告)号：US20060190652A1
公开(公告)日：2006-08-24
申请号：US11060353
申请日：2005-02-18
申请人： Leroy Keely , Matthew Lerner , Seiya Ohta , John Stoddard , Jon LeFors , Michael Nuttall
发明人： Leroy Keely , Matthew Lerner , Seiya Ohta , John Stoddard , Jon LeFors , Michael Nuttall
IPC分类号： G06F13/00
CPC分类号： G06F1/1632 , G06F1/1626 , G06F2200/1635
摘要： An expansion device is provided for expanding the functionality of a mobile electronic device while in a mobile mode and/or in a desktop mode. The expansion device may be a media slice that provides multimedia functionality to a mobile electronic device. The media slice may be configured to receive an electromechanical interface from the mobile electronic device and to replicate the electromechanical interface for connecting to another expansion device, such as to a docking station or a port replicator. The expansion device and the mobile electronic device may be connected via a latch mechanism that easily couples and de-couples the devices. An expansion system is also provided that includes a support stand for providing orientation and support features for a computing device and/or an expansion device.
摘要翻译：提供了一种用于在移动模式和/或桌面模式下扩展移动电子设备的功能的扩展设备。扩展设备可以是向移动电子设备提供多媒体功能的媒体片。媒体片可以被配置为从移动电子设备接收机电接口并且复制机电接口以连接到另一扩展设备，诸如对接站或端口复制器。扩展装置和移动电子装置可以经由容易耦合和解耦装置的锁存机构来连接。还提供了一种扩展系统，其包括用于为计算设备和/或扩展设备提供定位和支持特征的支撑架。

92. 发明授权

US07008845B2 Method and composite for decreasing charge leakage 失效
公开(公告)号：US07008845B2
公开(公告)日：2006-03-07
申请号：US10842229
申请日：2004-05-10
申请人： Michael Nuttall , Garry A. Mercaldi
发明人： Michael Nuttall , Garry A. Mercaldi
IPC分类号： H01L21/336
CPC分类号： H01L21/28273 , H01L29/42324 , H01L29/511 , Y10S438/954
摘要： A dielectric insulating composite for insulating a floating gate from a control gate in a non-volatile memory is described. A material, such as an undoped polysilicon, amorphous silicon, or amorphous polysilicon or a silicon rich nitride, is inserted in the gate structure. The oxide film that results from the oxidation of these films is relatively free from impurities. As a result, charge leakage between the floating gate and control gate is reduced.

93. 发明授权

US06458699B1 Methods of forming a contact to a substrate 有权
标题翻译：与基材形成接触的方法
公开(公告)号：US06458699B1
公开(公告)日：2002-10-01
申请号：US09843116
申请日：2001-04-24
申请人： Michael Nuttall , Er-Xuan Ping , Yongjun Jeff Hu
发明人： Michael Nuttall , Er-Xuan Ping , Yongjun Jeff Hu
IPC分类号： H01L2144
CPC分类号： H01L29/41783 , C23C16/04 , C23C16/24 , H01L21/28525 , H01L21/28562 , H01L21/76879 , H01L29/41775 , H01L29/7834
摘要： A method of forming a contact to a substrate includes forming insulating material comprising a substantially amorphous outer surface over a substrate node location. A contact opening is etched through the insulating material over the node location. The node location comprises an outwardly exposed substantially crystalline metal silicide surface. The substrate with outwardly exposed substantially crystalline metal silicide node location surface is provided within a chemical vapor deposition reactor. A gaseous precursor including silicon is fed to the chemical vapor deposition reactor under conditions effective to substantially selectively deposit polysilicon on the outwardly exposed substantially crystalline metal silicide node location surface and not on the insulating material.
摘要翻译：形成与衬底的接触的方法包括形成在衬底节点位置上包括基本无定形的外表面的绝缘材料。通过节点位置处的绝缘材料蚀刻接触开口。节点位置包括向外暴露的基本上结晶的金属硅化物表面。具有向外暴露的基本上结晶的金属硅化物结点位置表面的衬底设置在化学气相沉积反应器内。包括硅的气体前体在有效地基本上选择性地在多晶硅上沉积在外露的基本上结晶的金属硅化物结点位置表面而不是绝缘材料上的条件下被供给到化学气相沉积反应器。

94. 发明授权

US06452678B2 Reflectance method for evaluating the surface characteristics of opaque materials 有权
标题翻译：用于评估不透明材料表面特性的反射方法
公开(公告)号：US06452678B2
公开(公告)日：2002-09-17
申请号：US09928286
申请日：2001-08-10
申请人： Randhir P. S. Thakur , Michael Nuttall , J. Brett Rolfson , Robert James Burke
发明人： Randhir P. S. Thakur , Michael Nuttall , J. Brett Rolfson , Robert James Burke
IPC分类号： G01B1100
CPC分类号： G01B11/303
摘要： Disclosed is a process for analyzing the surface characteristics of opaque materials. The method comprises in one embodiment the use of a UV reflectometer to build a calibration matrix of data from a set of control samples and correlating a desired surface characteristic such as rouglness or surface area to the set of reflectances of the control samples. The UV reflectometer is then used to measure the reflectances of a test sample of unknown surface characteristics. Reflectances are taken at a variety of angles of reflection for a variety of wavelengths, preferably between about 250 nanometers to about 400 nanometers. These reflectances are then compared against the reflectances of the calibration matrix in order to correlate the closest data in the calibration matrix. By so doing, a variety of information is thereby concluded, due to the broad spectrum of wavelengths and angles of reflection used. This includes information pertaining to the roughness and surface area, as well as other surface characteristics such as grain size, grain density, grain shape, and boundary size between the grains. Surface characteristic evaluation can be conducted in-process in a manner which is non-destructive to the test sample. The method is particularly useful for determining the capacitance of highly granular polysilicon test samples used in the construction of capacitator plates in integrated circuit technology, and can be used to determine the existence of flat smooth surfaces, and the presence of prismatic and hemispherical irregularities on flat smooth surfaces.
摘要翻译：公开了一种用于分析不透明材料的表面特性的方法。该方法在一个实施例中包括使用UV反射计来构建来自一组控制样本的数据的校准矩阵，并将期望的表面特性（例如粗糙度或表面积）与对照样品的一组反射率相关联。然后使用UV反射计来测量未知表面特性的测试样品的反射率。对于各种波长，优选在约250纳米到约400纳米之间的各种反射角拍摄反射率。然后将这些反射率与校准矩阵的反射率进行比较，以便将校准矩阵中最接近的数据相关联。通过这样做，由于广泛的波长和使用的反射角度，从而得出各种信息。这包括关于粗糙度和表面积的信息，以及晶粒之间的其他表面特性，例如晶粒尺寸，晶粒密度，晶粒形状和边界尺寸。表面特性评估可以以对测试样品非破坏性的方式进行。该方法对于确定集成电路技术中电容器板结构中使用的高度粒状多晶硅测试样品的电容特别有用，可用于确定平坦光滑表面的存在，以及平面上存在棱镜和半球形不规则光滑的表面。

95. 发明授权

US06417015B2 Semiconductor processing methods and semiconductor defect detection methods 失效
标题翻译：半导体处理方法和半导体缺陷检测方法
公开(公告)号：US06417015B2
公开(公告)日：2002-07-09
申请号：US09870157
申请日：2001-05-29
申请人： Michael Nuttall , Garry A. Mercaldi
发明人： Michael Nuttall , Garry A. Mercaldi
IPC分类号： H01L2166
CPC分类号： H01L22/24 , Y10S438/928 , Y10S438/974
摘要： Semiconductor processing methods and defect detection methods are described. In one embodiment, a semiconductor wafer in process is provided and a material is formed or deposited over the wafer. The material is discernably deposited over defective wafer surface areas and not appreciably deposited over non-defective wafer surface areas. Subsequently, the wafer surface areas are inspected to identify defective areas. In another embodiment, a substrate is provided having an exposed region containing surface defects. A defect-highlighting material is substantially selectively deposited over surface defects and not appreciably over other exposed regions. The substrate is subsequently inspected for the deposited defect-highlighting material. In yet another embodiment, a dielectric layer is formed over a substrate outer surface and the substrate is processed in a manner which can give rise to a plurality of randomly-distributed dielectric layer features. A silicon-containing material is substantially selectively deposited and received over the randomly distributed dielectric layer features and not over other substrate areas. The substrate is subsequently inspected for the selectively-deposited silicon containing material.
摘要翻译：描述半导体处理方法和缺陷检测方法。在一个实施例中，提供了工艺中的半导体晶片，并且在晶片上形成或沉积材料。该材料可辨别地沉积在缺陷晶片表面区域上，并且不会明显地沉积在无缺陷晶片表面区域上。随后，检查晶片表面区域以识别缺陷区域。在另一个实施例中，提供具有包含表面缺陷的暴露区域的衬底。缺陷突出材料基本上选择性地沉积在表面缺陷上，而不是明显地超过其它暴露区域。随后检查衬底以便沉积的缺陷突出材料。在另一个实施例中，在衬底外表面上形成电介质层，并且以可以产生多个随机分布的电介质层特征的方式处理衬底。基本上选择性地沉积含硅材料并将其接收在随机分布的介电层特征上而不是在其它衬底区域上。随后检查衬底以选择沉积含硅材料。

96. 发明授权

US06387716B1 Semiconductor processing methods and semiconductor defect detection methods 失效
标题翻译：半导体处理方法和半导体缺陷检测方法
公开(公告)号：US06387716B1
公开(公告)日：2002-05-14
申请号：US09522054
申请日：2000-03-09
申请人： Michael Nuttall , Garry A. Mercaldi
发明人： Michael Nuttall , Garry A. Mercaldi
IPC分类号： H01L2166
CPC分类号： H01L22/24 , Y10S438/928 , Y10S438/974
摘要： Semiconductor processing methods and defect detection methods are described. In one embodiment, a semiconductor wafer in process is provided and a material is formed or deposited over the wafer. The material is discernably deposited over defective wafer surface areas and not appreciably deposited over non-defective wafer surface areas. Subsequently, the wafer surface areas are inspected to identify defective areas. In another embodiment, a substrate is provided having an exposed region containing surface defects. A defect-highlighting material is substantially selectively deposited over surface defects and not appreciably over other exposed regions. The substrate is subsequently inspected for the deposited defect-highlighting material. In yet another embodiment, a dielectric layer is formed over a substrate outer surface and the substrate is processed in a manner which can give rise to a plurality of randomly-distributed dielectric layer features. A silicon-containing material is substantially selectively deposited and received over the randomly-distributed dielectric layer features and not over other substrate areas. The substrate is subsequently inspected for the selectively-deposited silicon-containing material.
摘要翻译：描述半导体处理方法和缺陷检测方法。在一个实施例中，提供了工艺中的半导体晶片，并且在晶片上形成或沉积材料。该材料可辨别地沉积在缺陷晶片表面区域上，并且不会明显地沉积在无缺陷晶片表面区域上。随后，检查晶片表面区域以识别缺陷区域。在另一个实施例中，提供具有包含表面缺陷的暴露区域的衬底。缺陷突出材料基本上选择性地沉积在表面缺陷上，而不是明显地超过其它暴露区域。随后检查衬底以便沉积的缺陷突出材料。在另一个实施例中，在衬底外表面上形成电介质层，并且以可以产生多个随机分布的电介质层特征的方式处理衬底。基本上选择性地沉积含硅材料并将其接收在无规分布的介电层特征上而不是在其它基底区域上。随后检查衬底以进行选择性沉积的含硅材料。

97. 发明授权

US06368919B2 Method and composite for decreasing charge leakage 有权
公开(公告)号：US06368919B2
公开(公告)日：2002-04-09
申请号：US09233313
申请日：1999-01-19
申请人： Michael Nuttall , Garry A. Mercaldi
发明人： Michael Nuttall , Garry A. Mercaldi
IPC分类号： H01L21336
CPC分类号： H01L21/28273 , H01L29/42324 , H01L29/511 , Y10S438/954
摘要： A dielectric insulating composite for insulating a floating gate from a control gate in a non-volatile memory is described. A material, such as an undoped polysilicon, amorphous silicon, or amorphous polysilicon or a silicon rich nitride, is inserted in the gate structure. The oxide film that results from the oxidation of these films is relatively free from impurities. As a result, charge leakage between the floating gate and control gate is reduced.

98. 发明授权

US06333243B1 Method for growing field oxide to minimize birds' beak length 失效
标题翻译：生长场氧化物以最小化鸟的喙长度的方法
公开(公告)号：US06333243B1
公开(公告)日：2001-12-25
申请号：US09506179
申请日：2000-02-17
申请人： Randhir P. S. Thakur , Michael Nuttall , Pai-Hung Pan
发明人： Randhir P. S. Thakur , Michael Nuttall , Pai-Hung Pan
IPC分类号： H01L2176
CPC分类号： H01L21/76213
摘要： A method for forming field oxide isolation regions using oxygen implantation is described. An oxidation resistant layer such as silicon nitride is formed on a silicon substrate, and acts as an oxidation mask. An opening is then formed in the nitride layer, where field oxide is desired. In one embodiment of the invention, oxygen is implanted into this opening, followed by thermal oxidation. In a second embodiment of the invention, the opening is thermally oxidized, followed by a deep oxygen implant and anneal. Encroachment of the field oxide under the nitride layer is decreased, resulting in a minimum “birds' beak” length.
摘要翻译：描述了使用氧注入形成场氧化物隔离区的方法。在硅衬底上形成氮化硅等抗氧化层，作为氧化掩模。然后在氮化物层中形成开口，其中期望场氧化物。在本发明的一个实施方案中，将氧气注入该开口，随后进行热氧化。在本发明的第二实施例中，开口被热氧化，随后进行深氧注入和退火。在氮化物层下的场氧化物的侵蚀减少，导致最小的“鸟”喙长度。

99. 发明授权

US06275292B1 Reflectance method for evaluating the surface characteristics of opaque materials 有权
公开(公告)号：US06275292B1
公开(公告)日：2001-08-14
申请号：US09517473
申请日：2000-03-02
申请人： Randhir P. S. Thakur , Michael Nuttall , J. Brett Rolfson , Robert James Burke
发明人： Randhir P. S. Thakur , Michael Nuttall , J. Brett Rolfson , Robert James Burke
IPC分类号： G01B1130
CPC分类号： G01B11/303
摘要： Disclosed is a process for analyzing the surface characteristics of opaque materials. The method comprises in one embodiment the use of a UV reflectometer to build a calibration matrix of data from a set of control samples and correlating a desired surface characteristic such as roughness or surface area to the set of reflectances of the control samples. The UV reflectometer is then used to measure the reflectances of a test sample of unknown surface characteristics. Reflectances are taken at a variety of angles of reflection for a variety of wavelengths, preferably between about 250 nanometers to about 400 nanometers. These reflectances are then compared against the reflectances of the calibration matrix in order to correlate the closest data in the calibration matrix. By so doing, a variety of information is thereby concluded, due to the broad spectrum of wavelengths and angles of reflection used. This includes information pertaining to the roughness and surface area, as well as other surface characteristics such as grain size, grain density, grain shape, and boundary size between the grains. Surface characteristic evaluation can be conducted in-process in a manner which is non-destructive to the test sample. The method is particularly useful for determining the capacitance of highly granular polysilicon test samples used in the construction of capacitator plates in integrated circuit technology, and can be used to determine the existence of flat smooth surfaces, and the presence of prismatic and hemispherical irregularities on flat smooth surfaces.

100. 发明授权

US06235613B1 Method of producing HSG using an amorphous silicon disordered layer as a substrate 失效
标题翻译：使用非晶硅无序层作为基材制造HSG的方法
公开(公告)号：US06235613B1
公开(公告)日：2001-05-22
申请号：US09190530
申请日：1998-11-12
申请人： Michael Nuttall
发明人： Michael Nuttall
IPC分类号： H01L2136
CPC分类号： H01L28/84 , H01L29/16 , H01L29/1604
摘要： A method is provided for forming hemispherical grain silicon on an integrated circuit semiconductor substrate in a processing reactor. The method includes the steps of forming a doped silicon layer upon the semiconductor substrate and forming an amorphous silicon layer upon the doped silicon layer. A hemispherical grain silicon layer is formed upon the amorphous silicon layer. The doped silicon layer is formed at a first deposition temperature and the amorphous silicon layer is formed at a second deposition temperature wherein the second deposition temperature is lower than the first deposition temperature. The first deposition temperature is, for example, in excess of approximately 590° C. and is preferably approximately 625° C. The second deposition temperature is less than approximately 560° C. and is preferably approximately 555° C. The various layers are deposited without removing the semiconductor substrate from the processing reactor. The depositions can be performed as a continuous deposition of silicon at varying temperatures. The doped polysilicon layer can be formed of doped polysilicon material or doped amorphous silicon and the amorphous silicon layer can be formed of an undoped material.
摘要翻译：提供了一种用于在处理反应器中的集成电路半导体衬底上形成半球形晶粒硅的方法。该方法包括在半导体衬底上形成掺杂硅层并在掺杂硅层上形成非晶硅层的步骤。半非晶硅层形成在非晶硅层上。掺杂硅层在第一沉积温度下形成，并且非晶硅层在第二沉积温度下形成，其中第二沉积温度低于第一沉积温度。第一沉积温度例如超过约590℃，优选为约625℃。第二沉积温度小于约560℃，优选约555℃。各层沉积而不从处理反应器移除半导体衬底。沉积可以作为在不同温度下连续沉积硅来进行。掺杂多晶硅层可以由掺杂多晶硅材料或掺杂的非晶硅形成，并且非晶硅层可以由未掺杂的材料形成。

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