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91. 发明申请

US20090310941A1 AUDIO CLOCKING IN VIDEO APPLICATIONS 有权
标题翻译：视频应用中的音频时钟
公开(公告)号：US20090310941A1
公开(公告)日：2009-12-17
申请号：US12543509
申请日：2009-08-19
申请人： John L. Melanson , Mark P. Rygh
发明人： John L. Melanson , Mark P. Rygh
IPC分类号： H04N7/00
CPC分类号： H04N5/76 , G11B20/10037 , G11B20/10222 , G11B20/10425 , G11B20/10527 , G11B20/14 , G11B20/225 , G11B2020/00065 , G11B2220/2562 , H04N9/8211
摘要： A method of operating an electronic video device such as a DVD player, wherein video clock signals and audio clock signals are derived from a system clock signal using two phase-lock loops, and these video and audio clock signals are used to process encoded video data and encoded audio data, but digital-to-analog conversion of the audio data stream is controlled by the system clock signal rather than the audio clock signals. By using the system clock signal to control the audio digital-to-analog converter (DAC), the DAC avoids the poor performance issues that can arise from jitter introduced into the audio clock signals by the PLL. The system clock signal may be divided by an integer to generate the sampling clock for the audio DAC. In the illustrative embodiment, the system clock signal has a rate which is not an integer multiple of the sample rate of the audio data stream.
摘要翻译：一种操作诸如DVD播放器的电子视频设备的方法，其中使用两个锁相环从系统时钟信号导出视频时钟信号和音频时钟信号，并且这些视频和音频时钟信号用于处理编码视频数据和编码音频数据，但音频数据流的数模转换由系统时钟信号而不是音频时钟信号控制。通过使用系统时钟信号来控制音频数/模转换器（DAC），DAC避免了由PLL引入到音频时钟信号中的抖动引起的性能问题。系统时钟信号可以被除以整数以产生用于音频DAC的采样时钟。在说明性实施例中，系统时钟信号具有不是音频数据流的采样率的整数倍的速率。

92. 发明授权

US07616089B2 Compensation of field effect on polycrystalline resistors 有权
标题翻译：多晶电阻场效应补偿
公开(公告)号：US07616089B2
公开(公告)日：2009-11-10
申请号：US11864480
申请日：2007-09-28
申请人： Hua Yang , Ammisetti Prasad , John L. Melanson
发明人： Hua Yang , Ammisetti Prasad , John L. Melanson
IPC分类号： H01C13/02 , H01L43/00 , H01L43/06 , H01L43/08
CPC分类号： H03F3/45475 , H03F1/3211 , H03F2203/45136 , H03F2203/45528
摘要： A resistive circuit includes a first terminal and a second terminal and polycrystalline first and second resistive segments coupled between the first and second terminals. A third terminal A is coupled to the first resistive segment, and a third terminal B is coupled to the second resistive segment. The third terminal A has a first voltage with respect to the first terminal, and the third terminal B has a second voltage with respect to the second terminal. With this arrangement, the non-linearity of resistance of the first resistive segment at least partially compensates for non-linearity of resistance of the second resistive segment.
摘要翻译：电阻电路包括耦合在第一和第二端子之间的第一端子和第二端子以及多晶的第一和第二电阻段。第三端子A耦合到第一电阻段，并且第三端子B耦合到第二电阻段。第三端子A相对于第一端子具有第一电压，并且第三端子B相对于第二端子具有第二电压。利用这种布置，第一电阻段的电阻的非线性至少部分地补偿第二电阻段的电阻的非线性。

93. 发明授权

US07606377B2 Method and system for surround sound beam-forming using vertically displaced drivers 有权
标题翻译：使用垂直位移驱动器的环绕声波束形成方法和系统
公开(公告)号：US07606377B2
公开(公告)日：2009-10-20
申请号：US11421381
申请日：2006-05-31
申请人： John L. Melanson
发明人： John L. Melanson
IPC分类号： H04R1/40
CPC分类号： H04S3/00 , H04R1/403 , H04R3/12 , H04R2201/401 , H04R2205/022 , H04R2430/20
摘要： A method and system for surround sound beam-forming using vertically displaced drivers provides a low cost alternative to present external surround array systems. A pair of vertically displaced speaker drivers is supplied with surround and main channel information in a controlled phase relationship with respect to each driver such that the surround channel information is propagated in a directivity pattern substantially differing from that of the main channel information. The main channel information is generally directed at a listening area, while the surround channel information is directed away from the listening area and is substantially attenuated in the direction of the listening area, so that the surround channel information is heard as a diffuse reflected field. An electronic network provides for control of the surround channel phase relationship and combining of main and surround signals for providing inputs to individual power amplifiers for each driver.
摘要翻译：使用垂直移位的驱动器的环绕声波束形成的方法和系统为现在的外部环绕阵列系统提供了低成本的替代方案。一对垂直移位的扬声器驱动器以相对于每个驱动器的受控相位关系提供环绕声道和主声道信息，使得环绕声道信息以与主声道信息的方向性图案基本不同的方向性图案传播。主声道信息通常指向收听区域，而环绕声道信息被指向远离聆听区域并且在聆听区域的方向上基本衰减，使得环绕声道信息被作为漫反射场被听到。电子网络提供环绕声道相位关系的控制，以及用于向每个驱动器的各个功率放大器提供输入的主信号和环绕信号的组合。

94. 发明授权

US07599462B2 Hybrid analog/digital phase-lock loop with high-level event synchronization 有权
标题翻译：具有高级别事件同步的混合模拟/数字锁相环
公开(公告)号：US07599462B2
公开(公告)日：2009-10-06
申请号：US11739529
申请日：2007-04-24
申请人： John L. Melanson
发明人： John L. Melanson
IPC分类号： H03D3/24 , H03L7/06 , H03C3/06
CPC分类号： H03L7/07 , H03L7/1976
摘要： A hybrid analog/digital phase-lock loop with high-level event synchronization provides a mechanism for generating a low-jitter clock from a timing reference that has a high jitter level and synchronizing the output clock to high-level events. A numerically-controlled analog oscillator provides a clock output and a counter divides the frequency of the clock output to provide input to a digital phase-frequency detector for detecting an on-going phase-frequency difference between the timing reference and the output of the counter. A synchronization circuit detects or receives a high-level event signal, and resets the on-going phase-frequency difference and optionally the counter to synchronize the clock output with the events. The synchronization circuit may have an arming input to enable the synchronization circuit to signal a next event. Another clock output divider may be included to generate a timing reference output, and the other clock divider also reset in response to a detected event.
摘要翻译：具有高级事件同步的混合模拟/数字锁相环提供了一种从具有高抖动电平并将输出时钟同步到高电平事件的定时参考产生低抖动时钟的机制。数控模拟振荡器提供时钟输出，并且计数器分频时钟输出的频率，以向数字相位频率检测器提供输入，以检测定时基准和计数器的输出之间的正在进行的相位差。同步电路检测或接收高电平事件信号，并重置正在进行的相位差和可选的计数器以使时钟输出与事件同步。同步电路可以具有使得同步电路能够发出下一个事件的布防输入。可以包括另一个时钟输出分频器以产生定时参考输出，另一个时钟分频器也响应于检测到的事件而复位。

95. 发明申请

US20090243591A1 POWER METER HAVING COMPLEX QUADRATURE OUTPUT CURRENT AND VOLTAGE FILTERS 有权
标题翻译：具有复杂平衡输出电流和电压滤波器的功率计
公开(公告)号：US20090243591A1
公开(公告)日：2009-10-01
申请号：US12057498
申请日：2008-03-28
申请人： John L. Melanson
发明人： John L. Melanson
IPC分类号： G01R21/06
CPC分类号： G01R21/1331
摘要： A power meter having complex quadrature output current and voltage filters provides power measurements in high amplitude and frequency variation and/or high jitter environments without requiring high computational overhead. A pair of filters, one for voltage and one for current each have a response determined by complex non-conjugate poles. The response of the filters is such that only the positive or negative half plane of the complex frequency spectrum is passed and provide complex outputs representing the real and imaginary parts of both the current and voltage. At least one indication of a power delivered to a load is computed from the complex current and voltage outputs, which may be the real and/or reactive power.
摘要翻译：具有复杂正交输出电流和电压滤波器的功率计在高幅度和频率变化和/或高抖动环境中提供功率测量，而不需要高的计算开销。一对滤波器，一个用于电压，一个用于电流，每个具有由复共轭非极性决定的响应。滤波器的响应使得仅通过复频谱的正或负半平面，并提供表示电流和电压的实部和虚部的复数输出。从复电流和电压输出计算输送到负载的功率的至少一个指示，其可以是实际和/或无功功率。

96. 发明申请

US20090190384A1 POWERING A POWER SUPPLY INTEGRATED CIRCUIT WITH SENSE CURRENT 有权
标题翻译：为感应电流供电电力集成电路
公开(公告)号：US20090190384A1
公开(公告)日：2009-07-30
申请号：US12165547
申请日：2008-06-30
申请人： Karl Thompson , John L. Melanson , John Paulos , Mauro Gaetano
发明人： Karl Thompson , John L. Melanson , John Paulos , Mauro Gaetano
IPC分类号： H02M7/00
CPC分类号： H02M3/158 , H02M2001/0006 , Y10S323/901
摘要： A power control system and method senses input and/or output voltages of a power supply using sense currents in order for an integrated circuit (IC) switch state controller to generate a control signal to control a switch of the power control system. By sensing sense currents, the power control system can eliminate at least one sense resistor used in a voltage sense system. The sense current(s) can be used to provide power and sensing to the switch state controller. In at least one embodiment, the sense current(s) provide power to the switch state controller when auxiliary IC power is unavailable or diminished, such as during start-up of the IC. In at least one embodiment, the IC draws more sense current from an input of the power control system than the output of the power control system to, for example, minimize impact on the output voltage of the power supply.
摘要翻译：功率控制系统和方法使用感测电流来感测电源的输入和/或输出电压，以便集成电路（IC）开关状态控制器产生控制信号以控制功率控制系统的开关。通过感测感测电流，功率控制系统可以消除在电压感测系统中使用的至少一个感测电阻器。感测电流可用于向开关状态控制器提供功率和感测。在至少一个实施例中，当辅助IC功率不可用或减小时，诸如在IC启动期间，感测电流向开关状态控制器提供电力。在至少一个实施例中，IC比功率控制系统的输出从功率控制系统的输入端吸取更多的感测电流，以例如最小化对电源的输出电压的影响。

97. 发明授权

US07558358B1 Method and apparatus for generating a clock signal according to an ideal frequency ratio 有权
标题翻译：用于根据理想频率比产生时钟信号的方法和装置
公开(公告)号：US07558358B1
公开(公告)日：2009-07-07
申请号：US11691964
申请日：2007-03-27
申请人： John L. Melanson
发明人： John L. Melanson
IPC分类号： H03D3/24
CPC分类号： H03L7/1976 , G09G3/2096 , G09G5/006 , H03L7/235 , H03L2207/50
摘要： A method and apparatus for generating a clock signal according to an ideal frequency ratio provides flexible and reduced frequency error clock generation. A ratio control number is specified or is determined from a phase-frequency comparison of the clock signal to a timing reference. A correction factor is specified as a numerator and denominator and an error is accumulated according to the numerator and denominator of the correction factor. The ratio control number is adjusted according to the accumulated error so that an ideal ratio is maintained between the frequency of the clock signal and the frequency of the timing reference. If the ratio is determined from a phase-frequency correction, then the phase-frequency error is adjusted so that a loop filter output is corrected on average. Otherwise, the ratio control number is adjusted directly.
摘要翻译：用于根据理想频率比产生时钟信号的方法和装置提供灵活且降低的频率误差时钟产生。根据时钟信号与定时参考的相位 - 频率比较来指定比例控制编号或确定比率控制编号。校正因子被指定为分子和分母，并且根据校正因子的分子和分母累积误差。根据累积误差来调整比率控制数，使得在时钟信号的频率和定时参考的频率之间保持理想的比率。如果从相位频率校正确定该比率，则调整相位频率误差，使得平均校正环路滤波器输出。否则，直接调整比率控制编号。

98. 发明授权

US07554473B2 Control system using a nonlinear delta-sigma modulator with nonlinear process modeling 有权
标题翻译：使用非线性过程建模的非线性Δ-Σ调制器的控制系统
公开(公告)号：US07554473B2
公开(公告)日：2009-06-30
申请号：US11865032
申请日：2007-09-30
申请人： John L. Melanson
发明人： John L. Melanson
IPC分类号： H03M3/00
CPC分类号： H02M1/4225 , H03M3/476 , Y02B70/126 , Y02P80/112
摘要： A control system includes a nonlinear delta-sigma modulator, and the nonlinear delta-sigma modulator includes a nonlinear process model that models a nonlinear process in a signal processing system, such as a nonlinear plant. The nonlinear delta-sigma modulator includes a feedback model that models the nonlinear process being controlled and facilitates spectral shaping to shift noise out of a baseband in a spectral domain of a response signal of the nonlinear process. In at least one embodiment, the nonlinear delta-sigma modulator is part of a control system that controls power factor correction and output voltage of a switching power converter. The control system controls the pulse width and period of a control signal to control power factor correction and the output voltage level. In at least one embodiment, the nonlinear delta-sigma modulator generates a signal to control the pulse width of the control signal.
摘要翻译：控制系统包括非线性Δ-Σ调制器，并且非线性Δ-Σ调制器包括在诸如非线性工厂的信号处理系统中对非线性处理进行建模的非线性过程模型。非线性Δ-Σ调制器包括对被控制的非线性过程进行建模的反馈模型，并且有助于频谱整形以将噪声从非线性过程的响应信号的频谱域中的基带移出。在至少一个实施例中，非线性Δ-Σ调制器是控制开关功率转换器的功率因数校正和输出电压的控制系统的一部分。控制系统控制控制信号的脉冲宽度和周期，以控制功率因数校正和输出电压电平。在至少一个实施例中，非线性Δ-Σ调制器产生一个信号来控制控制信号的脉冲宽度。

99. 发明申请

US20080272758A1 Switching Power Converter with Switch Control Pulse Width Variability at Low Power Demand Levels 有权
标题翻译：具有开关控制的开关电源转换器低功率需求级别的脉冲宽度变化
公开(公告)号：US20080272758A1
公开(公告)日：2008-11-06
申请号：US12114130
申请日：2008-05-02
申请人： John L. Melanson
发明人： John L. Melanson
IPC分类号： G05F1/575
CPC分类号： H02M1/4225 , H03M3/476 , Y02B70/126 , Y02P80/112
摘要： A power control system includes a switch mode controller to control the switching mode of a switching power converter. The switch mode controller generates a switch control signal that controls conductivity of a switch of the switching power converter. Controlling conductivity of the switch controls the switch mode of the switching power converter. The switch mode controller includes a period generator to determine a period of the switch control signal and to vary the determined period to generate a broad frequency spectrum of the switch control signal when the determined period corresponds with a frequency in at least a portion of an audible frequency band. Generating a switch control signal with a broad frequency spectrum in the audible frequency band allows the system to utilize switching frequencies in the audible frequency band.
摘要翻译：功率控制系统包括用于控制开关功率转换器的开关模式的开关模式控制器。开关模式控制器产生控制开关功率转换器的开关的电导率的开关控制信号。控制开关电导率控制开关电源转换器的开关模式。开关模式控制器包括周期发生器，用于确定开关控制信号的周期，并且当所确定的周期对应于可听见的至少一部分中的频率时，改变所确定的周期以产生开关控制信号的宽频谱频带。在可听频带中产生具有宽频谱的开关控制信号允许系统利用可听频带中的开关频率。

100. 发明申请

US20080272757A1 POWER SUPPLY DC VOLTAGE OFFSET DETECTOR 有权
标题翻译：电源直流电压偏移检测器
公开(公告)号：US20080272757A1
公开(公告)日：2008-11-06
申请号：US11967277
申请日：2007-12-31
申请人： John L. Melanson
发明人： John L. Melanson
IPC分类号： G05F1/10
CPC分类号： H02M1/4225 , H03M3/476 , Y02B70/126 , Y02P80/112
摘要： A power supply output voltage direct current (DC) offset detector determines a DC offset in a power supply output voltage signal, and the output voltage signal has a DC component and an alternating current (AC) “ripple” component. Once during each period of the ripple, the DC offset detector determines the DC offset from an output voltage signal using a comparison between the output voltage signal and a reference voltage. In at least one embodiment, from the comparison and during a period of the ripple, the DC offset detector determines an ‘above’ duration for which the ripple is above the reference voltage, determines a ‘below’ duration for which the ripple is below the reference voltage, or both to determine the DC offset of the power supply output voltage signal. The DC offset detector uses the above and/or below duration(s) to determine the DC offset of the output voltage signal.
摘要翻译：电源输出电压直流（DC）偏移检测器确定电源输出电压信号中的直流偏移，输出电压信号具有直流分量和交流（AC）“纹波”分量。一旦在纹波的每个周期期间，直流偏移检测器使用输出电压信号和参考电压之间的比较来确定来自输出电压信号的直流偏移。在至少一个实施例中，从比较起，在纹波周期期间，直流偏移检测器确定纹波高于参考电压的“高于”持续时间，确定纹波低于参考电压或两者以确定电源输出电压信号的直流偏移。 DC偏移检测器使用上述和/或以下持续时间来确定输出电压信号的DC偏移。

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