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    • 92. 发明授权
    • Color filtering device for improved brightness
    • 彩色滤光装置,提高亮度
    • US07916246B2
    • 2011-03-29
    • US12720583
    • 2010-03-09
    • Dong-Ho LeeYong-Ho Yang
    • Dong-Ho LeeYong-Ho Yang
    • G02F1/1335
    • G02F1/133514G02F1/133555G02F2001/133519
    • A color filtering member for improving the brightness of a display device is presented. The color filtering member includes colored regions (e.g., regions with RBG color filters) and black-and-white regions for transmitting white light. The black-and-white regions may be colorless gaps between adjacent colored regions. Multiple planarizing layers may be deposited on the colored regions and the black-and-white regions to form a surface that is sufficiently even. The color filtering member may include an intercepting region that extends between neighboring colored regions. The position of the intercepting region is not centered between the two colored regions that it separates. Rather, the intercepting region is shifted in the direction of rubbing (in the direction of liquid crystal alignment) to more effectively cover the regions where light leakage occurs. This color filtering member may be combined with an array member and a liquid crystal layer to form a display device.
    • 提出了一种用于提高显示装置的亮度的滤色构件。 滤色构件包括着色区域(例如具有RBG滤色器的区域)和用于透射白光的黑白区域。 黑色和白色区域可以是相邻着色区域之间的无色间隙。 可以在着色区域和黑色和白色区域上沉积多个平坦化层以形成足够均匀的表面。 滤色构件可以包括在相邻的着色区域之间延伸的截取区域。 拦截区域的位置不在其分离的两个着色区域之间。 相反,截止区域沿着摩擦方向(在液晶取向方向)移动,以更有效地覆盖发生漏光的区域。 该滤色构件可以与阵列构件和液晶层组合以形成显示装置。
    • 93. 发明授权
    • Multi-chip package for reducing parasitic load of pin
    • 用于减少引脚寄生负载的多芯片封装
    • US07868438B2
    • 2011-01-11
    • US12238894
    • 2008-09-26
    • Byung-Se SoDong-Ho LeeHyun-Soon Jang
    • Byung-Se SoDong-Ho LeeHyun-Soon Jang
    • H01L23/02H01L21/44H01L21/48H01L21/50
    • H01L24/49G11C5/00G11C5/06H01L23/50H01L24/48H01L2224/05553H01L2224/48091H01L2224/49113H01L2924/00014H01L2924/01006H01L2924/01055H01L2924/01075H01L2924/30105H01L2224/45099H01L2224/05599
    • Multi-chip package includes first through Nth semiconductor chips, each of which includes an input/output pad, an input/output driver coupled to the input/output pad, and an internal circuit. Each of the first through Nth semiconductor chips includes an internal pad for coupling the internal input/output driver and the internal circuit. The internal pads of the first through Nth semiconductor chips are coupled to each other such as via a common pad installed at a substrate. The input/output pad of the first semiconductor chip directly receives an input/output signal transmitted via a corresponding pin of the multi-chip package. The second through Nth semiconductor chips indirectly receive the input/output signal via the internal pads coupled to each other. The multi-chip package can improve signal compatibility by maintaining a parasitic load of a pin to at least the level of a single chip, when a signal is transmitted to the pin at high speed. Also, when a signal that is not necessarily transmitted at high speed is applied to a pin, semiconductor chips can be packaged according to the preexisting methods.
    • 多芯片封装包括第一至第N个半导体芯片,每个半导体芯片包括输入/​​输出焊盘,耦合到输入/输出焊盘的输入/输出驱动器和内部电路。 第一至第N半导体芯片中的每一个包括用于耦合内部输入/输出驱动器和内部电路的内部焊盘。 第一至第N半导体芯片的内部焊盘彼此耦合,例如经由安装在基板上的公共焊盘。 第一半导体芯片的输入/输出焊盘直接接收通过多芯片封装的相应引脚传输的输入/输出信号。 第二至第N半导体芯片通过彼此耦合的内部焊盘间接接收输入/输出信号。 当信号以高速传输到引脚时,多芯片封装可以通过将引脚的寄生负载保持在至少单个芯片的电平来提高信号兼容性。 此外,当不需要高速传输的信号被施加到引脚时,可以根据预先存在的方法来封装半导体芯片。