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    • 91. 发明授权
    • Semiconductor device, display device and electronic device
    • 半导体器件,显示器件和电子器件
    • US07663578B2
    • 2010-02-16
    • US11620345
    • 2007-01-05
    • Hiroyuki Miyake
    • Hiroyuki Miyake
    • G09G5/00
    • G09G3/3258G09G2300/0857G09G2310/0251G09G2310/0262G09G2320/029G09G2320/041G09G2320/043
    • A potential which is applied to a gate electrode of a driving transistor in accordance with an emission state or a non-emission state of a light-emitting element fluctuates due to noise or leakage from a selection transistor, or the like, which causes a problem in that the driving transistor cannot turn on or off normally and malfunctions. The present invention includes a transistor connected to a light-emitting element, a power source line, a scan line, a memory circuit, and a switching circuit, in which the transistor controls light emission or non light emission of the light-emitting element, and the switching circuit controlled by the scan line conducts switching between the transistor, and the memory circuit and the power source line, and applies an input potential to the transistor.
    • 根据发光元件的发光状态或非发光状态施加到驱动晶体管的栅电极的电位由于选择晶体管等的噪声或泄漏而波动,这导致问题 因为驱动晶体管不能正常导通或断开,故障。 本发明包括连接到发光元件的晶体管,电源线,扫描线,存储器电路和开关电路,其中晶体管控制发光元件的发光或非发光, 并且由扫描线控制的开关电路导通晶体管与存储器电路与电源线之间的切换,并向晶体管施加输入电位。
    • 95. 发明申请
    • Liquid Crystal Display Device
    • 液晶显示装置
    • US20070109247A1
    • 2007-05-17
    • US11622510
    • 2007-01-12
    • Jun KOYAMATomoaki AtsumiHiroyuki Miyake
    • Jun KOYAMATomoaki AtsumiHiroyuki Miyake
    • G09G3/36
    • G09G3/3648G09G3/3677G09G3/3688G09G2300/0809G09G2300/0828G09G2300/0842G09G2300/0857
    • A liquid crystal display device with low power consumption is provided. In the liquid crystal display device having a source signal line driver circuit, a gate signal line driver circuit, a DAC controller, and a pixel portion and performing an image display using an n-bit (n is a natural number, n≧2) digital image signal, one pixel has memory circuits for storing an n-bit digital image signal and a D/A converter, and the n-bit digital image signal for one frame can be stored in the pixel. In case of a static image display, the image signal stored in the memory circuits is read out every frame to perform the display, and thus, only a DAC controller is driven during the display. Therefore, this contributes to a reduction of the power consumption of the entire liquid crystal display device.
    • 提供具有低功耗的液晶显示装置。 在具有源极信号线驱动电路,栅极信号线驱动电路,DAC控制器和像素部分的液晶显示装置中,使用n位(n为自然数,n> = 2)进行图像显示 )数字图像信号,一个像素具有用于存储n位数字图像信号和D / A转换器的存储电路,并且用于一帧的n位数字图像信号可以存储在像素中。 在静态图像显示的情况下,每帧读出存储在存储器电路中的图像信号以进行显示,因此在显示期间仅驱动DAC控制器。 因此,这有助于降低整个液晶显示装置的功耗。
    • 98. 发明申请
    • Pulse Output Circuit, Shift Register and Electronic Equipment
    • 脉冲输出电路,移位寄存器和电子设备
    • US20060280279A1
    • 2006-12-14
    • US11467022
    • 2006-08-24
    • Shou NagaoYoshifumi TanadaYutaka ShionoiriHiroyuki Miyake
    • Shou NagaoYoshifumi TanadaYutaka ShionoiriHiroyuki Miyake
    • G11C19/00
    • G11C19/28G09G3/3688G09G2310/0275G11C19/00
    • A driver circuit of a display device, which includes TFTs of a single conductivity type and outputs an output signal with normal amplitude. A pulse is inputted to TFTs 101 and 104 to turn ON the TFTs and a potential of a node α is raised. When the potential of the node α reaches (VDD−VthN), the node α becomes in a floating state. Accordingly, a TFT 105 is turned ON and a potential of an output node is raised as a clock signal becomes High level. On the other hand, a potential of a gate electrode of the TFT 105 is further raised due to an operation of a capacitance means 107 as the potential of the output node is raised, so that the potential of the gate electrode of the TFT 105 becomes higher than (VDD+VthN). Thus, the potential of the output node is raised to VDD without causing a voltage drop due to a threshold voltage of the TFT 105. An output at the subsequent stage is then inputted to a TFT 103 to turn the TFT 103 ON, while the potential of the node α of TFTs 102 and 106 is dropped to turn the TFT 105 OFF. As a result, the potential of the output node becomes Low level.
    • 一种显示装置的驱动电路,其包括单导电类型的TFT并输出具有正常振幅的输出信号。 一个脉冲被输入到TFT101和104,使TFT导通,并且提高节点α的电位。 当节点α的电位达到(VDD-VthN)时,节点α变为浮动状态。 因此,随着时钟信号变为高电平,TFT 105导通,输出节点的电位升高。 另一方面,随着输出节点的电位升高,由于电容装置107的操作,TFT 105的栅电极的电位进一步上升,使得TFT 105的栅电极的电位变为 高于(VDD + VthN)。 因此,输出节点的电位升高到VDD,而不会由于TFT 105的阈值电压引起电压降。 然后,随后阶段的输出被输入到TFT 103以使TFT 103导通,同时TFT 102和106的节点α的电位下降以使TFT 105关闭。 结果,输出节点的电位变为低电平。