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91. 发明授权

US08276151B2 Determination of running status of logical processor 有权
标题翻译：确定逻辑处理器的运行状态
公开(公告)号：US08276151B2
公开(公告)日：2012-09-25
申请号：US11470487
申请日：2006-09-06
申请人： Greg A. Dyck , Mark S. Farrell , Charles W. Gainey , Jeffrey P. Kubala , Robert R. Rogers , Mark A. Wisniewski
发明人： Greg A. Dyck , Mark S. Farrell , Charles W. Gainey , Jeffrey P. Kubala , Robert R. Rogers , Mark A. Wisniewski
IPC分类号： G06F9/46 , G06F13/00
CPC分类号： G06F9/52 , G06F9/4843 , G06F9/5077
摘要： A method is provided for a first logical processor to determine a running status of a target logical processor of an information processing system. In such method, an instruction is issued by the first logical processor running on the information processing system for determining whether the target logical processor is running. In response to issuing the instruction, a state descriptor belonging to the target logical processor is queried to determine whether the target logical processor is currently running. A result is then returned to the first logical processor, the result indicating whether or not the target logical processor is currently running.
摘要翻译：提供了一种用于第一逻辑处理器来确定信息处理系统的目标逻辑处理器的运行状态的方法。在这种方法中，在信息处理系统上运行的第一逻辑处理器发出用于确定目标逻辑处理器是否正在运行的指令。响应于发出指令，查询属于目标逻辑处理器的状态描述符，以确定目标逻辑处理器当前是否正在运行。然后将结果返回到第一逻辑处理器，结果指示目标逻辑处理器当前是否正在运行。

92. 发明申请

US20120173917A1 PERFORMING A PERFORM TIMING FACILITY FUNCTION INSTRUCTION FOR SYNCHRONIZING TOD CLOCKS 有权
标题翻译：执行同步时钟功能的功能指令同步时钟
公开(公告)号：US20120173917A1
公开(公告)日：2012-07-05
申请号：US13402554
申请日：2012-02-22
申请人： Eberhard Engler , Mark S. Farrell , Klaus Meissner , Ronald M. Smith, SR. , Mark A. Check , Evangelyn K. Smith
发明人： Eberhard Engler , Mark S. Farrell , Klaus Meissner , Ronald M. Smith, SR. , Mark A. Check , Evangelyn K. Smith
IPC分类号： G06F1/04 , G04C11/00
CPC分类号： G06F1/14
摘要： A system, method and computer program product for steering a time-of-day (TOD) clock for a computer system having a physical clock providing a time base for executing operations that is stepped to a common oscillator. The method includes receiving, at a processing unit, a request to change a clock steering rate used to control a TOD-clock offset value for the processing unit, the TOD-clock offset defined as a function of a start time (s), a base offset (b), and a steering rate (r). The unit schedules a next episode start time with which to update the TOD-clock offset value. After updating TOD-clock offset value (d) at the scheduled time, TOD-clock offset value is added to a physical-clock value (Tr) value to obtain a logical TOD-clock value (Tb), where the logical TOD-clock value is adjustable without adjusting a stepping rate of the oscillator.
摘要翻译：一种用于转向具有物理时钟的计算机系统的时钟（TOD）时钟的系统，方法和计算机程序产品，该物理时钟提供用于执行步进到公共振荡器的操作的时基。该方法包括在处理单元处接收用于改变用于控制处理单元的TOD时钟偏移值的时钟转向速率的请求，定义为开始时间的函数的TOD时钟偏移量，基本偏移（b）和转向率（r）。该单元安排下一个开始时间来更新TOD时钟偏移值。在预定时间更新TOD时钟偏移值（d）后，将TOD时钟偏移值加到物理时钟值（Tr）值，以获得逻辑TOD时钟值（Tb），其中逻辑TOD时钟值可调节，而不需要调整振荡器的步进速率。

93. 发明授权

US08176301B2 Millicode assist instructions for millicode store access exception checking 有权
标题翻译： Millicode帮助指令用于millicode存储访问异常检查
公开(公告)号：US08176301B2
公开(公告)日：2012-05-08
申请号：US12031756
申请日：2008-02-15
申请人： Mark S. Farrell , Bruce C. Giamei , Chung-Lung Kevin Shum
发明人： Mark S. Farrell , Bruce C. Giamei , Chung-Lung Kevin Shum
IPC分类号： G06F9/30 , G06F9/40 , G06F7/38 , G06F9/00 , G06F9/44
CPC分类号： G06F9/3017 , G06F9/30003 , G06F9/30043 , G06F9/30101 , G06F9/3824 , G06F9/3861
摘要： Millicode store access checking instructions are provided via an operand access control register (OACR) including a test modifier indicator, which is communicatively coupled to an instruction unit subsystem, the instruction unit subsystem for fetching and decoding instructions. The instructions include a millicode instruction with an operand defining an address to check for a store access exception. In addition, an execution unit for executing the millicode instruction performs a method. The method includes receiving the millicode instruction from the instruction unit subsystem, testing for the store access exception at the address as if the test modifier is set absent an update to the OACR, and outputting a result of the testing for the store access exception.
摘要翻译：经由操作数访问控制寄存器（OACR）提供Millicode存储访问检查指令，该操作数访问控制寄存器（OACR）包括通信地耦合到指令单元子系统的指令单元子系统，用于获取和解码指令。该指令包括一个具有操作数的millicode指令，其中定义了一个地址来检查存储访问异常。另外，用于执行millicode指令的执行单元执行一种方法。该方法包括从指令单元子系统接收millicode指令，测试地址处的存储访问异常，就好像将测试修饰符设置为不存在对OACR的更新，并输出用于存储访问异常的测试结果。

94. 发明申请

US20120036338A1 FACILITATING PROCESSING IN A COMPUTING ENVIRONMENT USING AN EXTENDED DRAIN INSTRUCTION 有权
标题翻译：使用更多的排水指令在计算环境中实现加工
公开(公告)号：US20120036338A1
公开(公告)日：2012-02-09
申请号：US13273320
申请日：2011-10-14
申请人： Khary J. Alexander , Fadi Y. Busaba , Mark S. Farrell , Bruce C. Giamei , Timothy J. Slegel , Charles F. Webb
发明人： Khary J. Alexander , Fadi Y. Busaba , Mark S. Farrell , Bruce C. Giamei , Timothy J. Slegel , Charles F. Webb
IPC分类号： G06F9/30
CPC分类号： G06F9/30079 , G06F9/30145 , G06F9/3867
摘要： An extended DRAIN instruction is used to stall processing within a computing environment. The instruction includes an indication of the one or more processing stages at which processing is to be stalled. It also includes a control that allows processing to be stalled for additional cycles, as desired.
摘要翻译：扩展DRAIN指令用于在计算环境中停止处理。该指令包括处理被停止的一个或多个处理阶段的指示。它还包括一个控制，允许根据需要使处理停滞在额外的周期。

95. 发明申请

US20110283280A1 Executing an Instruction for Performing a Configuration Virtual Topology Change 有权
标题翻译：执行执行配置虚拟拓扑更改的指令
公开(公告)号：US20110283280A1
公开(公告)日：2011-11-17
申请号：US13193641
申请日：2011-07-29
申请人： Mark S. Farrell , Charles W. Gainey, JR. , Jeffrey P. Kubala , Donald W. Schmidt
发明人： Mark S. Farrell , Charles W. Gainey, JR. , Jeffrey P. Kubala , Donald W. Schmidt
IPC分类号： G06F9/455 , G06F15/76
CPC分类号： G06F9/5077 , G06F9/30003 , G06F9/44505 , G06F15/76
摘要： In a logically partitioned host computer system comprising host processors (host CPUs) partitioned into a plurality of guest processors (guest CPUs) of a guest configuration, a perform topology function instruction is executed by a guest processor specifying a topology change of the guest configuration. The topology change preferably changes the polarization of quest CPUs, the polarization related to the amount of a host CPU resource is provided to a guest CPU.
摘要翻译：在包括分配到客户配置的多个客体处理器（客户CPU）的主机处理器（主机CPU）的逻辑分区主机计算机系统中，执行拓扑功能指令由客户处理器执行，指定客户配置的拓扑变化。拓扑变化优选地改变任务CPU的极化，与主CPU资源量相关的极化提供给客户CPU。

96. 发明授权

US07984341B2 Method, system and computer program product involving error thresholds 有权
标题翻译：涉及误差阈值的方法，系统和计算机程序产品
公开(公告)号：US07984341B2
公开(公告)日：2011-07-19
申请号：US12036697
申请日：2008-02-25
申请人： Rebecca S. Wisniewski , Mark S. Farrell , Patrick J. Meaney
发明人： Rebecca S. Wisniewski , Mark S. Farrell , Patrick J. Meaney
IPC分类号： G06F11/00
CPC分类号： G06F11/0721 , G06F11/076
摘要： A system for processing errors in a processor comprising, an error counter, a pass counter, and a processing portion operative to determine whether a first error is active, increment an error counter responsive to determining that the first error is active, increment the pass counter responsive to determining that all errors have been checked, and clear the error counter responsive to determining that the pass counter is greater than or equal to a pass count threshold value.
摘要翻译：一种用于处理处理器中的错误的系统，包括：错误计数器，通过计数器和可操作以确定第一错误是否有效的处理部分，响应于确定第一错误是活动的，增加错误计数器，增加通过计数器响应于确定已经检查了所有错误，并且响应于确定通过计数器大于或等于通过计数阈值来清除错误计数器。

97. 发明授权

US07739434B2 Performing a configuration virtual topology change and instruction therefore 有权
标题翻译：因此，执行配置虚拟拓扑更改和指令
公开(公告)号：US07739434B2
公开(公告)日：2010-06-15
申请号：US11972766
申请日：2008-01-11
申请人： Mark S. Farrell , Charles W. Gainey, Jr. , Jeffrey P. Kubala , Donald W. Schmidt
发明人： Mark S. Farrell , Charles W. Gainey, Jr. , Jeffrey P. Kubala , Donald W. Schmidt
IPC分类号： G06F13/00 , G06F15/00 , G06F15/76 , G06F9/455
CPC分类号： G06F9/5077 , G06F9/30003 , G06F9/44505 , G06F15/76
摘要： In a logically partitioned host computer system comprising host processors (host CPUs) partitioned into a plurality of guest processors (guest CPUs) of a guest configuration, a perform topology function instruction is executed by a guest processor specifying a topology change of the guest configuration. The topology change preferably changes the polarization of guest CPUs, the polarization related to the amount of a host CPU resource is provided to a guest CPU.
摘要翻译：在包括分配到客户配置的多个客体处理器（客户CPU）的主机处理器（主机CPU）的逻辑分区主机计算机系统中，执行拓扑功能指令由客户处理器执行，指定客户配置的拓扑变化。拓扑变化优选地改变客户CPU的极化，与提供给客户CPU的主机CPU资源量相关的极化。

98. 发明申请

US20090217108A1 METHOD, SYSTEM AND COMPUTER PROGRAM PRODUCT FOR PROCESSING ERROR INFORMATION IN A SYSTEM 有权
标题翻译：用于处理系统中的错误信息的方法，系统和计算机程序产品
公开(公告)号：US20090217108A1
公开(公告)日：2009-08-27
申请号：US12036745
申请日：2008-02-25
申请人： Patrick J. Meaney , Mark S. Farrell , Liyong Wang , Rebecca S. Wisniewski
发明人： Patrick J. Meaney , Mark S. Farrell , Liyong Wang , Rebecca S. Wisniewski
IPC分类号： G06F11/00
CPC分类号： G06F11/0769 , G06F11/0721
摘要： A system for processing errors in a processor comprising, a first register having a unique identifier operative to store a first error data, a processor operative to retrieve the first error data from the first register, associate the first error data with the unique identifier, and generate a first uniform error packet including the first error data and the unique identifier and a storage medium operative to store the first uniform error packet.
摘要翻译：一种用于处理处理器中的错误的系统，包括：第一寄存器，具有用于存储第一错误数据的唯一标识符;可操作以从第一寄存器检索第一错误数据的处理器将第一错误数据与唯一标识符相关联;以及产生包括第一错误数据和唯一标识符的第一均匀错误包，以及可操作地存储第一均匀错误包的存储介质。

99. 发明授权

US07356725B2 Method and apparatus for adjusting a time of day clock without adjusting the stepping rate of an oscillator 有权
标题翻译：用于调整时钟的时钟而不调整振荡器的步进速率的方法和装置
公开(公告)号：US07356725B2
公开(公告)日：2008-04-08
申请号：US11223886
申请日：2005-09-09
申请人： Eberhard Engler , Mark S. Farrell , Klaus Meissner , Ronald M. Smith, Sr.
发明人： Eberhard Engler , Mark S. Farrell , Klaus Meissner , Ronald M. Smith, Sr.
IPC分类号： G06F1/04 , G04C11/00
CPC分类号： G06F1/14
摘要： A system, method and computer program product for steering a time-of-day (TOD) clock for a computer system having a physical clock providing a time base for executing operations that is stepped to a common oscillator. The method includes computing a TOD-clock offset value (d) to be added to a physical-clock value (Tr) value to obtain a logical TOD-clock value (Tb), where the logical TOD-clock value is adjustable without adjusting a stepping rate of the oscillator.
摘要翻译：一种用于转向具有物理时钟的计算机系统的时钟（TOD）时钟的系统，方法和计算机程序产品，该物理时钟提供用于执行步进到公共振荡器的操作的时基。该方法包括计算要添加到物理时钟值（Tr）值的TOD时钟偏移值（d）以获得逻辑TOD时钟值（Tb），其中逻辑TOD时钟值可调整而不调整振荡器的步进率。

100. 发明授权

US06662296B1 Method and system for testing millicode branch points 有权
标题翻译：用于测试millicode分支点的方法和系统
公开(公告)号：US06662296B1
公开(公告)日：2003-12-09
申请号：US09677231
申请日：2000-10-02
申请人： Mark S. Farrell , John S. Liptay , Charles F. Webb
发明人： Mark S. Farrell , John S. Liptay , Charles F. Webb
IPC分类号： G06F926
CPC分类号： G06F9/30094 , G06F9/30145 , G06F9/3017 , G06F9/322
摘要： An exemplary embodiment of the present invention is a method and system for reducing the number of branch instructions required to test combinations of millicode branch points. The method is implemented via a pipe-lined computer processor executing a millicode routine. The processor interrogates a millicode condition code; interrogates a first field of the TMBP instruction, the results of which determine a logical function to be performed on the millicode condition code; interrogates a second field of the TMBP instruction which specifies a first millicode branch point; interrogates a third field of the TMBP instruction, which specifies a second millicode branch point; and sets a millicode condition code based upon the results of the interrogating and used for executing subsequent TMBP instructions or conditional branch instructions.
摘要翻译：本发明的示例性实施例是用于减少测试毫分支点的组合所需的分支指令的数量的方法和系统。该方法通过执行millicode例程的管道式计算机处理器来实现。处理器询问一个millicode条件代码; 询问TMBP指令的第一个字段，其结果确定要对毫代数条件代码执行的逻辑功能; 询问指定第一毫分支点的TMBP指令的第二字段; 询问TMBP指令的第三个字段，其指定第二个毫分支点; 并根据询问的结果设置一个millicode条件代码，并用于执行后续TMBP指令或条件转移指令。

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