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91. 发明申请

US20030047745A1 GaP-base semiconductor light emitting device 失效
标题翻译： GaP基半导体发光器件
公开(公告)号：US20030047745A1
公开(公告)日：2003-03-13
申请号：US10227840
申请日：2002-08-27
申请人： Shin-Etsu Handotai Co., Ltd.
发明人： Kingo Suzuki , Hitoshi Ikeda , Yasutsugu Kaneko
IPC分类号： H01L033/00
CPC分类号： H01L33/30 , H01L24/32 , H01L33/22 , H01L2224/32245 , H01L2224/32257 , H01L2224/45144 , H01L2224/48091 , H01L2224/48247 , H01L2224/73265 , H01L2224/92247 , H01L2924/00014 , H01L2924/00
摘要： The main surface on the side of a p-type layer of a GaP-base semiconductor is defined as a first main surface, and the main surface opposite thereto as a second main surface. The second main surface is lapped and then etched using aqua regia to thereby collectively form thereon specular concave curved surfaces which swell inwardly into the semiconductor substrate in order to enhance total reflection of light. On the other hand, the area on the surface of semiconductor substrate excluding that for forming a first contact layer and excluding the second main surface are subjected to anisotropic etching to thereby collectively form outwardly-swelling convex curved surfaces in order to reduce total reflection of light. A second contact layer (second electrode) to be formed on the second main surface is composed of an alloy of Au, Si and Ni, and a first contact layer to be formed on the first main surface is composed of an alloy of Au as combined with either of Be and Zn. This successfully provides a GaP-base semiconductor light emitting device which can ensure a satisfactory level of improvement in the luminance even though the emission mechanism thereof relies upon indirect transition.
摘要翻译： GaP基半导体的p型层侧的主表面被定义为第一主表面，与其相对的主表面作为第二主表面。第二主表面被研磨，然后用王水蚀刻，从而在其上共同形成镜面凹入的曲面，其向内膨胀到半导体衬底中，以增强光的全反射。另一方面，除了用于形成第一接触层并且不包括第二主表面的半导体衬底的表面上的区域进行各向异性蚀刻，从而共同形成向外膨胀的凸曲面，以减少光的全反射。要形成在第二主表面上的第二接触层（第二电极）由Au，Si和Ni的合金构成，并且在第一主表面上形成的第一接触层由合并的Au构成与Be和Zn中的任一个。这成功地提供了一种GaP基半导体发光器件，其能够确保亮度的令人满意的改善水平，即使其发光机制依赖于间接转换。

92. 发明申请

US20010014544A1 Semiconductor producing apparatus and producing method for epitaxial wafer using same 审中-公开
公开(公告)号：US20010014544A1
公开(公告)日：2001-08-16
申请号：US09818597
申请日：2001-03-28
申请人： Shin-Etsu Handotai, Co., Ltd.
发明人： Norimichi Tanaka , Yutaka Ohta
IPC分类号： H01L021/00
CPC分类号： H01L21/67051 , C23C16/0227 , C30B25/02 , C30B29/06 , Y10S438/906
摘要： By perfectly preventing a particle from being attached on a silicon wafer or a silicon epitaxial wafer before and after the silicon epitaxial growth, pit formation on the silicon epitaxial layer in RCA cleaning is prevented from occurring. A pretreatment chamber, a vapor phase growth chamber and an aftertreatment chamber are mutually connected by a transport path whose interior is clean while being isolated from the outside environment. In the pretreatment chamber, megasonic cleaning using O3 added water is conducted (step S2); in the vapor growth chamber, removal of a chemical silicon oxide film C by pre-bake (step S4) and formation of a high quality silicon epitaxial layer E are conducted (step S5); and in the aftertreatment chamber, passivation of the silicon epitaxial layer E is conducted by O3 water cleaning or SC1 cleaning (step S7). Since a wafer surface is always covered by the chemical silicon oxide film C in transportation after formation of the silicon epitaxial layer E, direct attachment of fine metal particles M which each are a cause of pit formation is prevented from occurring.

93. 发明公开

US20240321617A1 CLEAN ROOM 审中-公开
公开(公告)号：US20240321617A1
公开(公告)日：2024-09-26
申请号：US18572929
申请日：2022-06-20
申请人： SHIN-ETSU HANDOTAI CO., LTD.
发明人： Seiji SATOH
IPC分类号： H01L21/677 , F24F3/167 , F24F13/06
CPC分类号： H01L21/67769 , F24F3/167 , F24F13/06 , H01L21/6773
摘要： The present invention is a clean room including a stocker area in which an article management storage is installed, in which the article management storage includes an upper opening part and a lower flow-out port configured to adjust the aperture ratio, a ceiling of the stocker area includes an eyelid and an air outlet port, the upper opening part of the article management storage and the air outlet port are connected to each other so as to be surrounded by the eyelid, and the clean room is configured that air supplied from the air outlet port is directly supplied into the article management storage through the upper opening part and is discharged from the lower flow-out port. This can provide the clean room that can keep the inside of the article management storage clean with almost no additional cost and without reducing the storing volume in the article management storage.

94. 发明公开

US20240321576A1 NITRIDE SEMICONDUCTOR SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME 审中-公开
公开(公告)号：US20240321576A1
公开(公告)日：2024-09-26
申请号：US18579934
申请日：2022-07-19
申请人： SHIN-ETSU HANDOTAI CO., LTD.
发明人： Kazunori HAGIMOTO , Ippei KUBONO
IPC分类号： H01L21/02 , H01L29/20
CPC分类号： H01L21/0254 , H01L21/0242 , H01L21/0245 , H01L21/02458 , H01L21/02488 , H01L21/02505 , H01L29/2003
摘要： A nitride semiconductor substrate including: a composite substrate with multiple layers stacked, a silicon oxide layer or a TEOS layer having a central flat surface and a side surface around the flat surface and stacked on the composite substrate; a single crystal silicon layer stacked on the silicon oxide layer or the TEOS layer, and a nitride semiconductor thin film deposited on the single crystal silicon layer, wherein the entire central flat surface of the silicon oxide layer or the TEOS layer is covered with the single crystal silicon layer.

95. 发明公开

US20240274477A1 METHOD FOR FORMING THERMAL OXIDE FILM ON SEMICONDUCTOR SUBSTRATE AND METHOD FOR PRODUCING SEMICONDUCTOR DEVICE 审中-公开
公开(公告)号：US20240274477A1
公开(公告)日：2024-08-15
申请号：US18566907
申请日：2022-06-06
申请人： SHIN-ETSU HANDOTAI CO., LTD.
发明人： Tsuyoshi OHTSUKI , Tatsuo ABE
IPC分类号： H01L21/66 , H01L21/02 , H01L21/67
CPC分类号： H01L22/20 , H01L21/0206 , H01L21/02164 , H01L21/02238 , H01L21/02255 , H01L21/67028
摘要： The present invention provides a method for forming a thermal oxide film, comprising the steps of: a step of acquiring a first correlation between an amount of OH groups and thickness of the thermal oxide film by forming a thermal oxide film by thermal oxidation treatment under the same condition after preparing a plurality of semiconductor substrates having chemical oxide films formed by cleaning and having different amounts of OH groups; a step of acquiring a second correlation between an amount of OH groups and drying conditions by cleaning under the same cleaning condition followed by changed drying conditions to substrates and measuring amounts of OH groups; a step of acquiring a third correlation between drying condition and thickness of thermal oxide film by using the first correlation and the second correlation; a step of determining drying condition and thermal oxidation condition by using the third correlation; a step of cleaning the substrates; and a step of drying and a thermal oxide film formation after the cleaning step using the drying conditions and thermal oxidation treatment conditions determined in the drying and thermal oxidation treatment condition determination step. This provides a method for forming thermal oxide film in which a thermal oxide film can be formed with intended thickness with good reproducibility while without changing the composition of the cleaning chemical solution.

96. 发明公开

US20240203745A1 SILICON WAFER MANUFACTURING METHOD 审中-公开
公开(公告)号：US20240203745A1
公开(公告)日：2024-06-20
申请号：US18286691
申请日：2022-03-16
申请人： SHIN-ETSU HANDOTAI CO., LTD.
发明人： Tatsuo ABE , Yuki TANAKA
IPC分类号： H01L21/304 , H01L21/02 , H01L21/3065
CPC分类号： H01L21/304 , H01L21/02019 , H01L21/02024 , H01L21/3065
摘要： The present invention is a silicon wafer manufacturing method including a grinding step of grinding front and back surfaces of a raw wafer to obtain a wafer having an arithmetic surface roughness Sa per 2 μm2 of 10 nm or less; a dry-etching step of subjecting the wafer obtained in the grinding step to isotropic whole-surface dry-etching with an etching removal of 1 μm or less per surface to remove a mechanically damaged layer introduced into each of front and back surfaces of the wafer in the grinding step; and a double-side polishing step of, after the dry-etching step, polishing both surfaces of the wafer with a stock removal of 3 μm or less per surface. Thus, the silicon wafer manufacturing method that enables to manufacture a wafer having high flatness can be provided.

97. 发明公开

US20240162041A1 METHOD FOR PRODUCING NITRIDE SEMICONDUCTOR WAFER 审中-公开
公开(公告)号：US20240162041A1
公开(公告)日：2024-05-16
申请号：US18284615
申请日：2022-03-16
申请人： SHIN-ETSU HANDOTAI CO., LTD.
发明人： Kazunori HAGIMOTO , Junya ISHIZAKI , Tsuyoshi OHTSUKI
IPC分类号： H01L21/263 , H01L21/02
CPC分类号： H01L21/263 , H01L21/02658 , H01L21/02381 , H01L21/02458 , H01L21/0254
摘要： A method for producing a nitride semiconductor wafer by forming a nitride semiconductor film on a silicon single-crystal substrate, including the steps of forming the nitride semiconductor film on the silicon single-crystal substrate and irradiating the silicon single-crystal substrate with electron beams with an irradiation dose of 1×1014/cm2 or more. A method produces a nitride semiconductor wafer in which a nitride semiconductor film is formed on a silicon single-crystal substrate, and in which a loss and a second harmonic characteristic due to the substrate are improved.

98. 发明公开

US20240076800A1 SINGLE CRYSTAL PULLING APPARATUS AND METHOD FOR PULLING SINGLE CRYSTAL 审中-公开
公开(公告)号：US20240076800A1
公开(公告)日：2024-03-07
申请号：US18272253
申请日：2021-11-22
申请人： SHIN-ETSU HANDOTAI CO., LTD.
发明人： Hiroyuki KAMADA , Kiyotaka TAKANO
IPC分类号： C30B30/04 , C30B15/20 , C30B29/06
CPC分类号： C30B30/04 , C30B15/20 , C30B29/06
摘要： A single crystal pulling apparatus includes: a pulling furnace having a central axis; and magnetic field generating apparatus around the pulling furnace and having coils, for applying a horizontal magnetic field to molten semiconductor raw material to suppress convection in crucible, in which, main coils and sub-coils are provided, as the main coils, two pairs of coils arranged facing each other are provided, two coil axes thereof are included in the same horizontal plane, a center angle α between the two coil axes sandwiching the X-axis, which is a magnetic force line direction on the central axis in the horizontal plane, is 100 degrees or more and 120 degrees or less, as the sub-coils, a pair of superconducting coils arranged to face each other is provided and its one coil axis is aligned with the X-axis, and current values of the main coils and the sub-coils can be set independently.

99. 发明授权

US11878385B2 Method for slicing ingot 有权
公开(公告)号：US11878385B2
公开(公告)日：2024-01-23
申请号：US16490737
申请日：2018-03-02
申请人： SHIN-ETSU HANDOTAI CO., LTD.
发明人： Keiichi Kanbayashi
IPC分类号： B24B27/06 , B28D5/04 , B24B55/02 , B24B41/02
CPC分类号： B24B27/0633 , B24B55/02 , B28D5/04 , B24B41/02
摘要： A method for slicing an ingot with a wire saw, comprising: forming a wire row by a wire spirally wound between a plurality of wire guides and configured to travel in an axial direction of the wire; feeding an ingot held with a workpiece-feeding mechanism to the wire row for slicing; and slicing the ingot into a plurality of wafers, while supplying a slurry to a contact portion between the ingot and the wire, wherein a warp direction in a wire travelling direction of a wafer obtained in previous ingot slicing is checked in advance, and the ingot is then sliced under a condition that a warp direction in a workpiece feeding direction of a wafer to be obtained matches the checked warp direction in the wire travelling direction, so that the wafers have identical warp directions in the workpiece feeding direction and in the wire travelling direction.

100. 发明公开

US20230330804A1 SINGLE-SIDE POLISHING APPARATUS, SINGLE-SIDE POLISHING METHOD, AND POLISHING PAD 审中-公开
公开(公告)号：US20230330804A1
公开(公告)日：2023-10-19
申请号：US18012711
申请日：2021-05-24
申请人： SHIN-ETSU HANDOTAI CO., LTD.
发明人： Junichi UENO , Kaoru ISHII
IPC分类号： B24B37/20
CPC分类号： B24B37/20
摘要： A single-side polishing apparatus including: a base turntable having a groove for vacuum suction; a detachable polishing turntable immobilized by vacuum suction; a polishing pad; and a polishing head configured to hold a wafer. The single-side polishing apparatus brings a surface of a wafer held by the polishing head into sliding contact with the polishing pad for polishing. The polishing pad includes a polishing layer configured to polish the wafer surface, a first adhesive layer, a PET sheet layer, a second adhesive layer, an elastic layer, and a third adhesive layer for attachment to the polishing turntable. The layers are sequentially stacked. The polishing pad has a compressibility of 16% or more.

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