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91. 发明申请

US20090166870A1 METAL LINE OF SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME 失效
标题翻译：金属线半导体器件及其形成方法
公开(公告)号：US20090166870A1
公开(公告)日：2009-07-02
申请号：US12326374
申请日：2008-12-02
申请人： Jeong Tae KIM , Seung Jin YEOM , Baek Mann KIM , Dong Ha JUNG
发明人： Jeong Tae KIM , Seung Jin YEOM , Baek Mann KIM , Dong Ha JUNG
IPC分类号： H01L23/52 , H01L21/4763
CPC分类号： H01L23/53238 , H01L21/76807 , H01L21/76843 , H01L21/76846 , H01L21/76856 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： A metal line of a semiconductor device includes an insulation layer formed on a semiconductor substrate and having a metal line forming region. A diffusion barrier is formed on a surface of the metal line forming region of the insulation layer. The diffusion barrier has a multi-layered structure of a V layer, a VxNy layer and a VxNyOz layer. A metal layer is formed on the diffusion barrier to fill the metal line forming region of the insulation layer.
摘要翻译：半导体器件的金属线包括形成在半导体衬底上并具有金属线形成区域的绝缘层。在绝缘层的金属线形成区域的表面上形成扩散阻挡层。扩散势垒具有V层，VxNy层和VxNyOz层的多层结构。在扩散阻挡层上形成金属层以填充绝缘层的金属线形成区域。

92. 发明申请

US20090001578A1 METAL LINE OF SEMICONDUCTOR DEVICE HAVING A DIFFUSION BARRIER WITH AN AMORPHOUS TaBN LAYER AND METHOD FOR FORMING THE SAME 有权
标题翻译：具有无定形TaBN层的扩散阻挡层的半导体器件的金属线及其形成方法
公开(公告)号：US20090001578A1
公开(公告)日：2009-01-01
申请号：US11939666
申请日：2007-11-14
申请人： Dong Ha JUNG , Seung Jin YEOM , Baek Mann KIM , Young Jin LEE , Jeong Tae KIM
发明人： Dong Ha JUNG , Seung Jin YEOM , Baek Mann KIM , Young Jin LEE , Jeong Tae KIM
IPC分类号： H01L23/52 , H01L21/4763
CPC分类号： H01L23/53238 , H01L21/76843 , H01L21/76846 , H01L21/76856 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： A metal line in a semiconductor device includes an insulation layer formed on a semiconductor substrate. A metal line forming region is formed in the insulation layer. A metal line is formed to fill the metal line forming region of the insulation layer. And a diffusion barrier that includes an amorphous TaBN layer is formed between the metal line and the insulation layer. The amorphous TaBN layer prevents a copper component from diffusing into the semiconductor substrate, thereby improving upon the characteristics and the reliability of a device.
摘要翻译：半导体器件中的金属线包括形成在半导体衬底上的绝缘层。在绝缘层中形成金属线形成区域。形成金属线以填充绝缘层的金属线形成区域。并且在金属线和绝缘层之间形成包括非晶态TaBN层的扩散阻挡层。无定形TaBN层防止铜成分扩散到半导体衬底中，从而改善器件的特性和可靠性。

93. 发明申请

US20080272490A1 Semiconductor device including ruthenium electrode and method for fabricating the same 有权
标题翻译：包括钌电极的半导体器件及其制造方法
公开(公告)号：US20080272490A1
公开(公告)日：2008-11-06
申请号：US11978604
申请日：2007-10-30
申请人： Jin-Hyock Kim , Jae-Sung Roh , Seung-Jin Yeom , Kee-Jeung Lee , Han-Sang Song , Deok-Sin Kil , Young-Dae Kim
发明人： Jin-Hyock Kim , Jae-Sung Roh , Seung-Jin Yeom , Kee-Jeung Lee , Han-Sang Song , Deok-Sin Kil , Young-Dae Kim
IPC分类号： H01L23/48 , H01L21/44
CPC分类号： H01L21/32136 , H01L21/32115 , H01L21/76843 , H01L21/76865 , H01L28/65
摘要： A semiconductor device includes a semiconductor substrate, an insulation pattern on the semiconductor substrate, and an etch stop layer on the insulating pattern, the insulation pattern and the etch stop layer defining a contact hole that exposes the substrate, a first plug filled in a portion of the contact hole, a diffusion barrier layer formed above the first plug and in a bottom portion and on sidewalls of a remaining portion of the contact hole, a second plug formed on the diffusion barrier layer and filled in the contact hole, and a storage node coupled to and formed on the second plug.
摘要翻译：半导体器件包括半导体衬底，半导体衬底上的绝缘图案和绝缘图案上的蚀刻停止层，绝缘图案和蚀刻停止层限定暴露衬底的接触孔，第一插头填充在部分在所述第一插头上形成的扩散阻挡层，在所述接触孔的剩余部分的底部和侧壁上形成的扩散阻挡层，形成在所述扩散阻挡层上并填充在所述接触孔中的第二插塞，耦合到并形成在第二插头上的节点。

94. 发明授权

US07446053B2 Capacitor with nano-composite dielectric layer and method for fabricating the same 有权
标题翻译：具有纳米复合介电层的电容器及其制造方法
公开(公告)号：US07446053B2
公开(公告)日：2008-11-04
申请号：US11326064
申请日：2005-12-30
申请人： Deok-Sin Kil , Kwon Hong , Seung-Jin Yeom
发明人： Deok-Sin Kil , Kwon Hong , Seung-Jin Yeom
IPC分类号： H01L21/28 , H01L21/44
CPC分类号： H01G4/1218 , H01G4/12 , H01G4/1236 , H01G4/206 , H01L28/40 , Y10S977/70 , Y10S977/902
摘要： A capacitor with a nano-composite dielectric layer and a method for fabricating the same are provided. A dielectric layer of a capacitor includes a nano-composite layer formed by mixing X number of different sub-layers, X being a positive integer greater than approximately 1. A method for forming a dielectric layer of a capacitor includes: forming a nano-composite layer by mixing X number of different sub-layers in the form of a nano-composition, X being a positive integer greater than approximately 1; and densifying the nano-composite layer.
摘要翻译：提供具有纳米复合介电层的电容器及其制造方法。电容器的电介质层包括通过混合X个不同子层形成的纳米复合层，X是大于约1的正整数。形成电容器的电介质层的方法包括：形成纳米复合材料通过以纳米组合物的形式混合X个不同子层的X层，X为大于约1的正整数; 并使纳米复合层致密化。

95. 发明申请

US20080003741A1 Method for fabricating a cylindrical capacitor using amorphous carbon-based layer 失效
标题翻译：使用无定形碳基层制造圆柱形电容器的方法
公开(公告)号：US20080003741A1
公开(公告)日：2008-01-03
申请号：US11646481
申请日：2006-12-28
申请人： Ki-Seon Park , Jae-Sung Roh , Deok-Sin Kil , Han-Sang Song , Seung-Jin Yeom , Jin-Hyock Kim , Kee-Jeung Lee
发明人： Ki-Seon Park , Jae-Sung Roh , Deok-Sin Kil , Han-Sang Song , Seung-Jin Yeom , Jin-Hyock Kim , Kee-Jeung Lee
IPC分类号： H01L21/8244
CPC分类号： H01L28/91 , H01L27/10852
摘要： A method for fabricating a cylindrical capacitor. The method includes forming an isolation structure including an interlayer on a substrate, the substrate having a plurality of contact plugs formed therein, forming a plurality of opening regions by etching the isolation structure, thereby exposing selected portions of the contact plugs, forming storage nodes on a surface of the opening regions, etching selected portions of the isolation structure to form a patterned interlayer that encompasses selected portions of the storage nodes, thereby supporting the storage nodes, removing remaining portions of the isolation structure, and removing the patterned interlayer to expose inner and outer walls of the storage nodes.
摘要翻译：一种制造圆柱形电容器的方法。所述方法包括在基板上形成包括中间层的隔离结构，所述基板具有形成在其中的多个接触塞，通过蚀刻隔离结构形成多个开口区域，从而暴露接触塞的选定部分，形成储存节点蚀刻开口区域的表面，蚀刻隔离结构的选定部分以形成包围存储节点的选定部分的图案化中间层，从而支撑存储节点，去除隔离结构的剩余部分，以及去除图案化中间层以暴露内部和存储节点的外壁。

96. 发明申请

US20070001201A1 Capacitor with nano-composite dielectric layer and method for fabricating the same 有权
标题翻译：具有纳米复合介电层的电容器及其制造方法
公开(公告)号：US20070001201A1
公开(公告)日：2007-01-04
申请号：US11326064
申请日：2005-12-30
申请人： Deok-Sin Kil , Kwon Hong , Seung-Jin Yeom
发明人： Deok-Sin Kil , Kwon Hong , Seung-Jin Yeom
IPC分类号： H01L29/94 , H01L29/00
CPC分类号： H01G4/1218 , H01G4/12 , H01G4/1236 , H01G4/206 , H01L28/40 , Y10S977/70 , Y10S977/902
摘要： A capacitor with a nano-composite dielectric layer and a method for fabricating the same are provided. A dielectric layer of a capacitor includes a nano-composite layer formed by mixing X number of different sub-layers, X being a positive integer greater than approximately 1. A method for forming a dielectric layer of a capacitor includes: forming a nano-composite layer by mixing X number of different sub-layers in the form of a nano-composition, X being a positive integer greater than approximately 1; and densifying the nano-composite layer.
摘要翻译：提供具有纳米复合介电层的电容器及其制造方法。电容器的电介质层包括通过混合X个不同子层形成的纳米复合层，X是大于约1的正整数。形成电容器的电介质层的方法包括：形成纳米复合材料通过以纳米组合物的形式混合X个不同子层的X层，X为大于约1的正整数; 并使纳米复合层致密化。

97. 发明申请

US20060183301A1 Method for forming thin film 审中-公开
标题翻译：薄膜形成方法
公开(公告)号：US20060183301A1
公开(公告)日：2006-08-17
申请号：US11321538
申请日：2005-12-30
申请人： Seung-Jin Yeom , Deok-Sin Kil , Kwon Hong , Jae-Sung Roh
发明人： Seung-Jin Yeom , Deok-Sin Kil , Kwon Hong , Jae-Sung Roh
IPC分类号： H01L21/20
CPC分类号： C23C16/45525 , C23C16/45527 , C23C16/45542 , H01L21/28562 , H01L21/3141 , H01L27/10817 , H01L27/10852 , H01L27/11502 , H01L27/11507 , H01L28/65 , H01L28/91
摘要： A method for forming a thin film by using an atomic layer deposition (ALD) method and a method for fabricating a capacitor using the same includes: supplying a source gas, a reaction gas, and a purge gas, then discontinuing the supply of the reaction gas and the source gas, followed by supplying and then discontinuing the supply of the reaction gas, wherein supplying the source gas, the reaction gas, and the purge gas, then discontinuing the supply of the reaction gas and the source gas, followed by supplying and then discontinuing the supply of the reaction gas constitutes a unit cycle, and repeating the unit cycle until a thin film having a desired thickness is deposited.
摘要翻译：通过使用原子层沉积（ALD）法和使用其制造电容器的方法形成薄膜的方法包括：供应源气体，反应气体和吹扫气体，然后停止反应的供应气体和源气体，然后供应然后停止反应气体的供应，其中供应源气体，反应气体和吹扫气体，然后停止反应气体和源气体的供应，然后供应然后停止反应气体的供给构成单位循环，并重复单位循环，直到沉积具有期望厚度的薄膜。

98. 发明授权

US06913967B2 Ferroelectric memory device with merged-top plate structure and method for fabricating the same 有权
标题翻译：具有合并顶板结构的铁电存储器件及其制造方法
公开(公告)号：US06913967B2
公开(公告)日：2005-07-05
申请号：US10623098
申请日：2003-07-18
申请人： Eun-Seok Choi , Seung-Jin Yeom
发明人： Eun-Seok Choi , Seung-Jin Yeom
IPC分类号： H01L21/8242 , H01L21/02 , H01L21/8246 , H01L27/115
CPC分类号： H01L27/11502 , H01L27/11507 , H01L28/55 , H01L28/57 , H01L28/60 , H01L28/65 , H01L28/75
摘要： The inventive ferroelectric memory device includes: a semiconductor substrate providing elements of a transistor; a first inter-layer insulating layer formed on the semiconductor substrate; a storage node contact connected to elements of the transistor by passing through the first inter-layer insulating layer; a barrier layer contacting simultaneously to the storage node contact and the first inter-layer insulating layer; a lower electrode having a space for isolating the first inter-layer insulating layer and being formed on the barrier layer; a glue layer being formed on the first inter-layer insulating layer and encompassing lateral sides of the lower electrode as filling the space; a second inter-layer insulating layer exposing a surface of the lower electrode and encompassing the glue layer; a ferroelectric layer formed on the glue layer including the second inter-layer insulating layer; and an upper electrode formed on the ferroelectric layer.
摘要翻译：本发明的铁电存储器件包括：提供晶体管元件的半导体衬底; 形成在所述半导体基板上的第一层间绝缘层; 通过穿过所述第一层间绝缘层而连接到所述晶体管的元件的存储节点接触; 与所述存储节点接触部和所述第一层间绝缘层同时接触的阻挡层; 具有用于隔离所述第一层间绝缘层并形成在所述阻挡层上的空间的下电极; 胶层在第一层间绝缘层上形成，并且在下部电极的横向侧面填充空间; 第二层间绝缘层，暴露下电极的表面并包围胶层; 形成在包括第二层间绝缘层的胶层上的铁电层; 以及形成在强电介质层上的上电极。

99. 发明授权

US06891211B2 Ferroelectric random access memory device and method for fabricating the same 有权
标题翻译：铁电随机存取存储器件及其制造方法
公开(公告)号：US06891211B2
公开(公告)日：2005-05-10
申请号：US10612914
申请日：2003-07-07
申请人： Seung-Jin Yeom , Eun-Seok Choi
发明人： Seung-Jin Yeom , Eun-Seok Choi
IPC分类号： H01L27/105 , H01L21/8246 , H01L27/115 , H01L31/062
CPC分类号： H01L27/11502 , H01L27/11507
摘要： The present invention is related to a ferroelectric memory device and a method for fabricating the same. The ferroelectric memory device includes: a substrate providing a transistor; a first insulation material with a plane surface formed on the substrate; a storage node contact passing through the first insulation material to contact to an active region of the substrate; a lower electrode being connected to the storage node contact and including a solid solution layer disposed at least as an upper most layer, the solid solution layer being doped with a metal element, which is induced to be in a solid solution state; a second insulation material having a plane surface that exposes a surface of the lower electrode, encompassing the lower electrode and being formed on the first insulation material; a ferroelectric layer covering the second insulation material including the lower electrode; an upper electrode formed on the ferroelectric layer.
摘要翻译：本发明涉及铁电存储器件及其制造方法。铁电存储器件包括：提供晶体管的衬底; 在所述基板上形成有平面的第一绝缘材料; 存储节点接触件穿过所述第一绝缘材料以接触所述衬底的有源区; 下部电极连接到存储节点接触并且包括至少设置为最上层的固溶体层，所述固溶体层掺杂有被诱导为固溶状态的金属元素; 第二绝缘材料，其具有暴露下部电极的表面的平面，包围下部电极并形成在第一绝缘材料上; 覆盖包括下电极的第二绝缘材料的铁电层; 形成在强电介质层上的上电极。

100. 发明申请

US20050006683A1 Capacitor and method for fabricating ferroelectric memory device with the same 审中-公开
标题翻译：具有相同的制造铁电存储器件的电容器和方法
公开(公告)号：US20050006683A1
公开(公告)日：2005-01-13
申请号：US10899171
申请日：2004-07-27
申请人： Nam-Kyeong Kim , Soon-Yong Kweon , Seung-Jin Yeom
发明人： Nam-Kyeong Kim , Soon-Yong Kweon , Seung-Jin Yeom
IPC分类号： H01L27/105 , H01L21/02 , H01L21/8246 , H01L27/115 , H01L29/76
CPC分类号： H01L27/11502 , H01L27/11507 , H01L28/56
摘要： The present invention provides a ferroelectric memory device capable of suppressing a defect generation due to a charge impact and a method for fabricating the same. The ferroelectric memory device includes: a semiconductor substrate on which a transistor is formed; a semiconductor substrate structure having a transistor; a lower electrode formed on an interfacial insulation layer and connected to a source/drain region of the transistor; an isolating insulation layer on the interfacial insulation layer; a ferroelectric layer covering the isolating insulation layer and lower electrode; an oxygen vacancy compensation layer being formed on the ferroelectric layer and compensating an oxygen vacancy caused by deoxidization of a composition of the ferroelectric layer; and an upper electrode formed on the oxygen vacancy compensation layer.
摘要翻译：本发明提供能够抑制由电荷冲击引起的缺陷产生的铁电存储器件及其制造方法。铁电存储器件包括：形成晶体管的半导体衬底; 具有晶体管的半导体衬底结构; 形成在界面绝缘层上并连接到晶体管的源/漏区的下电极; 界面绝缘层上的隔离绝缘层; 覆盖隔离绝缘层和下电极的铁电层; 在所述铁电层上形成氧空位补偿层，并且补偿由所述铁电层的组合物脱氧引起的氧空位; 以及形成在氧空位补偿层上的上电极。

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