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    • 9. 发明申请
    • ACCESS SIGNAL ADJUSTMENT CIRCUITS AND METHODS FOR MEMORY CELLS IN A CROSS-POINT ARRAY
    • 交叉点信息调整电路和存储单元的方法
    • US20150179250A1
    • 2015-06-25
    • US14624891
    • 2015-02-18
    • Unity Semiconductor Corporation
    • Christophe J. ChevallierChang Hua Siau
    • G11C13/00
    • G11C13/0033G11C11/21G11C13/0011G11C13/003G11C13/004G11C13/0069
    • Embodiments of the invention relate generally to semiconductors and memory technology, and more particularly, to systems, integrated circuits, and methods to generate access signals to facilitate memory operations in scaled arrays of memory elements, such as memory implemented in third dimensional memory technology formed BEOL directly on top of a FEOL substrate that includes data access circuitry. In at least some embodiments, a non-volatile memory device can include a cross-point array having resistive memory elements disposed among word lines and subsets of bit lines, and an access signal generator. The access signal generator can be configured to modify a magnitude of a signal to generate a modified magnitude for the signal to access a resistive memory element associated with a word line and a subset of bit lines. The modified magnitude can be a function of the position of the resistive memory element in the cross-point array.
    • 本发明的实施例一般涉及半导体和存储器技术,更具体地涉及系统,集成电路和方法,用于产生存取信号以促进存储器元件的按比例排列的存储器操作,诸如在形成的第三维存储器技术中实现的存储器 直接位于包含数据访问电路的FEOL基板之上。 在至少一些实施例中,非易失性存储器件可以包括具有布置在字线和位线子集之间的电阻性存储器元件的交叉点阵列和存取信号发生器。 访问信号发生器可被配置为修改信号的大小以产生用于信号访问与字线和位线子集相关联的电阻性存储器元件的修改幅度。 修改的幅度可以是交叉点阵列中的电阻性存储元件的位置的函数。