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1. 发明授权

US08063488B2 Semiconductor device and manufacturing method thereof 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08063488B2
公开(公告)日：2011-11-22
申请号：US12382992
申请日：2009-03-27
申请人： Yoshio Itoh , Yoshimasa Kushima , Hirokazu Uchida
发明人： Yoshio Itoh , Yoshimasa Kushima , Hirokazu Uchida
IPC分类号： H01L23/498 , H01L23/28
CPC分类号： H01L24/11 , H01L21/561 , H01L23/3114 , H01L23/3135 , H01L24/12 , H01L2224/05001 , H01L2224/05008 , H01L2224/05022 , H01L2224/05024 , H01L2224/274 , H01L2924/01078 , H01L2924/10157 , H01L2924/14 , H01L2924/181 , H01L2924/00
摘要： The semiconductor device comprises a first area and a second area positioned adjacent to the outside of the first area, the semiconductor substrate having a main surface and side surfaces and disposed in such a manner that the main surface is positioned in the first area and each of the side surfaces is positioned at a boundary between the first area and the second area, a plurality of pads formed over the main surface of the semiconductor substrate and a plurality of external connecting terminals formed thereon, which are respectively electrically connected to the pads, a first resin portion which is formed over the main surface of the semiconductor substrate so as to cover the pads and has a main surface and side surfaces, and which is formed in such a manner that the external connecting terminals are exposed from the main surface and each of the side surfaces is positioned at the boundary, and a second resin portion which is positioned in the second area and formed so as to cover the side surfaces of the semiconductor substrate and the side surfaces of the first resin portion and which is different in composition from the first resin portion.
摘要翻译：半导体器件包括与第一区域的外部相邻定位的第一区域和第二区域，半导体衬底具有主表面和侧表面，并且以这样的方式设置，使得主表面位于第一区域中，并且每个侧表面位于第一区域和第二区域之间的边界处，形成在半导体衬底的主表面上的多个焊盘和形成在其上的多个外部连接端子，其分别电连接到焊盘，第一树脂部分，其形成在半导体衬底的主表面上以覆盖焊盘并且具有主表面和侧表面，并且形成为使得外部连接端子从主表面暴露并且每个所述侧表面位于所述边界处，并且所述第二树脂部分位于所述第二区域中并形成为覆盖所述第二区域所述半导体衬底的侧表面和所述第一树脂部分的侧表面与所述第一树脂部分的组成不同。

2. 发明申请

US20120100693A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：US20120100693A1
公开(公告)日：2012-04-26
申请号：US13241353
申请日：2011-09-23
申请人： Yoshio ITOH , Yoshimasa Kushima , Hirokazu Uchida
发明人： Yoshio ITOH , Yoshimasa Kushima , Hirokazu Uchida
IPC分类号： H01L21/78
CPC分类号： H01L24/11 , H01L21/561 , H01L23/3114 , H01L23/3135 , H01L24/12 , H01L2224/05001 , H01L2224/05008 , H01L2224/05022 , H01L2224/05024 , H01L2224/274 , H01L2924/01078 , H01L2924/10157 , H01L2924/14 , H01L2924/181 , H01L2924/00
摘要： A method for manufacturing a semiconductor device formed by fractionization and division after a plurality of semiconductor elements are formed over a semiconductor substrate, includes forming a first resist portion over the semiconductor substrate prior to its fractionization. Trenches are formed in areas for dicing the semiconductor substrate. A second resin portion different in composition from the first resin portion is formed in each of the trenches. The semiconductor substrate is diced with respect to the second resin portion with widths each narrower than the trench thereby to bring the semiconductor device into fractionization and division.
摘要翻译：在半导体衬底上形成用于制造在多个半导体元件之后通过分级分割形成的半导体器件的方法，包括在其分级之前在半导体衬底上形成第一抗蚀剂部分。沟槽形成在用于切割半导体衬底的区域中。在每个沟槽中形成有与第一树脂部分不同的第二树脂部分。相对于具有窄于沟槽的宽度的第二树脂部分切割半导体衬底，从而使半导体器件分级和分割。

3. 发明申请

US20090243094A1 Semiconductor device and manufacturing method thereof 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US20090243094A1
公开(公告)日：2009-10-01
申请号：US12382992
申请日：2009-03-27
申请人： Yoshio Itoh , Yoshimasa Kushima , Hirokazu Uchida
发明人： Yoshio Itoh , Yoshimasa Kushima , Hirokazu Uchida
IPC分类号： H01L23/498 , H01L23/28
CPC分类号： H01L24/11 , H01L21/561 , H01L23/3114 , H01L23/3135 , H01L24/12 , H01L2224/05001 , H01L2224/05008 , H01L2224/05022 , H01L2224/05024 , H01L2224/274 , H01L2924/01078 , H01L2924/10157 , H01L2924/14 , H01L2924/181 , H01L2924/00
摘要： The semiconductor device comprises a first area and a second area positioned adjacent to the outside of the first area, the semiconductor substrate having a main surface and side surfaces and disposed in such a manner that the main surface is positioned in the first area and each of the side surfaces is positioned at a boundary between the first area and the second area, a plurality of pads formed over the main surface of the semiconductor substrate and a plurality of external connecting terminals formed thereon, which are respectively electrically connected to the pads, a first resin portion which is formed over the main surface of the semiconductor substrate so as to cover the pads and has a main surface and side surfaces, and which is formed in such a manner that the external connecting terminals are exposed from the main surface and each of the side surfaces is positioned at the boundary, and a second resin portion which is positioned in the second area and formed so as to cover the side surfaces of the semiconductor substrate and the side surfaces of the first resin portion and which is different in composition from the first resin portion.
摘要翻译：半导体器件包括与第一区域的外部相邻定位的第一区域和第二区域，半导体衬底具有主表面和侧表面，并且以这样的方式设置，使得主表面位于第一区域中，并且每个侧表面位于第一区域和第二区域之间的边界处，形成在半导体衬底的主表面上的多个焊盘和形成在其上的多个外部连接端子，其分别电连接到焊盘，第一树脂部分，其形成在半导体衬底的主表面上以覆盖焊盘并且具有主表面和侧表面，并且形成为使得外部连接端子从主表面暴露并且每个所述侧表面位于所述边界处，并且所述第二树脂部分位于所述第二区域中并形成为覆盖所述第二区域所述半导体衬底的侧表面和所述第一树脂部分的侧表面与所述第一树脂部分的组成不同。

4. 发明申请

US20100151628A1 MANUFACTURING METHOD FOR SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件的制造方法
公开(公告)号：US20100151628A1
公开(公告)日：2010-06-17
申请号：US12636924
申请日：2009-12-14
申请人： Yoshimasa Kushima
发明人： Yoshimasa Kushima
IPC分类号： H01L21/56
CPC分类号： H01L21/6836 , H01L21/30625 , H01L21/561 , H01L23/16 , H01L23/24 , H01L23/3114 , H01L23/3135 , H01L23/562 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/94 , H01L2221/6834 , H01L2224/0401 , H01L2224/16 , H01L2224/94 , H01L2224/11 , H01L2224/03
摘要： An improved manufacturing method for semiconductor devices is provided. This method can prevent chips and cracks from being generated when the rear face of the semiconductor substrate is polished. The manufacturing method includes preparing a semiconductor substrate having a front face and a rear face. The front face has an inner surface area and a peripheral surface area. Circuit elements are provided in the inner surface area of the semiconductor substrate. The manufacturing method also includes sealing the circuit elements with circuit sealing resin. The manufacturing method also includes providing cured resin in the peripheral surface area of the semiconductor substrate. The manufacturing method also includes polishing the rear face of the semiconductor substrate after the circuit sealing step. The manufacturing method also includes cutting the semiconductor substrate after the substrate polishing step so as to obtain semiconductor devices.
摘要翻译：提供了一种用于半导体器件的改进的制造方法。该方法可以防止在半导体基板的背面被抛光时产生切屑和裂纹。制造方法包括制备具有前表面和后表面的半导体衬底。前表面具有内表面积和外围表面积。电路元件设置在半导体衬底的内表面区域中。制造方法还包括用电路密封树脂密封电路元件。该制造方法还包括在半导体衬底的外周表面区域提供固化树脂。该制造方法还包括在电路密封步骤之后抛光半导体衬底的背面。制造方法还包括在基板研磨步骤之后切割半导体基板，以获得半导体器件。

5. 发明授权

US08298864B2 Manufacturing method for semiconductor device 有权
标题翻译：半导体器件的制造方法
公开(公告)号：US08298864B2
公开(公告)日：2012-10-30
申请号：US12636924
申请日：2009-12-14
申请人： Yoshimasa Kushima
发明人： Yoshimasa Kushima
IPC分类号： H01L21/00
CPC分类号： H01L21/6836 , H01L21/30625 , H01L21/561 , H01L23/16 , H01L23/24 , H01L23/3114 , H01L23/3135 , H01L23/562 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/94 , H01L2221/6834 , H01L2224/0401 , H01L2224/16 , H01L2224/94 , H01L2224/11 , H01L2224/03
摘要： An improved manufacturing method for semiconductor devices is provided. This method can prevent chips and cracks from being generated when the rear face of the semiconductor substrate is polished. The manufacturing method includes preparing a semiconductor substrate having a front face and a rear face. The front face has an inner surface area and a peripheral surface area. Circuit elements are provided in the inner surface area of the semiconductor substrate. The manufacturing method also includes sealing the circuit elements with circuit sealing resin. The manufacturing method also includes providing cured resin in the peripheral surface area of the semiconductor substrate. The manufacturing method also includes polishing the rear face of the semiconductor substrate after the circuit sealing step. The manufacturing method also includes cutting the semiconductor substrate after the substrate polishing step so as to obtain semiconductor devices.
摘要翻译：提供了一种用于半导体器件的改进的制造方法。该方法可以防止在半导体基板的背面被抛光时产生切屑和裂纹。制造方法包括制备具有前表面和后表面的半导体衬底。前表面具有内表面积和外围表面积。电路元件设置在半导体衬底的内表面区域中。制造方法还包括用电路密封树脂密封电路元件。该制造方法还包括在半导体衬底的外周表面区域提供固化树脂。该制造方法还包括在电路密封步骤之后抛光半导体衬底的背面。制造方法还包括在基板研磨步骤之后切割半导体基板，以获得半导体器件。

6. 发明申请

US20060154447A1 Method for manufacturing semiconductor device 失效
标题翻译：制造半导体器件的方法
公开(公告)号：US20060154447A1
公开(公告)日：2006-07-13
申请号：US11330996
申请日：2006-01-13
申请人： Yoshimasa Kushima , Tadashi Yamaguchi
发明人： Yoshimasa Kushima , Tadashi Yamaguchi
IPC分类号： H01L21/78 , H01L21/301
CPC分类号： H01L21/78 , H01L2224/96
摘要： A method for manufacturing a semiconductor device comprises the steps of forming protruded electrodes on a plurality chip areas of a semiconductor wafer having the plurality of chip areas and boundary regions formed among the chip areas, both being provided in a surface of the semiconductor wafer, forming a surface-side protective member so as to cover the surface of the semiconductor wafer and the protruded electrodes, removing the semiconductor wafer corresponding to the boundary regions and forming trenches which expose the surface-side protective member, forming a back-side protective member with which the trenches are filled and which covers the back of the semiconductor wafer, and dividing the semiconductor wafer in the boundary regions with widths thinner than those of the trenches in such a manner that the surface-side protective member and the back-side protective member charged into the trenches are left in cut sections.
摘要翻译：一种制造半导体器件的方法包括以下步骤：在具有形成在芯片区域之间的多个芯片区域和边界区域的半导体晶片的多个芯片区域上形成突起电极，两者设置在半导体晶片的表面中，形成表面侧保护构件，以覆盖半导体晶片和突出电极的表面，去除对应于边界区域的半导体晶片，并形成暴露表面侧保护构件的沟槽，形成背面保护构件，形成背面保护构件沟槽被填充并且覆盖半导体晶片的背面，并且以这样的方式将半导体晶片划分在具有比沟槽更薄的边界区域的边界区域中，使得表面侧保护构件和背面保护构件装入沟槽的部分留在切割部分。

7. 发明授权

US07763528B2 Method for manufacturing semiconductor device 失效
标题翻译：制造半导体器件的方法
公开(公告)号：US07763528B2
公开(公告)日：2010-07-27
申请号：US11330996
申请日：2006-01-13
申请人： Yoshimasa Kushima , Tadashi Yamaguchi
发明人： Yoshimasa Kushima , Tadashi Yamaguchi
IPC分类号： H01L21/00
CPC分类号： H01L21/78 , H01L2224/96
摘要： A method for manufacturing a semiconductor device includes forming protruded electrodes on a plurality of chip areas of a semiconductor wafer having the chip areas and boundary regions both being provided in a surface of the semiconductor wafer; forming a surface-side protective member so as to cover the surface of the semiconductor wafer and the protruded electrodes removing the semiconductor wafer corresponding to the boundary regions and forming trenches which expose the surface-side protective member; forming a back-side protective member with which the trenches are filled and which covers the back of the semiconductor wafer; and dividing the semiconductor wafer in the boundary regions with widths thinner than those of the trenches in such a manner that the surface-side protective member and the back-side protective member charged into the trenches are left in cut sections.
摘要翻译：一种制造半导体器件的方法包括：在半导体晶片的多个芯片区域上形成凸起电极，其中芯片区域和边界区域都设置在半导体晶片的表面中; 形成表面侧保护部件，以覆盖半导体晶片的表面和突出的电极去除与边界区域相对应的半导体晶片，并形成暴露表面侧保护部件的沟槽; 形成沟槽被填充并覆盖半导体晶片背面的背面保护构件; 并且在边界区域中划分半导体晶片，其宽度比沟槽的宽度薄，使得充填到沟槽中的表面侧保护构件和背面保护构件留在切割部分中。

8. 发明申请

US20060138657A1 Semiconductor device and fabrication method thereof 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：US20060138657A1
公开(公告)日：2006-06-29
申请号：US11315348
申请日：2005-12-23
申请人： Yoshimasa Kushima
发明人： Yoshimasa Kushima
IPC分类号： H01L23/48
CPC分类号： H01L23/3114 , H01L21/6835 , H01L23/544 , H01L24/02 , H01L24/11 , H01L24/12 , H01L24/81 , H01L2221/6834 , H01L2223/5442 , H01L2223/54426 , H01L2223/5448 , H01L2224/0231 , H01L2224/0401 , H01L2224/1147 , H01L2224/13012 , H01L2224/13099 , H01L2224/81121 , H01L2224/81801 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01018 , H01L2924/01019 , H01L2924/01022 , H01L2924/01029 , H01L2924/01033 , H01L2924/01075 , H01L2924/01078 , H01L2924/01082 , H01L2924/014 , H01L2924/05042
摘要： A semiconductor device has rewiring that is electrically connected to circuit elements on a semiconductor substrate, and a plurality of posts electrically connected to the rewiring. The semiconductor device also has a sealing layer that seals the rewiring and the posts. A column-like identification protrusion whose cross-sectional shape is the shape of an identification mark for identifying the direction of the semiconductor device is provided. The identification protrusion is formed on the rewiring at the same time the posts are created. The end face of the identification protrusion is exposed at the upper face of the sealing layer and used as the identification mark of the semiconductor device.
摘要翻译：半导体器件具有电连接到半导体衬底上的电路元件的重新布线，以及与重新布线电连接的多个柱。半导体器件还具有密封重新布线和柱的密封层。提供了一种柱状识别突起，其横截面形状是用于识别半导体器件的方向的识别标记的形状。在重新布线时形成识别突起，同时产生柱。识别突起的端面在密封层的上表面露出并用作半导体器件的识别标记。

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