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1. 发明授权

US08460971B2 Semiconductor device packaging structure and packaging method 有权
公开(公告)号：US08460971B2
公开(公告)日：2013-06-11
申请号：US12774811
申请日：2010-05-06
申请人： Wen-Hsiung Chang
发明人： Wen-Hsiung Chang
IPC分类号： H01L23/12
CPC分类号： H01L23/49579 , H01L21/561 , H01L23/3128 , H01L23/481 , H01L23/5389 , H01L24/19 , H01L24/20 , H01L2224/12105 , H01L2924/01033 , H01L2924/014
摘要： Exemplary semiconductor device packaging structure and packaging method are provided. The packaging method uses an adhesive layer to bond multiple wafer pieces onto a first surface of a carrier substrate, each adjacent two of the wafer pieces having a gap formed therebetween for exposing a part of the adhesive layer. A packaging layer is filled in each of the gaps. At least one through silicon via is formed each of the wafer pieces to expose a bonding pad formed on an active surface of the wafer pieces. Redistribution circuit layers are formed on back surfaces of the respective wafer pieces and filled into the through silicon vias for electrical connection with the bonding pads. A sawing process is performed to saw starting from each of the packaging layers to a second surface of the carrier substrate, and thereby multiple semiconductor device packaging structures are obtained.

2. 发明授权

US08012797B2 Method for forming stackable semiconductor device packages including openings with conductive bumps of specified geometries 有权
标题翻译：用于形成包括具有指定几何形状的导电凸块的开口的可堆叠半导体器件封装的方法
公开(公告)号：US08012797B2
公开(公告)日：2011-09-06
申请号：US12547063
申请日：2009-08-25
申请人： Chi-Chih Shen , Jen-Chuan Chen , Wen-Hsiung Chang , Chi-Chih Chu , Cheng-Yi Weng
发明人： Chi-Chih Shen , Jen-Chuan Chen , Wen-Hsiung Chang , Chi-Chih Chu , Cheng-Yi Weng
IPC分类号： H01L21/44 , H01L21/48 , H01L21/50
CPC分类号： H01L21/565 , H01L21/4853 , H01L23/3128 , H01L23/49816 , H01L24/45 , H01L24/48 , H01L24/73 , H01L24/97 , H01L25/105 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/45144 , H01L2224/45147 , H01L2224/45565 , H01L2224/45664 , H01L2224/48091 , H01L2224/48145 , H01L2224/48225 , H01L2224/48227 , H01L2224/73204 , H01L2224/73265 , H01L2224/97 , H01L2225/06568 , H01L2225/1023 , H01L2225/1058 , H01L2924/00011 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01015 , H01L2924/01027 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/01051 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/15311 , H01L2924/15321 , H01L2924/15331 , H01L2924/181 , H01L2924/1815 , H01L2924/3511 , H01L2224/85 , H01L2924/00012 , H01L2924/00 , H01L2224/0401 , H01L2224/45015 , H01L2924/207
摘要： In one embodiment, a manufacturing method includes: (1) applying a first electrically conductive material to an upper surface of a substrate to form first conductive bumps; (2) electrically connecting a semiconductor device to the upper surface of the substrate; (3) applying a molding material to form a molded structure covering the first conductive bumps and the semiconductor device, upper ends of the first conductive bumps being recessed below an upper surface of the molded structure; (4) forming openings adjacent to the upper surface of the molded structure, the openings exposing the upper ends of the first conductive bumps; (5) applying, through the openings, a second electrically conductive material to form second conductive bumps; and (6) forming cutting slits extending through the molded structure and the substrate.
摘要翻译：在一个实施例中，制造方法包括：（1）将第一导电材料施加到衬底的上表面以形成第一导电凸块; （2）将半导体器件电连接到衬底的上表面; （3）施加模塑材料以形成覆盖所述第一导电凸块和所述半导体器件的模制结构，所述第一导电凸块的上端在所述模制结构的上表面下方凹入; （4）形成与模制结构的上表面相邻的开口，所述开口暴露第一导电凸块的上端; （5）通过所述开口施加第二导电材料以形成第二导电凸块; 和（6）形成延伸穿过模制结构和基底的切割狭缝。

3. 发明授权

US5722437A Hair clip 失效
标题翻译：发夹
公开(公告)号：US5722437A
公开(公告)日：1998-03-03
申请号：US754038
申请日：1996-12-03
申请人： Wen-Hsiung Chang
发明人： Wen-Hsiung Chang
IPC分类号： A45D8/00 , A45D8/24 , A45D8/26
CPC分类号： A45D8/24 , A45D2008/006
摘要： A hair clip includes a body, a decorative plate changeably fitting in a shallow recess on an upper surface of the body, and a conventional metal clip assembled together. The body has posts to fit in post holes of the metal clip to combine the both together. The decorative plate has projections to engage holes in the body so as to enable the decorative plate easily released for changing it with different colors and designs.
摘要翻译：发夹包括主体，可变地装配在主体上表面上的浅凹槽中的装饰板和组装在一起的常规金属夹。身体具有贴合金属夹子的孔中的柱以将两者结合在一起。装饰板具有用于接合主体中的孔的突起，以便能够容易地将装饰板释放以用不同的颜色和设计改变装饰板。

4. 发明授权

US08946085B2 Semiconductor process and structure 有权
标题翻译：半导体工艺及结构
公开(公告)号：US08946085B2
公开(公告)日：2015-02-03
申请号：US12774823
申请日：2010-05-06
申请人： Wen-Hsiung Chang
发明人： Wen-Hsiung Chang
IPC分类号： H01L29/72 , H01L21/768
CPC分类号： H01L21/76898 , H01L21/76802 , H01L21/76885
摘要： A semiconductor process includes the following steps. Firstly, a conductive substrate is provided. Then, at least one insulating pattern is formed on the conductive substrate. Thereafter at least one metal pattern is formed on the insulating pattern. After that, a passivation layer is formed on the conductive substrate to cover the metal pattern by an electroplating process.
摘要翻译：半导体工艺包括以下步骤。首先，提供导电性基板。然后，在导电基板上形成至少一个绝缘图案。此后，在绝缘图案上形成至少一个金属图案。之后，在导电基板上形成钝化层，以通过电镀工艺覆盖金属图案。

5. 发明申请

US20110285014A1 PACKAGING STRUCTURE AND PACKAGE PROCESS 有权
标题翻译：包装结构和包装过程
公开(公告)号：US20110285014A1
公开(公告)日：2011-11-24
申请号：US12817396
申请日：2010-06-17
申请人： Chi-Chih Shen , Jen-Chuan Chen , Hui-Shan Chang , Wen-Hsiung Chang
发明人： Chi-Chih Shen , Jen-Chuan Chen , Hui-Shan Chang , Wen-Hsiung Chang
IPC分类号： H01L23/498 , H01L21/56
CPC分类号： H01L23/3135 , H01L21/563 , H01L21/76898 , H01L23/3128 , H01L25/0657 , H01L2224/16148 , H01L2224/16227 , H01L2224/32145 , H01L2224/32225 , H01L2224/73204 , H01L2224/81191 , H01L2224/83192 , H01L2225/06548 , H01L2924/15311
摘要： A package structure and a package process are proposed in using pillar bumps to connect an upper second chip and through silicon vias of a lower first chip, wherein a gap between the first chip and the second chip can be controlled by adjusting a height of the pillar bumps. In other words, the pillar bumps compensate the height difference between the first chip and a molding compound surrounding the first chip so as to ensure the bondibility between the pillar bumps and the corresponding through silicon vias and improve the process yield. Furthermore, the pillar bumps maintain the gap between the second chip and the molding compound for allowing an underfill being properly filled into the space between the first chip and the second chip.
摘要翻译：提出了一种封装结构和封装工艺，其中使用柱状突起来连接上部第二芯片和通过下部第一芯片的硅导通孔，其中第一芯片和第二芯片之间的间隙可以通过调节支柱的高度来控制颠簸换句话说，支柱凸块补偿第一芯片和围绕第一芯片的模塑料之间的高度差，以确保柱状凸块与相应的通过硅通孔之间的结合性，并提高工艺产量。此外，支柱凸块保持第二芯片和模塑料之间的间隙，以使底部填充物适当地填充到第一芯片和第二芯片之间的空间中。

6. 发明申请

US20070129101A1 Telecommunication notebook computer 审中-公开
标题翻译：电讯笔记本电脑
公开(公告)号：US20070129101A1
公开(公告)日：2007-06-07
申请号：US11607913
申请日：2006-12-04
申请人： Ming-Chang Wang , Wen-Hsiung Chang , Chad-Cheng Linwu , Yi-Cih Wu
发明人： Ming-Chang Wang , Wen-Hsiung Chang , Chad-Cheng Linwu , Yi-Cih Wu
IPC分类号： H04M1/00
CPC分类号： G06F1/1647 , G06F1/1616 , H04M1/2473 , H04M1/6058 , H04M1/6066 , H04M1/725 , H04M2250/16
摘要： A telecommunication notebook computer functions as a mobile communication apparuatus and a notebook computer with both monitors. There is a mobile communication module configured in the computer system, which electrically configured to the system chipset, I/O system, built-in controller and other devices via the associated bus. The telecommunication notebook computer utilizes a secondary monitor to display a telecommunication frame to achieve the functionality of mobile communication. The functionality displayed on the secondary monitor provides various data including incoming caller information, short messaging alert, email alert, call receiving, voice dialing, virtual keyboard dialing, incoming/outgoing call history and plurality of mobile phone functionality.
摘要翻译：电信笔记本电脑作为移动通信apparuatus和具有两个监视器的笔记本计算机。在计算机系统中配置有移动通信模块，其通过相关联的总线电配置到系统芯片组，I / O系统，内置控制器和其他设备。电信笔记本计算机利用辅助监视器来显示电信帧以实现移动通信的功能。辅助监视器上显示的功能提供各种数据，包括来电信息，短消息通知，电子邮件警报，呼叫接收，语音拨号，虚拟键盘拨号，传入/传出呼叫历史以及多个移动电话功能。

7. 发明授权

US08563405B2 Method for manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US08563405B2
公开(公告)日：2013-10-22
申请号：US12774795
申请日：2010-05-06
申请人： Wen-Hsiung Chang
发明人： Wen-Hsiung Chang
IPC分类号： H01L21/00 , H01L21/44 , H01L21/50
CPC分类号： H01L21/76898 , H01L21/6835 , H01L2221/68327 , H01L2221/6834 , H01L2221/68381
摘要： A method for manufacturing semiconductor device includes the following steps. First, a carrier substrate and a plurality of pieced segments of wafer are provided. Each of the pieced segments of wafer has an active surface and a back surface on opposite sides thereof. Further, there is at least a bonding pad disposed on the active surface. Next, an adhering layer is formed between the carrier substrate and the active surfaces of the pieced segments of wafer, so as to make the pieced segments of wafer adhere to the carrier substrate. Next, a through silicon via is formed in each of the pieced segments of wafer to electrically connect to the bonding pad correspondingly. Then, the pieced segments of wafer are separated from the carrier substrate.
摘要翻译：一种制造半导体器件的方法包括以下步骤。首先，提供载体基板和晶片的多个接头段。晶片的每个接合段具有活性表面和在其相对侧上的后表面。此外，至少存在设置在有源表面上的接合焊盘。接下来，在载体基板和晶片的接合部分的活性表面之间形成粘合层，以使晶片的接头段粘附到载体基板上。接下来，在晶片的每个接合段中形成贯通硅通孔，以相应地电连接到焊盘。然后，晶片的接合部分与载体基板分离。

8. 发明申请

US20120049332A1 SEMICONDUCTOR PACKAGE AND METHOD FOR MANUFACTURING THE SAME 审中-公开
标题翻译：半导体封装及其制造方法
公开(公告)号：US20120049332A1
公开(公告)日：2012-03-01
申请号：US13181278
申请日：2011-07-12
申请人： Jen-Chuan Chen , Hui-Shan Chang , Wen-Hsiung Chang , Wei-Nung Chang
发明人： Jen-Chuan Chen , Hui-Shan Chang , Wen-Hsiung Chang , Wei-Nung Chang
IPC分类号： H01L23/58 , H01L21/82
CPC分类号： H01L25/0657 , H01L24/97 , H01L2224/16225 , H01L2224/97 , H01L2225/06513 , H01L2225/06517 , H01L2225/06548 , H01L2225/06572 , H01L2924/01033 , H01L2924/01075 , H01L2924/01079 , H01L2924/014 , H01L2924/181 , H01L2224/81 , H01L2924/00
摘要： A semiconductor package and method for making the same are provided, wherein a lower chip having a plurality of conductive structures is bonded to an upper surface of a package substrate and a plurality of matrix walls are formed on the upper surface for surrounding the lower chip, such that an overcoat layer covering the matrix walls and the lower chip can be approximately removed after performing a grinding process to the lower chip to expose a plurality of conductive vias of the lower chip. The cleaning step for removing the residue of overcoat layer can be omitted, and the processing yield and the processing efficiency can be improved. The semiconductor package and the method is particularly suitable for stacking a large dimensional upper chip on a relatively small dimensional lower chip.
摘要翻译：提供一种半导体封装及其制造方法，其中具有多个导电结构的下部芯片被结合到封装衬底的上表面，并且在上表面上形成多个矩阵壁以围绕下部芯片，使得覆盖矩阵壁和下部芯片的外涂层可以在对下部芯片进行研磨处理之后大致去除以暴露下部芯片的多个导电通孔。可以省略除去外涂层残渣的清洗工序，可以提高加工量和加工效率。该半导体封装和该方法特别适用于在相对较小尺寸的下部芯片上堆叠大尺寸上部芯片。

9. 发明授权

US08076765B2 Stackable semiconductor device packages including openings partially exposing connecting elements, conductive bumps, or conductive conductors 有权
标题翻译：可堆叠的半导体器件封装包括部分地暴露连接元件，导电凸块或导电导体的开口
公开(公告)号：US08076765B2
公开(公告)日：2011-12-13
申请号：US12507305
申请日：2009-07-22
申请人： Kuang-Hsiung Chen , Chi-Chih Shen , Jen-Chuan Chen , Wen-Hsiung Chang , Hui-Shan Chang , Pei-Yu Hsu , Fa-Hao Wu , Chen-Yu Chia , Chi-Chih Chu , Cheng-Yi Weng , Ya-Wen Hsu
发明人： Kuang-Hsiung Chen , Chi-Chih Shen , Jen-Chuan Chen , Wen-Hsiung Chang , Hui-Shan Chang , Pei-Yu Hsu , Fa-Hao Wu , Chen-Yu Chia , Chi-Chih Chu , Cheng-Yi Weng , Ya-Wen Hsu
IPC分类号： H01L21/44 , H01L21/302 , H01L21/461
CPC分类号： H01L23/3128 , H01L21/565 , H01L23/49816 , H01L24/45 , H01L24/48 , H01L24/73 , H01L24/97 , H01L25/105 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/45144 , H01L2224/45147 , H01L2224/45565 , H01L2224/45664 , H01L2224/48091 , H01L2224/48145 , H01L2224/48227 , H01L2224/73204 , H01L2224/73265 , H01L2224/97 , H01L2225/1023 , H01L2225/1058 , H01L2924/00011 , H01L2924/00014 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/15311 , H01L2924/15321 , H01L2924/15331 , H01L2924/181 , H01L2924/1815 , H01L2924/3511 , H01L2924/00012 , H01L2224/85 , H01L2924/00 , H01L2224/0401 , H01L2224/45015 , H01L2924/207
摘要： In one embodiment, a semiconductor device package includes: (1) a substrate unit; (2) connecting elements disposed adjacent to a periphery of the substrate unit and extending upwardly from an upper surface of the substrate unit; (3) a semiconductor device disposed adjacent to the upper surface of the substrate unit and electrically connected to the substrate unit; and (4) a package body disposed adjacent to the upper surface of the substrate unit and covering the semiconductor device. A lateral surface of the package body is substantially aligned with a lateral surface of the substrate unit. The package body defines openings that at least partially expose respective ones of the connecting elements. At least one of the connecting elements has a width WC, and at least one of the openings has a width WU adjacent to an upper surface of the package body, such that WU>WC.
摘要翻译：在一个实施例中，半导体器件封装包括：（1）衬底单元; （2）连接元件，其邻近所述基板单元的周边设置并从所述基板单元的上表面向上延伸; （3）半导体器件，与所述衬底单元的上表面相邻并且电连接到所述衬底单元; 和（4）与衬底单元的上表面相邻并且覆盖半导体器件的封装体。封装主体的侧表面基本上与衬底单元的侧表面对准。包装体限定了至少部分地暴露相应的连接元件的开口。连接元件中的至少一个具有宽度WC，并且至少一个开口具有与封装主体的上表面相邻的宽度WU，使得WU> WC。

10. 外观设计

USD381119S Hair clip 失效
公开(公告)号：USD381119S
公开(公告)日：1997-07-15
申请号：US47156
申请日：1995-11-28
申请人： Wen-Hsiung Chang
设计人： Wen-Hsiung Chang

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