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1. 外观设计

USD364383S Semi-conductor element with terminal casing 失效
公开(公告)号：USD364383S
公开(公告)日：1995-11-21
申请号：US028484
申请日：1994-09-16
申请人： Toshifusa Yamada , Hiroshi Hikita , Takao Nagasawa , Tomio Shimizu
设计人： Toshifusa Yamada , Hiroshi Hikita , Takao Nagasawa , Tomio Shimizu

2. 外观设计

USD364385S Semi-conductor element with terminal casing 失效
公开(公告)号：USD364385S
公开(公告)日：1995-11-21
申请号：US28487
申请日：1994-09-16
申请人： Tomio Shimizu , Akira Nakahira , Rikihiro Maruyama , Toshifusa Yamada , Takao Nagasawa
设计人： Tomio Shimizu , Akira Nakahira , Rikihiro Maruyama , Toshifusa Yamada , Takao Nagasawa

3. 发明授权

US5967858A Power module 失效
标题翻译：电源模块
公开(公告)号：US5967858A
公开(公告)日：1999-10-19
申请号：US987087
申请日：1997-12-09
申请人： Toshifusa Yamada
发明人： Toshifusa Yamada
IPC分类号： H01L25/07 , H01L25/18 , H05K3/34 , H01R13/405
CPC分类号： H01L25/18 , H01L25/072 , H05K3/3426 , H01L2924/0002 , Y02P70/613
摘要： A power module is basically formed of a circuit block, a resin casing surrounding the circuit block, and circuit terminals. The circuit block has a metal base, an insulative substrate disposed on the metal base, and a plurality of circuit parts mounted on the insulative substrate. The resin casing is connected to a periphery of the metal base. The circuit terminals have terminal frames at least partly molded in the resin casing. At least one of the terminal frames has an insertion hole therein to receive an insert pin of a mold. Thus, one of the terminal frames is held in position in the mold by the insert pin of the mold during molding. The power module has an improved terminal wiring structure which stabilizes the quality and improves the reliability of the integral resin casing incorporated with the terminals inserted to the resin casing by insert-molding.
摘要翻译：电源模块基本上由电路块，围绕电路块的树脂外壳和电路端子构成。电路块具有金属基底，设置在金属基底上的绝缘基板和安装在绝缘基板上的多个电路部件。树脂壳体与金属基体的周边连接。电路端子具有至少部分地模制在树脂外壳中的端子框架。端子框架中的至少一个在其中具有插入孔以容纳模具的插入销。因此，在模制期间，一个端子框架通过模具的插销在模具中保持就位。功率模块具有改进的端子布线结构，其通过嵌入成型稳定了质量并提高了与插入到树脂壳体中的端子结合的整体树脂套筒的可靠性。

4. 发明授权

US5616955A Power transistor module wiring structure 失效
标题翻译：功率晶体管模块接线结构
公开(公告)号：US5616955A
公开(公告)日：1997-04-01
申请号：US231338
申请日：1994-04-22
申请人： Toshifusa Yamada , Shin Soyano , Etsuo Arai , Manabu Watanabe , Seiki Igarashi
发明人： Toshifusa Yamada , Shin Soyano , Etsuo Arai , Manabu Watanabe , Seiki Igarashi
IPC分类号： H01L23/48 , H01L25/07 , H01L25/18 , H02M7/00 , H01L23/52 , H01L23/528
CPC分类号： H01L24/49 , H01L25/072 , H01L25/18 , H02M7/003 , H01L2224/45124 , H01L2224/48091 , H01L2224/48227 , H01L2224/49111 , H01L2224/49113 , H01L2224/49175 , H01L24/45 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/01072 , H01L2924/01082 , H01L2924/014 , H01L2924/12041 , H01L2924/1305 , H01L2924/13055 , H01L2924/15747 , H01L2924/16152 , H01L2924/30107
摘要： In packaged bridge circuit modules with power switching transistors such as IGBT's, internal wiring inductance can cause switching voltage spikes and imbalance between switching transistors. Upon inclusion of suitably arranged and configured inductance elements, internal wiring inductance can produce a counter-electromotive force during switching. To this end, an internal connecting terminal may branch from an output terminal, a bridge-shaped internal connecting terminal may be connected between an emitter circuit pattern of one power transistor and a collector circuit pattern of another power transistor, or signal terminals as auxiliary emitter terminals of two power transistors may be connected to an inductance providing region in a current path of an emitter circuit pattern.
摘要翻译：在具有诸如IGBT等功率开关晶体管的封装桥式电路模块中，内部布线电感可能导致开关电压尖峰和开关晶体管之间的不平衡。在包含适当布置和配置的电感元件时，内部布线电感可以在切换期间产生反电动势。为此，内部连接端子可以从输出端子分支，桥式内部连接端子可以连接在一个功率晶体管的发射极电路图案和另一个功率晶体管的集电极电路图案之间，或者作为辅助发射极的信号端子两个功率晶体管的端子可以连接到发射极电路图案的电流路径中的电感提供区域。

5. 发明授权

US5767576A Semiconductor module with snap line 失效
标题翻译：具有捕捉线的半导体模块
公开(公告)号：US5767576A
公开(公告)日：1998-06-16
申请号：US858452
申请日：1997-05-19
申请人： Takatoshi Kobayashi , Toshifusa Yamada
发明人： Takatoshi Kobayashi , Toshifusa Yamada
IPC分类号： C04B37/02 , H01L23/13 , H01L25/07 , H01L25/18 , H05K1/02 , H05K1/03 , H05K1/14 , H05K3/00 , H05K3/20 , H05K3/40 , H01L23/34
CPC分类号： H05K3/0052 , H01L24/49 , H01L25/072 , H01L25/18 , H01L2224/48472 , H01L2224/49171 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01023 , H01L2924/01029 , H01L2924/014 , H01L2924/13055 , H01L2924/15747 , H01L2924/15787 , H01L2924/351 , H05K1/0271 , H05K1/0306 , H05K1/142 , H05K2201/0355 , H05K2201/0394 , H05K2201/09036 , H05K2201/0909 , H05K2201/09827 , H05K3/0061 , H05K3/4092
摘要： A semiconductor module includes a ceramic substrate for mounting plural semiconductor chips. Even if cracks and cleavages are formed in the ceramic substrate, further damages, such as lowering dielectric or insulation strength is prevented. The semiconductor module includes IGBTs arranged on one ceramic substrate soldered to a metal base plate, and the upper surface of the ceramic substrate is divided into zones. On each zone, a copper foil with one IGBT is mounted. A snap line is formed between the zones to localize the cracks and cleavages formed by bending stress to the snap line. The copper foils on the zones are connected to each other by a conductor bridge disposed over the snap line.
摘要翻译：半导体模块包括用于安装多个半导体芯片的陶瓷基板。即使在陶瓷基板中形成裂纹和裂纹，也可以防止诸如降低电介质或绝缘强度的损害。半导体模块包括布置在焊接到金属基板的一个陶瓷基板上的IGBT，并且陶瓷基板的上表面被分成多个区域。在每个区域上安装一个带有一个IGBT的铜箔。在这些区域之间形成卡扣线，以将由弯曲应力形成的裂纹和裂缝定位到卡扣线。区域上的铜箔通过布置在卡扣线上的导体桥彼此连接。

6. 发明授权

US5306949A Transistor module having external lead terminal with transient voltage suppression 失效
标题翻译：具有瞬态电压抑制的外部引线端子的晶体管模块
公开(公告)号：US5306949A
公开(公告)日：1994-04-26
申请号：US973276
申请日：1992-11-09
申请人： Toshifusa Yamada , Shuji Miyashita , Toshihisa Shimizu
发明人： Toshifusa Yamada , Shuji Miyashita , Toshihisa Shimizu
IPC分类号： H01L23/48 , H01L23/64 , H05K3/34 , H01L23/50
CPC分类号： H01L24/49 , H01L23/64 , H01L23/645 , H01L23/647 , H01L2223/6644 , H01L2224/48091 , H01L2224/48227 , H01L2224/49113 , H01L24/48 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01068 , H01L2924/01082 , H01L2924/014 , H01L2924/12041 , H01L2924/19043 , H01L2924/30107 , H01L2924/3011 , H05K3/3426
摘要： In an external lead terminal 5 of a transistor module, an intermediate terminal portion 6 and an external lead terminal 8 are conductively connected to each other via a U-shaped intermediate terminal portion 7 having a curved portion 7b. Connected in parallel with this intermediate terminal portion 7 is a shortcircuit wire 9 having a larger electric resistance and a smaller inductance than the same. For this reason, even if a current is reduced suddenly in a state in which the current is flowing from the external terminal portion 8 to the intermediate terminal portion 6 via the intermediate terminal portion 7, the current shifts to the shortcircuit wire 9 side, so that a transient voltage is low. Consequently, it is provided a transistor module capable of reducing a transient voltage without being subjected to restrictions in the size of an external lead terminal while maintaining a high level of reliability.
摘要翻译：在晶体管模块的外部引线端子5中，中间端子部分6和外部引线端子8经由具有弯曲部分7b的U形中间端子部分7彼此导电连接。与该中间端子部7并联连接的是具有较大的电阻和较小的电感的短路导线9。因此，即使在电流从外部端子部8经由中间端子部7流向中间端子部6的状态下，即使电流突然减小，电流也向短路线9侧移动，因此瞬态电压低。因此，提供一种晶体管模块，其能够在保持高可靠性的同时，不会受到外部引线端子的尺寸的限制而降低瞬态电压。

7. 发明授权

US5243217A Sealed semiconductor device with protruding portion 失效
标题翻译：密封半导体器件，具有支撑部分
公开(公告)号：US5243217A
公开(公告)日：1993-09-07
申请号：US773219
申请日：1991-10-09
申请人： Toshifusa Yamada
发明人： Toshifusa Yamada
IPC分类号： H01L23/24 , H01L23/495
CPC分类号： H01L24/06 , H01L23/24 , H01L23/49562 , H01L24/49 , H01L2224/05553 , H01L2224/05647 , H01L2224/45124 , H01L2224/48091 , H01L2224/48227 , H01L2224/48747 , H01L2224/49113 , H01L2224/85447 , H01L24/45 , H01L24/48 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01018 , H01L2924/01029 , H01L2924/01033 , H01L2924/01039 , H01L2924/01068 , H01L2924/01074 , H01L2924/01082 , H01L2924/014 , H01L2924/13055 , H01L2924/13091 , H01L2924/30107
摘要： A sealed semiconductor device, comprising at least one semiconductor chip, a wiring circuit board having the at least one semiconductor chip disposed thereon, at least one inner wire connecting the semiconductor chip to the wiring circuit board, a base board having the wiring circuit board disposed thereon, the base board enclosed on all sides forming a case, a silicon gel layer partially filling the case, a sealing resin layer disposed within the case above the silicon gel layer, a resin block in contact with the sealing resin layer, at least one inner terminal portion electrically connected to the wiring circuit board, at least one intermediate protruding portion electrically connected to, and projecting upwardly from, the at least one inner terminal portion, at least one aperture through the at least one intermediate protruding portion, the at least one aperture substantially disposed along a direction of a current passing through the at least one intermediate protruding portion within the case, and an outer terminal portion electrically connected to the at least one intermediate protruding portion is disclosed.
摘要翻译：一种密封半导体器件，包括至少一个半导体芯片，具有设置在其上的至少一个半导体芯片的布线电路板，将半导体芯片连接到布线电路板的至少一个内部线，设置有布线电路板的基板在其上形成壳体的所有面上包围的基板，部分填充壳体的硅胶层，设置在硅胶层之上的壳体内的密封树脂层，与密封树脂层接触的树脂块，至少一个电连接到所述布线电路板的内部端子部分，至少一个中间突出部分，其电连接到所述至少一个内部端子部分并从所述至少一个内部端子部分向上突出穿过所述至少一个中间突出部分的至少一个孔，一个孔基本上沿着通过所述至少一个中间突出部分的电流的方向设置在该情况下，公开了与该至少一个中间突出部电连接的外部端子部。

8. 外观设计

USD389808S Hybrid integrated circuit for electric power control 失效
公开(公告)号：USD389808S
公开(公告)日：1998-01-27
申请号：US56800
申请日：1996-07-09
申请人： Toshifusa Yamada , Shin Soyano
设计人： Toshifusa Yamada , Shin Soyano

9. 发明授权

US5243223A Semiconductor device having housing with a gelled filler and an internal pressure absorbing chamber 失效
标题翻译：具有凝胶填充物和内部压力吸收室的壳体的半导体器件
公开(公告)号：US5243223A
公开(公告)日：1993-09-07
申请号：US827611
申请日：1992-01-29
申请人： Toshifusa Yamada , Hiroaki Matsushita
发明人： Toshifusa Yamada , Hiroaki Matsushita
IPC分类号： H01L23/04 , H01L23/24 , H01L23/28 , H01L23/29 , H01L23/31
CPC分类号： H01L23/04 , H01L23/24 , H01L2224/48091
摘要： A semiconductor device includes a housing, a semiconductor element disposed in a lower section inside the housing, an external lead terminal at least partially disposed within the housing, a gelled filler disposed within the housing, the semiconductor element and at least a portion of the external lead terminal being embedded in the gelled filler, a hardened sealing resin layer disposed over the gelled filler, and at least one internal pressure absorbing chamber having a pocket-type sealed space, the internal pressure absorbing chamber passing through the sealing resin layer and being open at an upper surface side of the gelled filler. The semiconductor device prevents a rise in the internal pressure of the housing in response to thermal expansion of the gelled filler sealed within the housing, and the absorption of external moisture by the gelled filler. When the gelled filler expands according to a heat cycle, its increase in volume is absorbed by the internal pressure absorbing chamber to prevent leakage of the gelled filler and the application of stress to the semiconductor element. The absorption of moisture from the air outside of the semiconductor device by the gelled filler is prevented by defining the internal pressure absorbing chamber as a tightly closed pocket-type space to ensure that the semiconductor device is intrinsically resistant to humidity.

10. 发明授权

US5155660A Semiconductor device 失效
标题翻译：半导体器件
公开(公告)号：US5155660A
公开(公告)日：1992-10-13
申请号：US760906
申请日：1991-09-17
申请人： Toshifusa Yamada , Shin Soyano
发明人： Toshifusa Yamada , Shin Soyano
IPC分类号： H01L23/495
CPC分类号： H01L23/49562 , H01L23/49517 , H01L2224/48091 , H01L2224/48227 , H01L2224/48247 , H01L24/48 , H01L2924/00014 , H01L2924/01068 , H01L2924/12041 , H01L2924/1301
摘要： A semiconductor device is provided with a base plate on which a circuit board is disposed. A plurality of semiconductor elements such as diodes or transistors are supported on the circuit board and interconnected by circuit wiring. A container for the device includes side walls extending upwardly from the base plate and a top cover extending between the walls. An external terminal connection is provided by an internal terminal and an external terminal that are connected by a flexible wire within the container. The internal terminal has its lower end soldered to the circuit wiring at a predetermined location and its upper end disposed in a seat in the top cover. An upwardly extending slit within the seat receives the end of the internal terminal and a transverse window opens to the slit to receive a transverse protrusion from the upper terminal end. The external terminal extends through the cover with its lower end extending inwardly of the cover where the flexible wire is connected to it.
摘要翻译：半导体器件设置有基板，电路板设置在基板上。多个半导体元件（例如二极管或晶体管）被支撑在电路板上并通过电路布线互连。用于装置的容器包括从基板向上延伸的侧壁和在壁之间延伸的顶盖。外部端子连接由通过容器内的柔性线连接的内部端子和外部端子提供。内部端子的下端在预定位置焊接到电路布线，并且其上端设置在顶盖中的座中。座内的向上延伸的狭缝容纳内部端子的端部，并且横向窗口向狭缝开口以从上端子接收横向突起。外部端子延伸穿过盖，其下端延伸到盖的内部，柔性线连接到盖。

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