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    • 1. 发明授权
    • Method and apparatus for detection of non-linear electrical devices
    • 用于检测非线性电气装置的方法和装置
    • US4547724A
    • 1985-10-15
    • US464796
    • 1983-02-07
    • Todd M. BeazleyCalvin D. Diller
    • Todd M. BeazleyCalvin D. Diller
    • G01R27/02G01R27/14G01R27/00
    • G01R27/02G01R27/14
    • The present invention provides a system for applying a fixed level D.C. voltage and a square wave signal sequentially to a voltage divider including a resistor of a known impedance and the device under test. The square wave ranges from a value which is substantially equal to the ground level to a level that is substantially twice the nominal value of the fixed D.C. level, thus the average value of the square wave signal is substantially equal to the nominal value of the fixed level D.C. voltage.With each of these signals applied on at a time to the voltage divider, the voltage across the device under test is applied to a voltage detector via a low pass filter. The output of the low pass filter for each applied voltage signal is the average of the voltage signal which appears across the device under test. The value of these average voltages are stored and then compared. If the average values are substantially equal, then the device under test is linear, and knowing the average voltage value, the nominal voltage value, and value of the known resistor, the resistance value of the device under test can be calculated. If the average values of the voltages across the device under test varies from the application of the fixed level D.C. voltage and the square wave signal, the device under test is non-linear, e.g. a diode or transistor junction.
    • 本发明提供了一种用于将固定电平直流电压和方波信号顺序地施加到包括已知阻抗的电阻器的分压器和被测器件的系统。 方波的范围从实质上等于地电平的值到基本上是固定DC电平的额定值的两倍的电平,因此方波信号的平均值基本上等于固定的DC电平的标称值 级直流电压。 将这些信号中的每一个同时施加到分压器,将被测器件上的电压通过低通滤波器施加到电压检测器。 每个施加的电压信号的低通滤波器的输出是出现在被测器件上的电压信号的平均值。 这些平均电压的值被存储然后进行比较。 如果平均值基本相等,则被测器件是线性的,并且知道已知电阻器的平均电压值,额定电压值和值,可以计算被测器件的电阻值。 如果被测器件上的电压的平均值与固定电平直流电压和方波信号的应用不同,则被测器件是非线性的。 二极管或晶体管结。
    • 2. 发明授权
    • Timebase generator with improved linearity and recovery time
    • 时基生成器具有改进的线性度和恢复时间
    • US4728813A
    • 1988-03-01
    • US905910
    • 1986-09-09
    • Calvin D. Diller
    • Calvin D. Diller
    • H03K4/90G01R13/24H03K4/50H03K4/501H04N3/16
    • H03K4/50
    • A timebase generator includes a transistor switch performing a sweep gate function, alternately providing a current path for retrace and then disconnecting such current path to allow generation of a time base ramp. The bias current delivered to the switch is controlled to be at a high level for bringing about proper retrace, but at a low level at the beginning and ending of the time base sweep itself to prevent undesired transients and nonlinearity effects. The low current is maintained from the end of the retrace period until the start of the following retrace period. A baseline stabilizer loop comprises a transistor circuit for accurately predetermining the baseline reference wherein the emitter current of the transistor is controlled to a substantially constant value during operation for enhanced stability. The undesirable effect produced by inherent capacitance of a semiconductor device current source used for charging the timebase generator timing capacitor is neutralized by means of a matching semiconductor device interposed between the timebase generator output and an input electrode of the first mentioned semiconductor device.
    • 4. 发明授权
    • Level shift circuit for differential signals
    • 差分信号电平移位电路
    • US4723112A
    • 1988-02-02
    • US909653
    • 1986-09-19
    • Calvin D. DillerDonald D. Gladden
    • Calvin D. DillerDonald D. Gladden
    • H03K5/02H03F3/213H03F3/26H03F3/34H03F3/45H03K5/00
    • H03F3/26H03F3/45475H03F3/45946
    • A level shift circuit for shifting the common mode level of the output signal provided by a differential amplifier has first and second input terminals for receiving the output signal from the differential amplifier, which has a Thevenin source impedance R.sub.s, and also has first and second output terminals that are connected to a reference voltage level through a load impedance R.sub.o. The circuit comprises a differential transconductance amplifier having two output terminals that are connected respectively to the first and second output terminals of the circuit. The amplifier has the property that it responds to an input voltage E.sub.e between its input terminals by providing a current equal to E.sub.e g.sub.ml /(1+.tau.s) (where g.sub.ml is the transconductance of the amplifier, .tau. is the response time constant of the amplifier and s is the Laplace transform operator) at its output terminals. Two equal-valued capacitors are connected respectively between the first input terminal of the circuit and the first output terminal of the circuit and between the second input terminal of the circuit and the second output terminal of the circuit, the capacitance C.sub.c of each capacitor being such that R.sub.s C.sub.c is much greater than .tau.. The circuit also comprises two equal-valued resistors connected in series between the first input terminal of the circuit and the second output terminal of the circuit and having their connection point connected to one of the input terminals of the amplifier, and two more equal-valued resistors connected in series between the first output terminal of the circuit and the second input terminal of the circuit and having their connection point connected to the other of the two input terminals of the amplifier. The value of g.sub.ml is selected to be equal to (1/2R.sub.s +1/R).
    • 6. 发明授权
    • D.C. Stabilization circuit for a follower-type amplifier
    • 跟随型放大器的稳定电路
    • US4459553A
    • 1984-07-10
    • US347837
    • 1982-02-11
    • Calvin D. Diller
    • Calvin D. Diller
    • H03F1/30H03F3/50H03F1/32
    • H03F1/306H03F3/505
    • A D.C. stabilization circuit is provided for a follower-type amplifier in which a correction current is generated to maintain a constant operating point of the follower device. A blocking capacitor between a signal source and the follower device permits the bias voltage to self adjust. In a preferred embodiment, the correction current is generated by a transconductance amplifier which compares the output voltage with a signal input voltage, and the correction current is connected directly to the junction of the blocking capacitor and the input of the follower device. The follower device may suitably be a field-effect transistor, a bipolar transistor, or a multi-stage follower composed of both types of devices.
    • 为一个跟随型放大器提供直流稳定电路,其中产生校正电流以维持从动装置的恒定工作点。 信号源和跟随器件之间的隔离电容允许偏压自动调节。 在优选实施例中,校正电流由跨导放大器产生,该跨导放大器将输出电压与信号输入电压进行比较,校正电流直接连接到阻塞电容器与从动装置的输入端。 跟随器件可以适当地是由两种类型的器件组成的场效应晶体管,双极晶体管或多级跟随器。
    • 7. 发明授权
    • Method and circuit for triggering an electronic instrument only once
during a period of a signal
    • 在信号期间仅触发电子仪器一次的方法和电路
    • US5223784A
    • 1993-06-29
    • US711007
    • 1991-06-01
    • Theodore G. NelsonCalvin D. DillerRobert D. Meadows
    • Theodore G. NelsonCalvin D. DillerRobert D. Meadows
    • G01R13/32
    • G01R13/32
    • A method and circuit for triggering an electronic instrument only once during a period of an input signal having multiple triggering events during that period. A signal applied to an electronic instrument, such as an oscilloscope, is acquired. Qualified triggering events occurring on the acquired signal are identified. A selected one of the qualified triggering events during the period of the applied signal causes a trigger signal output to occur, while other qualified triggering events are ignored. In the preferred embodiment a triggering event is qualified by a first comparator that compares the input signal to a first reference level and produces a predetermined logic level output if the input signal bears a predetermined relationship to the reference level. When a qualified triggering event occurs, a buffer amplifier applies the predetermined logic level to charge a capacitor, which thereafter stores some energy from the input signal and applies it to a comparator for a predetermined period of time. The comparator compares the voltage on the capacitor to a second reference level and produces a pulse if the capacitor voltage has a predetermined relationship to the second reference level. The leading edge of the pulse comprises a trigger output signal. Subsequent triggering events which occur before a predetermined period of time are unable to produce another trigger signal. Five alternative embodiments employing the same general principle as the preferred embodiment are disclosed.
    • 一种用于在该期间具有多次触发事件的输入信号期间仅触发一次电子仪器的方法和电路。 获取施加到诸如示波器的电子仪器的信号。 识别在获取的信号上发生的合格触发事件。 在施加的信号周期期间选定的一个合格的触发事件导致触发信号输出发生,而其他合格的触发事件被忽略。 在优选实施例中,触发事件由第一比较器限定,第一比较器将输入信号与第一参考电平进行比较,并且如果输入信号与参考电平具有预定关系,则产生预定的逻辑电平输出。 当发生合格的触发事件时,缓冲放大器施加预定的逻辑电平以对电容器进行充电,此后电容器从输入信号中存储一些能量并将其施加到比较器预定的时间段。 比较器将电容器上的电压与第二参考电平进行比较,并且如果电容器电压与第二参考电平具有预定关系,则产生脉冲。 脉冲的前沿包括触发输出信号。 在预定时间段之前发生的后续触发事件不能产生另一个触发信号。 公开了采用与优选实施例相同的一般原理的五个替代实施例。
    • 9. 发明授权
    • Fast recovery amplifier
    • 快恢复放大器
    • US4691174A
    • 1987-09-01
    • US909437
    • 1986-09-19
    • Theodore G. NelsonCalvin D. Diller
    • Theodore G. NelsonCalvin D. Diller
    • H03F3/45H03G7/00
    • H03F3/45197H03F3/45103H03G7/002H03F2203/45146
    • An amplifier includes first and second transistors having emitters connected to a first current source, feedback from the second transistor collector to its base being supplied through a base-emitter path of a first Darlington pair in series with a first diode. A second current source is connected to the first Darlington pair emitter. Third and fourth transistors have emitters connected to a third current source with feedback supplied from the fourth transistor collector to its base through a second Darlington pair and a second diode. The second Darlington pair emitter is connected to a fourth current source and resistively coupled to the first Darlington pair emitter. Constant currents are supplied to the second and fourth transistor collectors and an input voltage across the first and third transistor bases controls allocation of current between the first and second Darlington pair emitter-collector paths to produce a differential output current proportional to the input voltage when both Darlington pairs are on. When the input voltage is highly negative, the first Darlington pair turns off and a biasing circuit reverse biases the first diode to prevent the second transistor from saturating and substantially discharging capacitance at the base of the first Darlington pair. Thus, the first Darlington pair can rapidly turn on when the input voltage is subsequently driven more positive. When the input voltage is highly positive, another biasing circuit reverse biases the second diode to prevent the fourth transistor from saturating.
    • 放大器包括具有连接到第一电流源的发射极的第一和第二晶体管,从第二晶体管集电极到其基极的反馈通过与第一二极管串联的第一达林顿对的基极 - 发射极路径提供。 第二电流源连接到第一达林顿对发射极。 第三和第四晶体管具有连接到第三电流源的发射极,其具有通过第二达林顿对和第二二极管从第四晶体管集电极提供到其基极的反馈。 第二达林顿对发射器连接到第四电流源并且电阻耦合到第一达林顿对发射极。 恒定电流被提供给第二和第四晶体管集电极,并且跨越第一和第三晶体管基极的输入电压控制第一和第二达林顿对发射极 - 集电极路径之间的电流分配,以产生与输入电压成比例的差分输出电流 达林顿对。 当输入电压高负时,第一达林顿对关断,偏置电路反向偏置第一二极管,以防止第二晶体管在第一达林顿对的基极饱和并基本上放电电容。 因此,当输入电压随后驱动得更为正时,第一个达林顿对可以快速导通。 当输入电压为高电平时,另一个偏置电路反向偏置第二个二极管,以防止第四个晶体管饱和。