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1. 发明授权

US07368968B1 Signal offset cancellation 有权
标题翻译：信号偏移消除
公开(公告)号：US07368968B1
公开(公告)日：2008-05-06
申请号：US11323372
申请日：2005-12-29
申请人： Tin H. Lai , Wilson Wong
发明人： Tin H. Lai , Wilson Wong
IPC分类号： H03F3/45 , H03L5/00
CPC分类号： H03F3/45475 , H03F3/45192 , H03F3/45744 , H03F3/45968 , H03F2200/321 , H03F2203/45212 , H03F2203/45646 , H03F2203/45678 , H03F2203/45681 , H03F2203/45726
摘要： Techniques and circuitry are provided for programmably controlling signal offsets in integrated circuitry. In one embodiment, an integrated circuit includes a signal offset cancellation circuit that is programmably selected to control the offset of signals on either one input/output or another input/output of an amplifier circuit. In one embodiment, a logic circuit is used to selectively couple a bank of current sources to one input/output or another input/output of a differential amplifier through a switching circuit. The bank of current sources may employed to control the signal offset on either input/output, or may be decoupled from all of the inputs/outputs when signal offset cancellation is not required.
摘要翻译：提供技术和电路用于可编程地控制集成电路中的信号偏移。在一个实施例中，集成电路包括可编程地选择以控制放大器电路的一个输入/输出或另一个输入/输出上的信号的偏移的信号偏移消除电路。在一个实施例中，逻辑电路用于通过开关电路将一组电流源选择性地耦合到差分放大器的一个输入/输出或另一个输入/输出。可以采用电流源的组来控制输入/输出上的信号偏移，或者当不需要信号偏移消除时可以与所有的输入/输出去耦。

2. 发明授权

US07733982B2 Signal adjustment receiver circuitry 失效
标题翻译：信号调节接收器电路
公开(公告)号：US07733982B2
公开(公告)日：2010-06-08
申请号：US12511022
申请日：2009-07-28
申请人： Wilson Wong , Rakesh H. Patel , Sergey Shumarayev , Tin H. Lai
发明人： Wilson Wong , Rakesh H. Patel , Sergey Shumarayev , Tin H. Lai
IPC分类号： H03K9/00 , H04L27/00
CPC分类号： H04B7/005 , H04L25/03006 , H04L25/061
摘要： Systems and methods for adjusting a signal received from a communication path are disclosed. A receiver can receive a signal from a communication path which attenuates at least some frequency components of the signal. The receiver can include an equalization block that adjusts at least some of the frequency content of the received signal, a signal normalization block that provides a normalized signal amplitude and/or a normalized edge slope, and a control block. In one embodiment, the control block controls frequency adjustment in the equalization block for high frequencies but not for low frequencies. For low frequency adjustment, the control block controls the normalized signal amplitude in the signal normalization block. In this manner, controlled adjustment for low frequency content is performed in the signal normalization block.
摘要翻译：公开了一种用于调整从通信路径接收的信号的系统和方法。接收机可以接收来自衰减信号的至少一些频率分量的通信路径的信号。接收机可以包括调整接收信号的频率内容中的至少一些的均衡块，提供归一化信号幅度和/或归一化边沿斜率的信号归一化块以及控制块。在一个实施例中，控制块控制用于高频而不是低频的均衡块中的频率调整。对于低频调整，控制块控制信号归一化块中的归一化信号幅度。以这种方式，在信号归一化块中执行低频内容的受控调整。

3. 发明授权

US07710180B1 Signal offset cancellation 失效
标题翻译：信号偏移消除
公开(公告)号：US07710180B1
公开(公告)日：2010-05-04
申请号：US12116059
申请日：2008-05-06
申请人： Tin H. Lai , Wilson Wong
发明人： Tin H. Lai , Wilson Wong
IPC分类号： H03F3/45 , H03L5/00
CPC分类号： H03F3/45475 , H03F3/45192 , H03F3/45744 , H03F3/45968 , H03F2200/321 , H03F2203/45212 , H03F2203/45646 , H03F2203/45678 , H03F2203/45681 , H03F2203/45726
摘要： Techniques and circuitry are provided for programmably controlling signal offsets in integrated circuitry. In one embodiment, an integrated circuit includes a signal offset cancellation circuit that is programmably selected to control the offset of signals on either one input/output or another input/output of an amplifier circuit. In one embodiment, a logic circuit is used to selectively couple a bank of current sources to one input/output or another input/output of a differential amplifier through a switching circuit. The bank of current sources may employed to control the signal offset on either input/output, or may be decoupled from all of the inputs/outputs when signal offset cancellation is not required.
摘要翻译：提供技术和电路用于可编程地控制集成电路中的信号偏移。在一个实施例中，集成电路包括可编程地选择以控制放大器电路的一个输入/输出或另一个输入/输出上的信号的偏移的信号偏移消除电路。在一个实施例中，逻辑电路用于通过开关电路将一组电流源选择性地耦合到差分放大器的一个输入/输出或另一个输入/输出。可以采用电流源的组来控制输入/输出上的信号偏移，或者当不需要信号偏移消除时可以与所有的输入/输出去耦。

4. 发明授权

US07358883B1 Dynamic bias circuit 有权
标题翻译：动态偏置电路
公开(公告)号：US07358883B1
公开(公告)日：2008-04-15
申请号：US11470343
申请日：2006-09-06
申请人： Tin H. Lai , Wilson Wong , Sergey Shumarayev
发明人： Tin H. Lai , Wilson Wong , Sergey Shumarayev
IPC分类号： H03M1/66
CPC分类号： G11C7/12 , G11C7/1045 , H03M1/662
摘要： A bias circuit includes a digital to analog converter (D2A) generating an output representing a voltage level for tuning an analog signal. The D2A is coupled to a primary register frame that includes a plurality of register frames that are serially linked. The bias circuit includes a decoder also coupled to the primary register frame. An output enable logic module is also included. The output enable logic module determines when the primary register has a complete data set as the data is shifted into the primary register frame from a memory region that may be a ROM, RAM, soft IP of a PLD, an intelligent host or tester serial data input stream. A method for adjusting a signal through a bias circuit is also provided.
摘要翻译：偏置电路包括产生表示用于调谐模拟信号的电压电平的输出的数模转换器（D2A）。 D2A耦合到包括多个串行连接的寄存器帧的主寄存器帧。偏置电路包括还耦合到主寄存器框架的解码器。还包括一个输出使能逻辑模块。输出使能逻辑模块确定主寄存器何时具有完整数据集，因为数据从可能是ROM，RAM，PLD的软IP，智能主机或测试仪串行数据的存储器区域移入主寄存器帧输入流。还提供了一种通过偏置电路调整信号的方法。

5. 发明授权

US07336211B1 Resistance compensated DAC ladder 有权
标题翻译：电阻补偿DAC梯形图
公开(公告)号：US07336211B1
公开(公告)日：2008-02-26
申请号：US11336443
申请日：2006-01-20
申请人： Tin H. Lai , Wilson Wong
发明人： Tin H. Lai , Wilson Wong
IPC分类号： H03M1/78
CPC分类号： H03M1/06 , H03M1/785
摘要： Circuits, methods, and apparatus for inhibiting non-monotonic output voltage behavior in an R-2R ladder digital to analog converter (DAC). Resistance values of selected resistors of the R-2R ladder are designed to compensate for finite resistances of switches and for variances within the resistances of the resistors and of the switches. The compensating resistance values dampen or eliminate the non-monotonic behavior in the DAC.
摘要翻译：用于抑制R-2R梯形数模转换器（DAC）中的非单调输出电压特性的电路，方法和装置。 R-2R梯形电阻器的电阻值被设计为补偿开关的有限电阻和电阻器和开关电阻之间的差异。补偿电阻值抑制或消除DAC中的非单调行为。

6. 发明授权

US08175143B1 Adaptive equalization using data level detection 有权
标题翻译：使用数据级检测的自适应均衡
公开(公告)号：US08175143B1
公开(公告)日：2012-05-08
申请号：US12037284
申请日：2008-02-26
申请人： Wilson Wong , Tin H. Lai , Allen Chan , Tim Tri Hoang , Sergey Shumarayev
发明人： Wilson Wong , Tin H. Lai , Allen Chan , Tim Tri Hoang , Sergey Shumarayev
IPC分类号： H03H7/30
CPC分类号： H04L25/03057 , H04L25/03885 , H04L2025/03356 , H04L2025/03745 , H04L2025/03783
摘要： A method, and circuitry, for choosing the correct equalization curve in adaptive equalization uses a feedback loop in which the incoming high-speed serial data are digitized and deserialized for use in the remainder of the device, and also are used by an adaptive state machine to both extract the reference levels for digitization and to control the equalization curve. Detection of the reference level and selection of the equalization curve may be performed at a different rates to avoid interfering with one another. The state machine preferably is programmable. This is useful in any device, but is particularly well-suited for a programmable device, such as a PLD or other programmable integrated circuit device, where conditions may vary according a user logic design.
摘要翻译：用于在自适应均衡中选择正确的均衡曲线的方法和电路使用反馈回路，其中输入的高速串行数据被数字化和反序列化以用于设备的其余部分，并且还被自适应状态机以提取用于数字化的参考电平并控制均衡曲线。参考电平的检测和均衡曲线的选择可以以不同的速率进行，以避免彼此干扰。状态机优选是可编程的。这在任何设备中是有用的，但是特别适用于诸如PLD或其他可编程集成电路设备的可编程设备，其中条件可以根据用户逻辑设计而变化。

7. 发明授权

US07920621B2 Digital adaptation circuitry and methods for programmable logic devices 有权
标题翻译：用于可编程逻辑器件的数字适配电路和方法
公开(公告)号：US07920621B2
公开(公告)日：2011-04-05
申请号：US11522284
申请日：2006-09-14
申请人： Wilson Wong , Doris Po Ching Chan , Sergey Shumarayev , Simardeep Maangat , Tim Tri Hoang , Tin H. Lai , Thungoc M. Tran
发明人： Wilson Wong , Doris Po Ching Chan , Sergey Shumarayev , Simardeep Maangat , Tim Tri Hoang , Tin H. Lai , Thungoc M. Tran
IPC分类号： H03H7/30
CPC分类号： H04L25/03885
摘要： Equalization of an incoming data signal can be controlled by sampling that signal at times when data values in that signal should be stable (“data samples”) and when that signal should be in transition between successive data values that are different (“transition samples”). A transition sample that has been taken between two successive differently valued data samples is compared to a reference value (which can be one of those two data samples). The result of this comparison can be used as part of a determination as to whether to increase or decrease equalization of the incoming data signal.
摘要翻译：输入数据信号的均衡可以通过在该信号中的数据值应当稳定（“数据采样”）的时候对该信号进行采样来控制，并且当该信号应该在不同的连续数据值（“转换样本” ）。将已经在两个连续的不同值数据样本之间拍摄的转换样本与参考值（可以是这两个数据样本之一）进行比较。该比较的结果可以用作关于是否增加或减少输入数据信号的均衡的确定的一部分。

8. 发明授权

US07760799B2 Programmable digital equalization control circuitry and methods 失效
标题翻译：可编程数字均衡控制电路和方法
公开(公告)号：US07760799B2
公开(公告)日：2010-07-20
申请号：US11238365
申请日：2005-09-28
申请人： Tin H. Lai , Sergey Shumarayev , Simardeep Maangat , Wilson Wong
发明人： Tin H. Lai , Sergey Shumarayev , Simardeep Maangat , Wilson Wong
IPC分类号： H03H7/30 , H03H7/40 , H03K5/159
CPC分类号： H03G3/3089 , H04L25/03885
摘要： Equalization circuitry may be used to compensate for the attenuation of a data signal caused by a transmission medium. The control circuitry for the equalization circuitry may generate control inputs for equalization stages that control the amount of gain provided to the data signal. A comparator may determine whether the gain from the equalization circuitry is less than or more than the desired amount of gain. A programmable up/down counter may adjust the counter value based on the output of the comparator. The counter value may be converted into one or more analog voltages using one or more digital-to-analog converters. These analog voltages may be provided to the equalization stages as control inputs. The control circuitry may also include hysteresis circuitry that prevents the counter value from being adjusted when the gain produced by the equalization stages is close to the desired amount of gain.
摘要翻译：均衡电路可用于补偿由传输介质引起的数据信号的衰减。用于均衡电路的控制电路可以产生用于控制提供给数据信号的增益量的均衡级的控制输入。比较器可以确定来自均衡电路的增益是否小于或大于期望的增益量。可编程上/下计数器可以根据比较器的输出来调整计数器值。可以使用一个或多个数模转换器将计数器值转换成一个或多个模拟电压。这些模拟电压可以作为控制输入提供给均衡级。控制电路还可以包括滞后电路，当由均衡级产生的增益接近期望的增益量时，阻止计数器值被调整。

9. 发明申请

US20090285275A1 SIGNAL ADJUSTMENT RECEIVER CIRCUITRY 失效
标题翻译：信号调整接收机电路
公开(公告)号：US20090285275A1
公开(公告)日：2009-11-19
申请号：US12511022
申请日：2009-07-28
申请人： Wilson Wong , Rakesh H. Patel , Sergey Shumarayev , Tin H. Lai
发明人： Wilson Wong , Rakesh H. Patel , Sergey Shumarayev , Tin H. Lai
IPC分类号： H04L27/01
CPC分类号： H04B7/005 , H04L25/03006 , H04L25/061
摘要： Systems and methods for adjusting a signal received from a communication path are disclosed. A receiver can receive a signal from a communication path which attenuates at least some frequency components of the signal. The receiver can include an equalization block that adjusts at least some of the frequency content of the received signal, a signal normalization block that provides a normalized signal amplitude and/or a normalized edge slope, and a control block. In one embodiment, the control block controls frequency adjustment in the equalization block for high frequencies but not for low frequencies. For low frequency adjustment, the control block controls the normalized signal amplitude in the signal normalization block. In this manner, controlled adjustment for low frequency content is performed in the signal normalization block.
摘要翻译：公开了一种用于调整从通信路径接收的信号的系统和方法。接收机可以接收来自衰减信号的至少一些频率分量的通信路径的信号。接收机可以包括调整接收信号的频率内容中的至少一些的均衡块，提供归一化信号幅度和/或归一化边沿斜率的信号归一化块以及控制块。在一个实施例中，控制块控制用于高频而不是低频的均衡块中的频率调整。对于低频调整，控制块控制信号归一化块中的归一化信号幅度。以这种方式，在信号归一化块中执行低频内容的受控调整。

10. 发明授权

US08208523B2 Digital adaptation circuitry and methods for programmable logic devices 有权
标题翻译：用于可编程逻辑器件的数字适配电路和方法
公开(公告)号：US08208523B2
公开(公告)日：2012-06-26
申请号：US13079420
申请日：2011-04-04
申请人： Wilson Wong , Doris Po Ching Chan , Sergey Shumarayev , Simardeep Maangat , Tim Tri Hoang , Tin H. Lai , Thungoc M. Tran
发明人： Wilson Wong , Doris Po Ching Chan , Sergey Shumarayev , Simardeep Maangat , Tim Tri Hoang , Tin H. Lai , Thungoc M. Tran
IPC分类号： H03H7/30
CPC分类号： H04L25/03885
摘要： Equalization of an incoming data signal can be controlled by sampling that signal at times when data values in that signal should be stable (“data samples”) and when that signal should be in transition between successive data values that are different (“transition samples”). A transition sample that has been taken between two successive differently valued data samples is compared to a reference value (which can be one of those two data samples). The result of this comparison can be used as part of a determination as to whether to increase or decrease equalization of the incoming data signal.
摘要翻译：输入数据信号的均衡可以通过在该信号中的数据值应当稳定（“数据采样”）的时候对该信号进行采样来控制，并且当该信号应该在不同的连续数据值（“转换样本” ）。将已经在两个连续的不同值数据样本之间拍摄的转换样本与参考值（可以是这两个数据样本之一）进行比较。该比较的结果可以用作关于是否增加或减少输入数据信号的均衡的确定的一部分。

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